KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption...

In some hardware implementations, coherency between the encrypted and
unencrypted mappings of the same physical page in a VM is enforced. In
such a system, it is not required for software to flush the VM's page
from all CPU caches in the system prior to changing the value of the
C-bit for the page.

So check that bit before flushing the cache.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20200917212038.5090-4-krish.sadhukhan@oracle.com

diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 402dc4234e397861daef0be131a61118c8f2681a..567792fbbc9fa77eb660c92ba864921f6e7b39ac 100644 (file)
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -384,7 +384,8 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages)
        uint8_t *page_virtual;
        unsigned long i;
 
-       if (npages == 0 || pages == NULL)
+       if (this_cpu_has(X86_FEATURE_SME_COHERENT) || npages == 0 ||
+           pages == NULL)
                return;
 
        for (i = 0; i < npages; i++) {