*/
val = (val >= 4) ? 4 : (3 - val);
- reg = snd_soc_component_read32(component, TLV320AIC23_ANLG) & (~0x1C0);
+ reg = snd_soc_component_read(component, TLV320AIC23_ANLG) & (~0x1C0);
snd_soc_component_write(component, TLV320AIC23_ANLG, reg | (val << 6));
return 0;
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
u16 val;
- val = snd_soc_component_read32(component, TLV320AIC23_ANLG) & (0x1C0);
+ val = snd_soc_component_read(component, TLV320AIC23_ANLG) & (0x1C0);
val = val >> 6;
val = (val >= 4) ? 4 : (3 - val);
ucontrol->value.integer.value[0] = val;
static void get_current_sample_rates(struct snd_soc_component *component, int mclk,
u32 *sample_rate_adc, u32 *sample_rate_dac)
{
- int src = snd_soc_component_read32(component, TLV320AIC23_SRATE);
+ int src = snd_soc_component_read(component, TLV320AIC23_SRATE);
int sr = (src >> 2) & 0x0f;
int val = (mclk / bosr_usb_divisor_table[src & 3]);
int adc = (val * sr_adc_mult_table[sr]) / SR_MULT;
if (ret < 0)
return ret;
- iface_reg = snd_soc_component_read32(component, TLV320AIC23_DIGT_FMT) & ~(0x03 << 2);
+ iface_reg = snd_soc_component_read(component, TLV320AIC23_DIGT_FMT) & ~(0x03 << 2);
switch (params_width(params)) {
case 16:
struct snd_soc_component *component = dai->component;
u16 reg;
- reg = snd_soc_component_read32(component, TLV320AIC23_DIGT);
+ reg = snd_soc_component_read(component, TLV320AIC23_DIGT);
if (mute)
reg |= TLV320AIC23_DACM_MUTE;
struct snd_soc_component *component = codec_dai->component;
u16 iface_reg;
- iface_reg = snd_soc_component_read32(component, TLV320AIC23_DIGT_FMT) & (~0x03);
+ iface_reg = snd_soc_component_read(component, TLV320AIC23_DIGT_FMT) & (~0x03);
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
static int tlv320aic23_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
- u16 reg = snd_soc_component_read32(component, TLV320AIC23_PWR) & 0x17f;
+ u16 reg = snd_soc_component_read(component, TLV320AIC23_PWR) & 0x17f;
switch (level) {
case SND_SOC_BIAS_ON:
struct aic26 *aic26 = dev_get_drvdata(dev);
int val, amp, freq, len;
- val = snd_soc_component_read32(aic26->component, AIC26_REG_AUDIO_CTRL2);
+ val = snd_soc_component_read(aic26->component, AIC26_REG_AUDIO_CTRL2);
amp = (val >> 12) & 0x7;
freq = (125 << ((val >> 8) & 0x7)) >> 1;
len = 2 * (1 + ((val >> 4) & 0xf));
snd_soc_component_write(component, AIC26_REG_POWER_CTRL, 0);
/* Audio Control 3 (master mode, fsref rate) */
- reg = snd_soc_component_read32(component, AIC26_REG_AUDIO_CTRL3);
+ reg = snd_soc_component_read(component, AIC26_REG_AUDIO_CTRL3);
reg &= ~0xf800;
reg |= 0x0800; /* set master mode */
snd_soc_component_write(component, AIC26_REG_AUDIO_CTRL3, reg);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
- val = snd_soc_component_read32(component, AIC32X4_DINCTL);
+ val = snd_soc_component_read(component, AIC32X4_DINCTL);
ucontrol->value.integer.value[0] = (val & 0x01);
u8 val;
u8 gpio_check;
- val = snd_soc_component_read32(component, AIC32X4_DOUTCTL);
+ val = snd_soc_component_read(component, AIC32X4_DOUTCTL);
gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
printk(KERN_ERR "%s: MFP2 is not configure as a GPIO output\n",
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
- val = snd_soc_component_read32(component, AIC32X4_SCLKCTL);
+ val = snd_soc_component_read(component, AIC32X4_SCLKCTL);
ucontrol->value.integer.value[0] = (val & 0x01);
u8 val;
u8 gpio_check;
- val = snd_soc_component_read32(component, AIC32X4_MISOCTL);
+ val = snd_soc_component_read(component, AIC32X4_MISOCTL);
gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
printk(KERN_ERR "%s: MFP4 is not configure as a GPIO output\n",
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
- val = snd_soc_component_read32(component, AIC32X4_GPIOCTL);
+ val = snd_soc_component_read(component, AIC32X4_GPIOCTL);
ucontrol->value.integer.value[0] = ((val & 0x2) >> 1);
return 0;
u8 val;
u8 gpio_check;
- val = snd_soc_component_read32(component, AIC32X4_GPIOCTL);
+ val = snd_soc_component_read(component, AIC32X4_GPIOCTL);
gpio_check = (val & AIC32X4_MFP5_GPIO_OUTPUT);
if (gpio_check != AIC32X4_MFP5_GPIO_OUTPUT) {
printk(KERN_ERR "%s: MFP5 is not configure as a GPIO output\n",
AIC32X4_LDOCTLEN : 0;
snd_soc_component_write(component, AIC32X4_LDOCTL, tmp_reg);
- tmp_reg = snd_soc_component_read32(component, AIC32X4_CMMODE);
+ tmp_reg = snd_soc_component_read(component, AIC32X4_CMMODE);
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36)
tmp_reg |= AIC32X4_LDOIN_18_36;
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED)
* and down for the first capture to work properly. It seems related to
* a HW BUG or some kind of behavior not documented in the datasheet.
*/
- tmp_reg = snd_soc_component_read32(component, AIC32X4_ADCSETUP);
+ tmp_reg = snd_soc_component_read(component, AIC32X4_ADCSETUP);
snd_soc_component_write(component, AIC32X4_ADCSETUP, tmp_reg |
AIC32X4_LADC_EN | AIC32X4_RADC_EN);
snd_soc_component_write(component, AIC32X4_ADCSETUP, tmp_reg);
width = params_width(params);
/* select data word length */
- data = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
+ data = snd_soc_component_read(component, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
switch (width) {
case 16:
break;
static int aic3x_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_component *component = dai->component;
- u8 ldac_reg = snd_soc_component_read32(component, LDAC_VOL) & ~MUTE_ON;
- u8 rdac_reg = snd_soc_component_read32(component, RDAC_VOL) & ~MUTE_ON;
+ u8 ldac_reg = snd_soc_component_read(component, LDAC_VOL) & ~MUTE_ON;
+ u8 rdac_reg = snd_soc_component_read(component, RDAC_VOL) & ~MUTE_ON;
if (mute) {
snd_soc_component_write(component, LDAC_VOL, ldac_reg | MUTE_ON);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
u8 iface_areg, iface_breg;
- iface_areg = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLA) & 0x3f;
- iface_breg = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLB) & 0x3f;
+ iface_areg = snd_soc_component_read(component, AIC3X_ASD_INTF_CTRLA) & 0x3f;
+ iface_breg = snd_soc_component_read(component, AIC3X_ASD_INTF_CTRLB) & 0x3f;
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
* writing one of them and thus caused other one also not
* being written
*/
- pll_c = snd_soc_component_read32(component, AIC3X_PLL_PROGC_REG);
- pll_d = snd_soc_component_read32(component, AIC3X_PLL_PROGD_REG);
+ pll_c = snd_soc_component_read(component, AIC3X_PLL_PROGC_REG);
+ pll_d = snd_soc_component_read(component, AIC3X_PLL_PROGD_REG);
if (pll_c == aic3x_reg[AIC3X_PLL_PROGC_REG].def ||
pll_d == aic3x_reg[AIC3X_PLL_PROGD_REG].def) {
snd_soc_component_write(component, AIC3X_PLL_PROGC_REG, pll_c);