dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support

Add Aspeed AST2400 and AST2600 binding for the Aspeed EDAC driver.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Joel Stanley <joel@jms.id.au>
Link: https://lkml.kernel.org/r/20201207090013.14145-1-troy_lee@aspeedtech.com

diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
index 6a0f3d90d682220df64442618173d3855d40bf54..8ca9e0a049d89ee27aaed14cfddb659a9fe65485 100644 (file)
--- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
+++ b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt
@@ -1,6 +1,6 @@
-Aspeed AST2500 SoC EDAC node
+Aspeed BMC SoC EDAC node
 
-The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error
+The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
 correction check).
 
 The memory controller supports SECDED (single bit error correction, double bit
@@ -11,7 +11,10 @@ Note, the bootloader must configure ECC mode in the memory controller.
 
 
 Required properties:
-- compatible: should be "aspeed,ast2500-sdram-edac"
+- compatible: should be one of
+       - "aspeed,ast2400-sdram-edac"
+       - "aspeed,ast2500-sdram-edac"
+       - "aspeed,ast2600-sdram-edac"
 - reg:        sdram controller register set should be <0x1e6e0000 0x174>
 - interrupts: should be AVIC interrupt #0