drm/amd/display: Have DC manage its own allocation of gamma

Creating plane will also allocate gamma and input TF
Creating stream will also allocate outputTF

Fix issue with gamma not applied
OS may call SetGamma before surface committed, so need to store
in target and apply later.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index aa8e25a9b09e13e1e4a894f296046f9a763c1f43..18f221b0349d6c016924f5a728ababe1953156e8 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2200,7 +2200,6 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream,
                                             const struct drm_connector *connector)
 {
        struct dc_crtc_timing *timing_out = &stream->timing;
-       struct dc_transfer_func *tf = dc_create_transfer_func();
 
        memset(timing_out, 0, sizeof(struct dc_crtc_timing));
 
@@ -2244,9 +2243,8 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream,
 
        stream->output_color_space = get_output_color_space(timing_out);
 
-       tf->type = TF_TYPE_PREDEFINED;
-       tf->tf = TRANSFER_FUNCTION_SRGB;
-       stream->out_transfer_func = tf;
+       stream->out_transfer_func->type = TF_TYPE_PREDEFINED;
+       stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
 }
 
 static void fill_audio_info(struct audio_info *audio_info,

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index ce0747ed0f00876a69eabbe118ed45f809e001ec..3b2ddbd8c054c2caeb42483e0a27ecccef30a7f4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -101,14 +101,16 @@ static void construct(struct dc_stream_state *stream,
        stream->status.link = stream->sink->link;
 
        update_stream_signal(stream);
+
+       stream->out_transfer_func = dc_create_transfer_func();
+       stream->out_transfer_func->type = TF_TYPE_BYPASS;
 }
 
 static void destruct(struct dc_stream_state *stream)
 {
        dc_sink_release(stream->sink);
        if (stream->out_transfer_func != NULL) {
-               dc_transfer_func_release(
-                               stream->out_transfer_func);
+               dc_transfer_func_release(stream->out_transfer_func);
                stream->out_transfer_func = NULL;
        }
 }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
index ade5b8ee9c3c0ead9272204360e9372208ba2b50..959387705965e918efa8e71139de2c62f8342171 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
@@ -38,6 +38,12 @@
 static void construct(struct dc_context *ctx, struct dc_plane_state *plane_state)
 {
        plane_state->ctx = ctx;
+
+       plane_state->gamma_correction = dc_create_gamma();
+       plane_state->gamma_correction->is_identity = true;
+
+       plane_state->in_transfer_func = dc_create_transfer_func();
+       plane_state->in_transfer_func->type = TF_TYPE_BYPASS;
 }
 
 static void destruct(struct dc_plane_state *plane_state)
@@ -175,7 +181,7 @@ void dc_transfer_func_release(struct dc_transfer_func *tf)
        kref_put(&tf->refcount, dc_transfer_func_free);
 }
 
-struct dc_transfer_func *dc_create_transfer_func(void)
+struct dc_transfer_func *dc_create_transfer_func()
 {
        struct dc_transfer_func *tf = kzalloc(sizeof(*tf), GFP_KERNEL);
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index f3341a2399faf346bd4b1b473c694c2fa815cd31..a6cf9ade913103808a7dda33d7be8f5928e8ba05 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -956,9 +956,8 @@ static bool dcn10_set_input_transfer_func(struct pipe_ctx *pipe_ctx,
                tf = plane_state->in_transfer_func;
 
        if (plane_state->gamma_correction &&
-               plane_state->gamma_correction->is_identity)
-               dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
-       else if (plane_state->gamma_correction && dce_use_lut(plane_state->format))
+               !plane_state->gamma_correction->is_identity
+                       && dce_use_lut(plane_state->format))
                dpp_base->funcs->dpp_program_input_lut(dpp_base, plane_state->gamma_correction);
 
        if (tf == NULL)