]> git.proxmox.com Git - qemu.git/commitdiff
tcg/arm: explicitely list clobbered/reserved regs
authorAurelien Jarno <aurelien@aurel32.net>
Fri, 9 Apr 2010 18:52:48 +0000 (20:52 +0200)
committerAurelien Jarno <aurelien@aurel32.net>
Mon, 19 Apr 2010 05:02:53 +0000 (07:02 +0200)
Instead of writing very compact code, declare all registers that are
clobbered or reserved one by one. This makes the code easier to read.

Also declare all the 16 registers to TCG, and mark pc as reserved.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm/tcg-target.c
tcg/arm/tcg-target.h

index e86ed9aeeaaf028c269cc122eb566ede3dda2a41..35f6c473b1ab5986fc589fb7ebbd2a7db84d5fa5 100644 (file)
@@ -39,6 +39,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
     "%r12",
     "%r13",
     "%r14",
+    "%pc",
 };
 #endif
 
@@ -1580,15 +1581,19 @@ void tcg_target_init(TCGContext *s)
         tcg_abort();
 #endif
 
-    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0,
-                    ((2 << TCG_REG_R14) - 1) & ~(1 << TCG_REG_R8));
+    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
     tcg_regset_set32(tcg_target_call_clobber_regs, 0,
-                    ((2 << TCG_REG_R3) - 1) |
-                    (1 << TCG_REG_R12) | (1 << TCG_REG_R14));
+                     (1 << TCG_REG_R0) |
+                     (1 << TCG_REG_R1) |
+                     (1 << TCG_REG_R2) |
+                     (1 << TCG_REG_R3) |
+                     (1 << TCG_REG_R12) |
+                     (1 << TCG_REG_R14));
 
     tcg_regset_clear(s->reserved_regs);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R8);
+    tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
 
     tcg_add_target_add_op_defs(arm_op_defs);
 }
index 6d58de81b0bfd2bbb178048fab52d6045a9e2bbf..a0027b57813188a649378dcc65562431eaf5bbff 100644 (file)
@@ -44,9 +44,10 @@ enum {
     TCG_REG_R12,
     TCG_REG_R13,
     TCG_REG_R14,
+    TCG_REG_PC,
 };
 
-#define TCG_TARGET_NB_REGS 15
+#define TCG_TARGET_NB_REGS 16
 
 #define TCG_CT_CONST_ARM 0x100