]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
drm/i915: move rps irq disable one level up
authorImre Deak <imre.deak@intel.com>
Wed, 19 Nov 2014 13:30:02 +0000 (15:30 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 19 Nov 2014 14:03:11 +0000 (15:03 +0100)
We disable the RPS interrupts for all platforms at the same spot, so
move it one level up in the callstack to simplify things.

No functional change.

v2:
- rebase on the GEN9 patches where RPS isn't supported yet, so we don't
  need to disable RPS interrupts on it (Paulo)
v3:
- avoid disabling the interrupts on GEN>9 too (Paulo)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c

index 4e39d74541e8ae0c8f58185de6a821f16fffcad1..cdd00f156826c1a8f8ec3b186f66b04d99c9cb65 100644 (file)
@@ -4526,8 +4526,6 @@ static void gen6_disable_rps(struct drm_device *dev)
 
        I915_WRITE(GEN6_RC_CONTROL, 0);
        I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
-
-       gen6_disable_rps_interrupts(dev);
 }
 
 static void cherryview_disable_rps(struct drm_device *dev)
@@ -4535,8 +4533,6 @@ static void cherryview_disable_rps(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        I915_WRITE(GEN6_RC_CONTROL, 0);
-
-       gen6_disable_rps_interrupts(dev);
 }
 
 static void valleyview_disable_rps(struct drm_device *dev)
@@ -4550,8 +4546,6 @@ static void valleyview_disable_rps(struct drm_device *dev)
        I915_WRITE(GEN6_RC_CONTROL, 0);
 
        gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
-
-       gen6_disable_rps_interrupts(dev);
 }
 
 static void intel_print_rc6_info(struct drm_device *dev, u32 mode)
@@ -6230,6 +6224,14 @@ void intel_disable_gt_powersave(struct drm_device *dev)
                        valleyview_disable_rps(dev);
                else
                        gen6_disable_rps(dev);
+
+               /*
+                * TODO: disable RPS interrupts on GEN9+ too once RPS support
+                * is added for it.
+                */
+               if (INTEL_INFO(dev)->gen < 9)
+                       gen6_disable_rps_interrupts(dev);
+
                dev_priv->rps.enabled = false;
                mutex_unlock(&dev_priv->rps.hw_lock);
        }