arm64: dts: uniphier: add Denali NAND controller nodes

Add NAND controller node to LD11 and LD20.  Neither of them supports
the CS1 line, so pinctrl is set up for a single CS line.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
index bc3099a0d38f1dcf94f058d5a8fd9c54d954ec6f..2452b2243f42465476b65891d6a0df6bc5ffda37 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
@@ -68,3 +68,7 @@
 &usb2 {
        status = "okay";
 };
+
+&nand {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5cf90434d07d3733e6d3f7afdc9fdc257d255cfd..166d121ce3a7ff05512f3b7e700115e0e774a7cc 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -372,6 +372,17 @@
                                compatible = "socionext,uniphier-wdt";
                        };
                };
+
+               nand: nand@68000000 {
+                       compatible = "socionext,uniphier-denali-nand-v5b";
+                       status = "disabled";
+                       reg-names = "nand_data", "denali_reg";
+                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       interrupts = <0 65 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
+                       clocks = <&sys_clk 2>;
+               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 763c4d86b12c7efa17e76d3297d7e64f89c1729f..fc2bc9d75d35e6f410a6f012b461cdcac03d6282 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -50,3 +50,7 @@
 &i2c0 {
        status = "okay";
 };
+
+&nand {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 73e468bcaa3513a03e507f398764c09cf6697c00..58f8fdfc137c6046bf67f0a5d3fb9aa971023223 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -393,6 +393,17 @@
                                compatible = "socionext,uniphier-wdt";
                        };
                };
+
+               nand: nand@68000000 {
+                       compatible = "socionext,uniphier-denali-nand-v5b";
+                       status = "disabled";
+                       reg-names = "nand_data", "denali_reg";
+                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       interrupts = <0 65 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
+                       clocks = <&sys_clk 2>;
+               };
        };
 };