]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/commitdiff
i40e: Do not disable queues in the Legacy/MSI Interrupt handler
authorAnjali Singhai Jain <anjali.singhai@intel.com>
Fri, 15 Jan 2016 22:33:16 +0000 (14:33 -0800)
committerTim Gardner <tim.gardner@canonical.com>
Wed, 6 Apr 2016 09:20:41 +0000 (10:20 +0100)
BugLink: http://bugs.launchpad.net/bugs/1547674
The queues should never be enabled/disabled in the interrupt handler,
ICR0 interrupt enable should be the only thing that needs to be
dynamically changed in the handler.

This patch fixes that. Without this patch X722 platforms were
seeing weird ping timings when in Legacy mode since it takes
a whole lot of time for the HW/FW to re-enable queues.

Change-ID: If065afc45d81c5a19d4a94a00cd5b8f61cefc40c
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
(cherry picked from net-next commit a16ae2d59c290b0c545edb9bf41ac9cf88352ee0)
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
drivers/net/ethernet/intel/i40e/i40e_main.c
drivers/net/ethernet/intel/i40e/i40e_txrx.c

index ae95800a4847a53591ead2eab2a6e2ac6e6faac8..5c0f793042e774bda0052861edd7bb1d1fed3244 100644 (file)
@@ -3462,16 +3462,12 @@ static irqreturn_t i40e_intr(int irq, void *data)
                struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
                struct i40e_q_vector *q_vector = vsi->q_vectors[0];
 
-               /* temporarily disable queue cause for NAPI processing */
-               u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
-
-               qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
-               wr32(hw, I40E_QINT_RQCTL(0), qval);
-
-               qval = rd32(hw, I40E_QINT_TQCTL(0));
-               qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
-               wr32(hw, I40E_QINT_TQCTL(0), qval);
-
+               /* We do not have a way to disarm Queue causes while leaving
+                * interrupt enabled for all other causes, ideally
+                * interrupt should be disabled while we are in NAPI but
+                * this is not a performance path and napi_schedule()
+                * can deal with rescheduling.
+                */
                if (!test_bit(__I40E_DOWN, &pf->state))
                        napi_schedule_irqoff(&q_vector->napi);
        }
index f308011ed9233a85b1aaecb0691a4cddf9fec0c1..284ffab74d9f6669e9ea08ada1ff793dff9022e4 100644 (file)
@@ -2052,19 +2052,6 @@ tx_only:
        if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
                i40e_update_enable_itr(vsi, q_vector);
        } else { /* Legacy mode */
-               struct i40e_hw *hw = &vsi->back->hw;
-               /* We re-enable the queue 0 cause, but
-                * don't worry about dynamic_enable
-                * because we left it on for the other
-                * possible interrupts during napi
-                */
-               u32 qval = rd32(hw, I40E_QINT_RQCTL(0)) |
-                          I40E_QINT_RQCTL_CAUSE_ENA_MASK;
-
-               wr32(hw, I40E_QINT_RQCTL(0), qval);
-               qval = rd32(hw, I40E_QINT_TQCTL(0)) |
-                      I40E_QINT_TQCTL_CAUSE_ENA_MASK;
-               wr32(hw, I40E_QINT_TQCTL(0), qval);
                i40e_irq_dynamic_enable_icr0(vsi->back, false);
        }
        return 0;