cpu: Remove CPU_COMMON

This macro is now always empty, so remove it.  This leaves the
entire contents of CPUArchState under the control of the guest
architecture.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 006f8db9cfac674da856942408abe5b5f44b9786..9bc713a70b2968d1eacb5cd526913e309edc8419 100644 (file)
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -231,8 +231,6 @@ typedef struct CPUTLB { } CPUTLB;
 
 #endif  /* !CONFIG_USER_ONLY && CONFIG_TCG */
 
-#define CPU_COMMON  /* Nothing */
-
 /*
  * This structure must be placed in ArchCPU immedately
  * before CPUArchState, as a field named "neg".

diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 94fbc00a3bc3e1a57efceef5116c38d8bd755698..5d6fb222b5db073172d1c24ee795ba34d76cf52e 100644 (file)
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -251,9 +251,6 @@ struct CPUAlphaState {
     /* This alarm doesn't exist in real hardware; we wish it did.  */
     uint64_t alarm_expire;
 
-    /* Those resources are used only in QEMU core */
-    CPU_COMMON
-
     int error_code;
 
     uint32_t features;

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5965c52f0c3268843df58f3e8b31af8b9e40222a..8fa9772c9dae23b36a150f144683a0b9dc70d485 100644 (file)
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -645,9 +645,7 @@ typedef struct CPUARMState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
-    /* Fields after CPU_COMMON are preserved across CPU reset. */
+    /* Fields after this point are preserved across CPU reset. */
 
     /* Internal CPU feature flags.  */
     uint64_t features;

diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index ad93d1a9ee4752df0c37c68e7f20eee62b479c52..9d2a80d995b120fba9d0196c5b7dd1332b449c2a 100644 (file)
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -163,8 +163,6 @@ typedef struct CPUCRISState {
         /* Fields up to this point are cleared by a CPU reset */
         struct {} end_reset_fields;
 
-        CPU_COMMON
-
         /* Members from load_info on are preserved across resets.  */
         void *load_info;
 } CPUCRISState;

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index f7c6205218755ffc4da6ee17aacb2a36fe40c27b..c7db2eca9ae580995eaf3d61de10c194af635f8d 100644 (file)
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -197,9 +197,6 @@ struct CPUHPPAState {
     target_ureg cr_back[2];  /* back of cr17/cr18 */
     target_ureg shadow[7];   /* shadow registers */
 
-    /* Those resources are used only in QEMU core */
-    CPU_COMMON
-
     /* ??? The number of entries isn't specified by the architecture.  */
     /* ??? Implement a unified itlb/dtlb for the moment.  */
     /* ??? We should use a more intelligent data structure.  */

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e7580a86e5d28d958aa08acfcd76094fb367c602..edad6e1efb7fe6ac5c3c5b343c27e425b56e829b 100644 (file)
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1289,9 +1289,7 @@ typedef struct CPUX86State {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
-    /* Fields after CPU_COMMON are preserved across CPU reset. */
+    /* Fields after this point are preserved across CPU reset. */
 
     /* processor features (e.g. for CPUID insn) */
     /* Minimum level/xlevel/xlevel2, based on CPU model + features */

diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index 324bc90f81f43731130f5ac0bb6798a2b25385af..3e10a693a369783872fa8b3f938fea5418e3880f 100644 (file)
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -159,8 +159,6 @@ struct CPULM32State {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     uint32_t eba;       /* exception base address */
     uint32_t deba;      /* debug exception base address */

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index d92263b7506204a94e45b7e51106061920ee4066..1ebd360afb34c259d8f454fe4f7fef06eb602379 100644 (file)
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -143,8 +143,6 @@ typedef struct CPUM68KState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     uint32_t features;
 } CPUM68KState;

diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index d90c4fbcb50b57fd449c721dbcce7fd04dc5c83e..98b4d915d720706e5b6d7efcc5ce98f73af87bdd 100644 (file)
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -266,8 +266,6 @@ struct CPUMBState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* These fields are preserved on reset.  */
 
     struct {

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 62af24937d5ed94d39658a0136a7caaa84664d5e..bbf1aa8b0d3f7a4391b824770d195867b6550fd1 100644 (file)
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1041,8 +1041,6 @@ struct CPUMIPSState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     CPUMIPSMVPContext *mvp;
 #if !defined(CONFIG_USER_ONLY)

diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index c6b681531d00327d6042d3c4ada59030eb4e25b7..2b596d5d45b80177a49ced124a535325c92e7398 100644 (file)
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -45,9 +45,6 @@ typedef struct CPUMoxieState {
 
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
-
-    CPU_COMMON
-
 } CPUMoxieState;
 
 #include "qom/cpu.h"

diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 8cc3d4971e5ed84245d0e6bace50261bb83115fc..e40ee27e5392dea4b15f7b849b42577b31fad19c 100644 (file)
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -167,8 +167,6 @@ struct CPUNios2State {
 
     uint32_t irq_pending;
 #endif
-
-    CPU_COMMON
 };
 
 /**

diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 51723e9312e6f96e12909296ea60eb9322c3af55..9b80834d68907fc5e786190cabf7d9783b560040 100644 (file)
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -286,8 +286,6 @@ typedef struct CPUOpenRISCState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     uint32_t cpucfgr;         /* CPU configure register */
 

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index e8962e4655f5a11927cb3aae072bab16d98fd661..c93ebc4c1024c5fd703aeaf7444f5e1885a55b6b 100644 (file)
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -999,8 +999,6 @@ struct CPUPPCState {
     /* when a memory exception occurs, the access type is stored here */
     int access_type;
 
-    CPU_COMMON
-
     /* MMU context - only relevant for full system emulation */
 #if !defined(CONFIG_USER_ONLY)
 #if defined(TARGET_PPC64)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0ed7031915201601614a8cb563ba4aeac2fc450f..a935b17dbddf03480101ee635b74100628147d41 100644 (file)
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -171,9 +171,6 @@ struct CPURISCVState {
 
     float_status fp_status;
 
-    /* QEMU */
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     QEMUTimer *timer; /* Internal timer */
 };

diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 21688b7c8ce2a633ec5258ab5bdecd3e4b434630..cb103bc3e7a5c0a6f939e3ffec3e110732304942 100644 (file)
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -114,8 +114,6 @@ struct CPUS390XState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
 #if !defined(CONFIG_USER_ONLY)
     uint32_t core_id; /* PoP "CPU address", same as cpu_index */
     uint64_t cpuid;

diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index e266db411f7f6c17130e737e64dfe40e1217fd14..08cf275f79b28f8d50bb649c2bb885ed32465da8 100644 (file)
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -179,8 +179,6 @@ typedef struct CPUSH4State {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved over CPU reset. */
     int id;                    /* CPU model */
 

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index a3c4f47d40ca9eb8e902b36e78cba0635b850c6f..49e0349a81b36c6d5fbd583c11df4652f9077a57 100644 (file)
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -446,8 +446,6 @@ struct CPUSPARCState {
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
 
-    CPU_COMMON
-
     /* Fields from here on are preserved across CPU reset. */
     target_ulong version;
     uint32_t nwindows;

diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index deb3e836ea41dda7b1095defcb2714bf9b2afbcc..c2acb43c2bfccb6507f674dfabb2221f4931a628 100644 (file)
--- a/target/tilegx/cpu.h
+++ b/target/tilegx/cpu.h
@@ -93,8 +93,6 @@ typedef struct CPUTLGState {
 
     /* Fields up to this point are cleared by a CPU reset */
     struct {} end_reset_fields;
-
-    CPU_COMMON
 } CPUTLGState;
 
 #include "qom/cpu.h"

diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index 03b293c1f69dc398cd52c0a3b0aafaeb70c6018b..52b07c73bf82c9f6fde24bba6f6fccd758a273cb 100644 (file)
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -184,8 +184,6 @@ struct CPUTriCoreState {
     int error_code;
     uint32_t hflags;    /* CPU State */
 
-    CPU_COMMON
-
     /* Internal CPU feature flags.  */
     uint64_t features;
 

diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h
index 39beb3236688e0af9790a309308fead06c029475..6b459dacdeacd4befcd8d60ffdb9eb149443a3ae 100644 (file)
--- a/target/unicore32/cpu.h
+++ b/target/unicore32/cpu.h
@@ -55,8 +55,6 @@ typedef struct CPUUniCore32State {
         float_status fp_status;
     } ucf64;
 
-    CPU_COMMON
-
     /* Internal CPU feature flags.  */
     uint32_t features;
 

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index e2d7e8371d3d5d245e78d84397b2dfc340c6edc8..bfc6604b76ebca697a883ca0c973f23730fcad53 100644 (file)
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -541,8 +541,6 @@ typedef struct CPUXtensaState {
 
     /* Watchpoints for DBREAK registers */
     struct CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK];
-
-    CPU_COMMON
 } CPUXtensaState;
 
 /**