]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
bnxt_en: Query firmware capability to support aRFS on 57500 chips.
authorMichael Chan <michael.chan@broadcom.com>
Sun, 5 May 2019 11:17:06 +0000 (07:17 -0400)
committerDavid S. Miller <davem@davemloft.net>
Mon, 6 May 2019 04:42:17 +0000 (21:42 -0700)
Query support for the aRFS ring table index in the firmware.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnxt/bnxt.c
drivers/net/ethernet/broadcom/bnxt/bnxt.h

index cdbadc6349476364a78a2593111b5b9c35307000..c9dad7c9905b30736d053cadcdc3298802fdd8e5 100644 (file)
@@ -6621,6 +6621,34 @@ static int bnxt_hwrm_func_qcaps(struct bnxt *bp)
        return 0;
 }
 
+static int bnxt_hwrm_cfa_adv_flow_mgnt_qcaps(struct bnxt *bp)
+{
+       struct hwrm_cfa_adv_flow_mgnt_qcaps_input req = {0};
+       struct hwrm_cfa_adv_flow_mgnt_qcaps_output *resp;
+       int rc = 0;
+       u32 flags;
+
+       if (!(bp->fw_cap & BNXT_FW_CAP_CFA_ADV_FLOW))
+               return 0;
+
+       resp = bp->hwrm_cmd_resp_addr;
+       bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_CFA_ADV_FLOW_MGNT_QCAPS, -1, -1);
+
+       mutex_lock(&bp->hwrm_cmd_lock);
+       rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
+       if (rc)
+               goto hwrm_cfa_adv_qcaps_exit;
+
+       flags = le32_to_cpu(resp->flags);
+       if (flags &
+           CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RFS_RING_TBL_IDX_SUPPORTED)
+               bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX;
+
+hwrm_cfa_adv_qcaps_exit:
+       mutex_unlock(&bp->hwrm_cmd_lock);
+       return rc;
+}
+
 static int bnxt_hwrm_func_reset(struct bnxt *bp)
 {
        struct hwrm_func_reset_input req = {0};
@@ -6753,6 +6781,10 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp)
            VER_GET_RESP_DEV_CAPS_CFG_TRUSTED_VF_SUPPORTED)
                bp->fw_cap |= BNXT_FW_CAP_TRUSTED_VF;
 
+       if (dev_caps_cfg &
+           VER_GET_RESP_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED)
+               bp->fw_cap |= BNXT_FW_CAP_CFA_ADV_FLOW;
+
 hwrm_ver_get_exit:
        mutex_unlock(&bp->hwrm_cmd_lock);
        return rc;
@@ -9063,8 +9095,11 @@ static bool bnxt_can_reserve_rings(struct bnxt *bp)
 /* If the chip and firmware supports RFS */
 static bool bnxt_rfs_supported(struct bnxt *bp)
 {
-       if (bp->flags & BNXT_FLAG_CHIP_P5)
+       if (bp->flags & BNXT_FLAG_CHIP_P5) {
+               if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX)
+                       return true;
                return false;
+       }
        if (BNXT_PF(bp) && !BNXT_CHIP_TYPE_NITRO_A0(bp))
                return true;
        if (bp->flags & BNXT_FLAG_NEW_RSS_CAP)
@@ -10665,6 +10700,12 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                rc = -1;
                goto init_err_pci_clean;
        }
+
+       rc = bnxt_hwrm_cfa_adv_flow_mgnt_qcaps(bp);
+       if (rc)
+               netdev_warn(bp->dev, "hwrm query adv flow mgnt failure rc: %d\n",
+                           rc);
+
        rc = bnxt_init_mac_addr(bp);
        if (rc) {
                dev_err(&pdev->dev, "Unable to initialize mac address.\n");
index bc4c37ad12b1cd30fd6632228b708c5f40a3810b..eca36dd6b751ee5c37569d2f5d2229a435914ad9 100644 (file)
@@ -1483,6 +1483,8 @@ struct bnxt {
        #define BNXT_FW_CAP_OVS_64BIT_HANDLE            0x00000400
        #define BNXT_FW_CAP_TRUSTED_VF                  0x00000800
        #define BNXT_FW_CAP_PKG_VER                     0x00004000
+       #define BNXT_FW_CAP_CFA_ADV_FLOW                0x00008000
+       #define BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX        0x00010000
        #define BNXT_FW_CAP_PCIE_STATS_SUPPORTED        0x00020000
        #define BNXT_FW_CAP_EXT_STATS_SUPPORTED         0x00040000