At probe the uartlite is getting configured.
Enable the clocks before assiging uart and
disable after probe is done.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
pdata->clk = NULL;
}
- ret = clk_prepare(pdata->clk);
+ ret = clk_prepare_enable(pdata->clk);
if (ret) {
dev_err(&pdev->dev, "Failed to prepare clock\n");
return ret;
}
- return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+ ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+
+ clk_disable(pdata->clk);
+
+ return ret;
}
static int ulite_remove(struct platform_device *pdev)