[MIPS] Alchemy: kill useless time variables

Since the commit 91a2fcc88634663e9e13dcdfad0e4a860e64aeee ([MIPS]
Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the
Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became
practically useless, so get rid of them at last, renaming cal_r4off()
function into calc_clock() and making it return CPU frequency. Also, make
'no_au1xxx_32khz' variable static...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 79e0b0a51acea821e1df5b6e18991412b1fa4221..12f5458142ae8b0c299b70e4ef8af0f2b96800ab 100644 (file)
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -56,7 +56,7 @@ typedef         unsigned int  uint32;
 #define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
 
 extern unsigned long get_au1x00_uart_baud_base(void);
-extern unsigned long cal_r4koff(void);
+extern unsigned long calc_clock(void);
 
 void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
 {
@@ -64,7 +64,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
                UART16550_WRITE(UART_MOD_CNTRL, 3);
        }
-       cal_r4koff();
+       calc_clock();
 
        /* disable interrupts */
        UART16550_WRITE(UART_IER, 0);

diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 1966964590ab13830c266120b31d9c2b08155eef..57aea3164d9a78518b9ffd4104887cda4fadca6e 100644 (file)
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -48,9 +48,7 @@
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
 
-static unsigned long r4k_offset; /* Amount to increment compare reg each time */
-static unsigned long r4k_cur;    /* What counter should be at next timer irq */
-int    no_au1xxx_32khz;
+static int no_au1xxx_32khz;
 extern int allow_au1k_wait; /* default off for CP0 Counter */
 
 #ifdef CONFIG_PM
@@ -184,7 +182,7 @@ wakeup_counter0_set(int ticks)
  * "wait" is enabled, and we need to detect if the 32KHz isn't present
  * but requested......got it? :-)              -- Dan
  */
-unsigned long cal_r4koff(void)
+unsigned long calc_clock(void)
 {
        unsigned long cpu_speed;
        unsigned long flags;
@@ -229,19 +227,13 @@ unsigned long cal_r4koff(void)
        // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
        set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
        spin_unlock_irqrestore(&time_lock, flags);
-       return (cpu_speed / HZ);
+       return cpu_speed;
 }
 
 void __init plat_time_init(void)
 {
-       unsigned int est_freq;
+       unsigned int est_freq = calc_clock();
 
-       printk("calculating r4koff... ");
-       r4k_offset = cal_r4koff();
-       printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
-
-       //est_freq = 2*r4k_offset*HZ;
-       est_freq = r4k_offset*HZ;
        est_freq += 5000;    /* round */
        est_freq -= est_freq%10000;
        printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
@@ -249,9 +241,6 @@ void __init plat_time_init(void)
        set_au1x00_speed(est_freq);
        set_au1x00_lcd_clock(); // program the LCD clock
 
-       r4k_cur = (read_c0_count() + r4k_offset);
-       write_c0_compare(r4k_cur);
-
 #ifdef CONFIG_PM
        /*
         * setup counter 0, since it keeps ticking after a