]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/nouveau/kms/nv50-: Expose nv50_outp_atom in disp.h
authorLyude Paul <lyude@redhat.com>
Fri, 7 Feb 2020 19:10:46 +0000 (14:10 -0500)
committerLyude Paul <lyude@redhat.com>
Thu, 16 Jul 2020 22:16:32 +0000 (18:16 -0400)
In order to make sure that we flush disable updates at the right time
when disabling CRCs, we'll need to be able to look at the outp state to
see if we're changing it at the same time that we're disabling CRCs.

So, expose the struct in disp.h.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200627194657.156514-8-lyude@redhat.com
drivers/gpu/drm/nouveau/dispnv50/disp.c
drivers/gpu/drm/nouveau/dispnv50/disp.h

index 368069a5b181a72becafb502ade96b0548092cb7..090882794f7d63568cf08e38ffa1c9247791a364 100644 (file)
 
 #include <subdev/bios/dp.h>
 
-/******************************************************************************
- * Atomic state
- *****************************************************************************/
-
-struct nv50_outp_atom {
-       struct list_head head;
-
-       struct drm_encoder *encoder;
-       bool flush_disable;
-
-       union nv50_outp_atom_mask {
-               struct {
-                       bool ctrl:1;
-               };
-               u8 mask;
-       } set, clr;
-};
-
 /******************************************************************************
  * EVO channel
  *****************************************************************************/
index 696e70a6b98b670e567058d185c5ea3c3b34b3e1..c7b72fa850995a5b3870ff2452f312d4367c736b 100644 (file)
@@ -71,6 +71,20 @@ struct nv50_dmac {
        struct mutex lock;
 };
 
+struct nv50_outp_atom {
+       struct list_head head;
+
+       struct drm_encoder *encoder;
+       bool flush_disable;
+
+       union nv50_outp_atom_mask {
+               struct {
+                       bool ctrl:1;
+               };
+               u8 mask;
+       } set, clr;
+};
+
 int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
                     const s32 *oclass, u8 head, void *data, u32 size,
                     u64 syncbuf, struct nv50_dmac *dmac);