#define CPU_INTERRUPT_SIPI 0x800 /* SIPI pending. */
#define CPU_INTERRUPT_MCE 0x1000 /* (x86 only) MCE pending. */
-void cpu_interrupt(CPUState *s, int mask);
+#ifndef CONFIG_USER_ONLY
+typedef void (*CPUInterruptHandler)(CPUState *, int);
+
+extern CPUInterruptHandler cpu_interrupt_handler;
+
+static inline void cpu_interrupt(CPUState *s, int mask)
+{
+ cpu_interrupt_handler(s, mask);
+}
+#else /* USER_ONLY */
+void cpu_interrupt(CPUState *env, int mask);
+#endif /* USER_ONLY */
+
void cpu_reset_interrupt(CPUState *env, int mask);
void cpu_exit(CPUState *s);
#ifndef CONFIG_USER_ONLY
/* mask must never be zero, except for A20 change call */
-void cpu_interrupt(CPUState *env, int mask)
+static void tcg_handle_interrupt(CPUState *env, int mask)
{
int old_mask;
}
}
+CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt;
+
#else /* CONFIG_USER_ONLY */
void cpu_interrupt(CPUState *env, int mask)