drm/amd/display: soc_bound_box -update DML based on HW.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c b/drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c
index 0745366d80bcaccf4117c695adc244994e9e1ffc..d40f6ae9622c59d73f8c2d77773db12c702cc7fd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c
@@ -68,7 +68,6 @@ double dml_socbb_return_bw_mhz(struct _vcs_dpi_soc_bounding_box_st *box, enum vo
 
        return_bw = dml_min(
                        ((double) box->return_bus_width_bytes) * state.dcfclk_mhz,
-                       state.dram_bw_per_chan_gbps * 1000.0 * (double) box->num_chans
-                                       * box->ideal_dram_bw_after_urgent_percent / 100.0);
+                       state.dram_bw_per_chan_gbps * 1000.0 * box->ideal_dram_bw_after_urgent_percent / 100.0);
        return return_bw;
 }