staging: mt7621-pci: remove [ASSERT|DEASSERT]_SYSRST_PCIE macros

Driver is using reset_control kernel API's to manage this so this
two macros are not needed anymore. Remove them.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index 9be5ca109a1bfd6191b3e943df70b937ea122c6a..d94587e1e69974455af99d94313469b24a164a22 100644 (file)
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -94,21 +94,6 @@
 #define RALINK_PCI_MM_MAP_BASE         0x60000000
 #define RALINK_PCI_IO_MAP_BASE         0x1e160000
 
-#define ASSERT_SYSRST_PCIE(val)                \
-       do {                                                            \
-               if (rt_sysc_r32(SYSC_REG_CHIP_REV) == 0x00030101)       \
-                       rt_sysc_m32(0, val, RALINK_RSTCTRL);            \
-               else                                                    \
-                       rt_sysc_m32(val, 0, RALINK_RSTCTRL);            \
-       } while (0)
-#define DEASSERT_SYSRST_PCIE(val)      \
-       do {                                                            \
-               if (rt_sysc_r32(SYSC_REG_CHIP_REV) == 0x00030101)       \
-                       rt_sysc_m32(val, 0, RALINK_RSTCTRL);            \
-               else                                                    \
-                       rt_sysc_m32(0, val, RALINK_RSTCTRL);            \
-       } while (0)
-
 #define RALINK_CLKCFG1                 0x30
 #define RALINK_RSTCTRL                 0x34
 #define RALINK_GPIOMODE                        0x60