KVM: SVM: Tweak order of cr0/cr4/efer writes at RESET/INIT

Hoist svm_set_cr0() up in the sequence of register initialization during
vCPU RESET/INIT, purely to match VMX so that a future patch can move the
sequences to common x86.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210713163324.627647-31-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 9007adeb01fb4e9343a2b754b322d64e816e298f..0afa060798a53b3bcd347af3e0ddabc1fe994a97 100644 (file)
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -1249,18 +1249,13 @@ static void init_vmcb(struct kvm_vcpu *vcpu)
        init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
        init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 
+       svm_set_cr0(vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
        svm_set_cr4(vcpu, 0);
        svm_set_efer(vcpu, 0);
        save->dr6 = 0xffff0ff0;
        kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
        vcpu->arch.regs[VCPU_REGS_RIP] = 0x0000fff0;
 
-       /*
-        * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0.
-        * It also updates the guest-visible cr0 value.
-        */
-       svm_set_cr0(vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
-
        save->cr4 = X86_CR4_PAE;
 
        if (npt_enabled) {