ARM: dts: r8a77470: Add SDHI2 support

Add SoC specific device tree definitions for the SDHI2 interface.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 9aba350f3eaa15509e07eebad6244a22cd696917..9e7f86d42fad847d0cabc1df8331365fb313f72c 100644 (file)
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -412,6 +412,21 @@
                        status = "disabled";
                };
 
+               sdhi2: sd@ee160000 {
+                       compatible = "renesas,sdhi-r8a77470",
+                                    "renesas,rcar-gen2-sdhi";
+                       reg = <0 0xee160000 0 0x328>;
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 312>;
+                       dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+                              <&dmac1 0xd3>, <&dmac1 0xd4>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <97500000>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 312>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1001000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;