iwl_hw_txq_ctx_free(priv);
}
+static void iwl4965_apm_stop(struct iwl_priv *priv)
+{
+ unsigned long flags;
+
+ iwl4965_hw_nic_stop_master(priv);
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
+
+ udelay(10);
+
+ iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+ spin_unlock_irqrestore(&priv->lock, flags);
+}
+
static int iwl4965_apm_reset(struct iwl_priv *priv)
{
int ret = 0;
/* FIXME: put here L1A -L0S w/a */
iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+
ret = iwl_poll_bit(priv, CSR_RESET,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
-
}
#define REG_RECALIB_PERIOD (60)
.apm_ops = {
.init = iwl4965_apm_init,
.reset = iwl4965_apm_reset,
+ .stop = iwl4965_apm_stop,
.config = iwl4965_nic_config,
.set_pwr_src = iwl4965_set_pwr_src,
},
return ret;
}
+/* FIXME: this is indentical to 4965 */
+static void iwl5000_apm_stop(struct iwl_priv *priv)
+{
+ unsigned long flags;
+
+ iwl4965_hw_nic_stop_master(priv);
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
+
+ udelay(10);
+
+ iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+}
+
+
static int iwl5000_apm_reset(struct iwl_priv *priv)
{
int ret = 0;
.apm_ops = {
.init = iwl5000_apm_init,
.reset = iwl5000_apm_reset,
+ .stop = iwl5000_apm_stop,
.config = iwl5000_nic_config,
.set_pwr_src = iwl4965_set_pwr_src,
},
struct {
int (*init)(struct iwl_priv *priv);
int (*reset)(struct iwl_priv *priv);
+ void (*stop)(struct iwl_priv *priv);
void (*config)(struct iwl_priv *priv);
int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src);
} apm_ops;