static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
enum IMXI2CDirection direction)
{
- writeb(s->addr + I2DR_ADDR, (addr << 1) |
- (direction == IMX_I2C_READ ? 1 : 0));
+ qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR,
+ (addr << 1) | (direction == IMX_I2C_READ ? 1 : 0));
}
static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
I2CR_MTX |
I2CR_TXAK;
- writeb(s->addr + I2CR_ADDR, data);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* set the slave address */
imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
- writeb(s->addr + I2SR_ADDR, 0);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
while (size < len) {
/* check we are still busy */
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* write the data */
- writeb(s->addr + I2DR_ADDR, buf[size]);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2DR_ADDR, buf[size]);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
- writeb(s->addr + I2SR_ADDR, 0);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
size++;
/* release the bus */
data &= ~(I2CR_MSTA | I2CR_MTX);
- writeb(s->addr + I2CR_ADDR, data);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) == 0);
}
I2CR_MTX |
I2CR_TXAK;
- writeb(s->addr + I2CR_ADDR, data);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* set the slave address */
imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
g_assert((status & I2SR_RXAK) == 0);
/* ack the interrupt */
- writeb(s->addr + I2SR_ADDR, 0);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
/* set the bus for read */
if (len != 1) {
data &= ~I2CR_TXAK;
}
- writeb(s->addr + I2CR_ADDR, data);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
/* dummy read */
- readb(s->addr + I2DR_ADDR);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
/* ack the interrupt */
- writeb(s->addr + I2SR_ADDR, 0);
- status = readb(s->addr + I2SR_ADDR);
+ qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
while (size < len) {
/* check we are still busy */
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) != 0);
if (size == (len - 1)) {
/* ack the data read */
data |= I2CR_TXAK;
}
- writeb(s->addr + I2CR_ADDR, data);
+ qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
/* read the data */
- buf[size] = readb(s->addr + I2DR_ADDR);
+ buf[size] = qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
if (size != (len - 1)) {
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) != 0);
/* ack the interrupt */
- writeb(s->addr + I2SR_ADDR, 0);
+ qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
}
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IIF) == 0);
size++;
}
- status = readb(s->addr + I2SR_ADDR);
+ status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
g_assert((status & I2SR_IBB) == 0);
}
-I2CAdapter *imx_i2c_create(uint64_t addr)
+I2CAdapter *imx_i2c_create(QTestState *qts, uint64_t addr)
{
IMXI2C *s = g_malloc0(sizeof(*s));
I2CAdapter *i2c = (I2CAdapter *)s;
i2c->send = imx_i2c_send;
i2c->recv = imx_i2c_recv;
+ i2c->qts = qts;
return i2c;
}
{
uint16_t data = addr;
- writew(s->addr + OMAP_I2C_SA, data);
- data = readw(s->addr + OMAP_I2C_SA);
+ qtest_writew(s->parent.qts, s->addr + OMAP_I2C_SA, data);
+ data = qtest_readw(s->parent.qts, s->addr + OMAP_I2C_SA);
g_assert_cmphex(data, ==, addr);
}
omap_i2c_set_slave_addr(s, addr);
data = len;
- writew(s->addr + OMAP_I2C_CNT, data);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data);
data = OMAP_I2C_CON_I2C_EN |
OMAP_I2C_CON_TRX |
OMAP_I2C_CON_MST |
OMAP_I2C_CON_STT |
OMAP_I2C_CON_STP;
- writew(s->addr + OMAP_I2C_CON, data);
- data = readw(s->addr + OMAP_I2C_CON);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
g_assert((data & OMAP_I2C_CON_STP) != 0);
- data = readw(s->addr + OMAP_I2C_STAT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
g_assert((data & OMAP_I2C_STAT_NACK) == 0);
while (len > 1) {
- data = readw(s->addr + OMAP_I2C_STAT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
g_assert((data & OMAP_I2C_STAT_XRDY) != 0);
data = buf[0] | ((uint16_t)buf[1] << 8);
- writew(s->addr + OMAP_I2C_DATA, data);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data);
buf = (uint8_t *)buf + 2;
len -= 2;
}
if (len == 1) {
- data = readw(s->addr + OMAP_I2C_STAT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
g_assert((data & OMAP_I2C_STAT_XRDY) != 0);
data = buf[0];
- writew(s->addr + OMAP_I2C_DATA, data);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data);
}
- data = readw(s->addr + OMAP_I2C_CON);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
g_assert((data & OMAP_I2C_CON_STP) == 0);
}
omap_i2c_set_slave_addr(s, addr);
data = len;
- writew(s->addr + OMAP_I2C_CNT, data);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data);
data = OMAP_I2C_CON_I2C_EN |
OMAP_I2C_CON_MST |
OMAP_I2C_CON_STT |
OMAP_I2C_CON_STP;
- writew(s->addr + OMAP_I2C_CON, data);
- data = readw(s->addr + OMAP_I2C_CON);
+ qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
g_assert((data & OMAP_I2C_CON_STP) == 0);
- data = readw(s->addr + OMAP_I2C_STAT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
g_assert((data & OMAP_I2C_STAT_NACK) == 0);
- data = readw(s->addr + OMAP_I2C_CNT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CNT);
g_assert_cmpuint(data, ==, len);
while (len > 0) {
- data = readw(s->addr + OMAP_I2C_STAT);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
g_assert((data & OMAP_I2C_STAT_RRDY) != 0);
g_assert((data & OMAP_I2C_STAT_ROVR) == 0);
- data = readw(s->addr + OMAP_I2C_DATA);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_DATA);
- stat = readw(s->addr + OMAP_I2C_STAT);
+ stat = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
if (unlikely(len == 1)) {
g_assert((stat & OMAP_I2C_STAT_SBD) != 0);
}
}
- data = readw(s->addr + OMAP_I2C_CON);
+ data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
g_assert((data & OMAP_I2C_CON_STP) == 0);
}
-I2CAdapter *omap_i2c_create(uint64_t addr)
+I2CAdapter *omap_i2c_create(QTestState *qts, uint64_t addr)
{
OMAPI2C *s = g_malloc0(sizeof(*s));
I2CAdapter *i2c = (I2CAdapter *)s;
i2c->send = omap_i2c_send;
i2c->recv = omap_i2c_recv;
+ i2c->qts = qts;
/* verify the mmio address by looking for a known signature */
- data = readw(addr + OMAP_I2C_REV);
+ data = qtest_readw(qts, addr + OMAP_I2C_REV);
g_assert_cmphex(data, ==, 0x34);
return i2c;