]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
drm/radeon/cik: drop cg_update from dpm code
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Dec 2013 19:16:50 +0000 (14:16 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Dec 2013 22:54:25 +0000 (17:54 -0500)
I'm not entirely sure this is required and it won't work
with the dpm restructing anyway.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ci_dpm.c
drivers/gpu/drm/radeon/kv_dpm.c

index 1ed47997635803d9e69bba8b3bd0202ecbc04b0e..f891fc05e11d50556f1c354fedc2c7d0a447c4fd 100644 (file)
@@ -171,8 +171,6 @@ extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
                                                     struct atom_voltage_table *voltage_table);
 extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
 extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
-extern void cik_update_cg(struct radeon_device *rdev,
-                         u32 block, bool enable);
 
 static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev,
                                         struct atom_voltage_table_entry *voltage_table,
@@ -4561,13 +4559,6 @@ int ci_dpm_enable(struct radeon_device *rdev)
        struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
        int ret;
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_MC |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_UVD |
-                            RADEON_CG_BLOCK_HDP), false);
-
        if (ci_is_smc_running(rdev))
                return -EINVAL;
        if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_NONE) {
@@ -4689,13 +4680,6 @@ int ci_dpm_enable(struct radeon_device *rdev)
 
        ci_dpm_powergate_uvd(rdev, true);
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_MC |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_UVD |
-                            RADEON_CG_BLOCK_HDP), true);
-
        ci_update_current_ps(rdev, boot_ps);
 
        return 0;
@@ -4706,12 +4690,6 @@ void ci_dpm_disable(struct radeon_device *rdev)
        struct ci_power_info *pi = ci_get_pi(rdev);
        struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_MC |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_UVD |
-                            RADEON_CG_BLOCK_HDP), false);
-
        ci_dpm_powergate_uvd(rdev, false);
 
        if (!ci_is_smc_running(rdev))
@@ -4742,13 +4720,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev)
        struct radeon_ps *old_ps = &pi->current_rps;
        int ret;
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_MC |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_UVD |
-                            RADEON_CG_BLOCK_HDP), false);
-
        ci_find_dpm_states_clocks_in_dpm_table(rdev, new_ps);
        if (pi->pcie_performance_request)
                ci_request_link_speed_change_before_state_change(rdev, new_ps, old_ps);
@@ -4804,13 +4775,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev)
        if (pi->pcie_performance_request)
                ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_MC |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_UVD |
-                            RADEON_CG_BLOCK_HDP), true);
-
        return 0;
 }
 
index b41905573cd2a431862b3684f4d43ad445ecd15d..a0e20eb963db02a2f45ef3d0860a688516cf2912 100644 (file)
@@ -1126,11 +1126,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
        struct kv_power_info *pi = kv_get_pi(rdev);
        int ret;
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_HDP), false);
-
        ret = kv_process_firmware_header(rdev);
        if (ret) {
                DRM_ERROR("kv_process_firmware_header failed\n");
@@ -1238,11 +1233,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
        kv_dpm_powergate_vce(rdev, true);
        kv_dpm_powergate_uvd(rdev, true);
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_HDP), true);
-
        kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
 
        return ret;
@@ -1250,11 +1240,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
 
 void kv_dpm_disable(struct radeon_device *rdev)
 {
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_HDP), false);
-
        kv_smc_bapm_enable(rdev, false);
 
        /* powerup blocks */
@@ -1779,11 +1764,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
        /*struct radeon_ps *old_ps = &pi->current_rps;*/
        int ret;
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_HDP), false);
-
        if (pi->bapm_enable) {
                ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power);
                if (ret) {
@@ -1849,11 +1829,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
                }
        }
 
-       cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                            RADEON_CG_BLOCK_SDMA |
-                            RADEON_CG_BLOCK_BIF |
-                            RADEON_CG_BLOCK_HDP), true);
-
        return 0;
 }