]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
ARM: dts: Ux500: Add MCDE and Samsung display
authorLinus Walleij <linus.walleij@linaro.org>
Mon, 8 Oct 2018 11:27:55 +0000 (13:27 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 17 Apr 2019 21:18:47 +0000 (23:18 +0200)
This adds and updates the device tree nodes for the MCDE
display controller and connects the Samsung display to
the TVK1281618 user interface board (UIB) so we get
nicely working graphics on this reference design.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi
arch/arm/boot/dts/ste-href-stuib.dtsi
arch/arm/boot/dts/ste-href-tvk1281618.dtsi

index 43d11346308ef85ed11224dc12313278535c4bb4..81fabf031effdca9424239be77bcea575854d25c 100644 (file)
                };
 
                mcde@a0350000 {
-                       compatible = "stericsson,mcde";
-                       reg = <0xa0350000 0x1000>, /* MCDE */
-                             <0xa0351000 0x1000>, /* DSI link 1 */
-                             <0xa0352000 0x1000>, /* DSI link 2 */
-                             <0xa0353000 0x1000>; /* DSI link 3 */
+                       compatible = "ste,mcde";
+                       reg = <0xa0350000 0x1000>;
                        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                       epod-supply = <&db8500_b2r2_mcde_reg>;
+                       vana-supply = <&ab8500_ldo_ana_reg>;
                        clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
                                 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
-                                <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
-                                <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
-                                <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
-                                <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
-                                <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
-                                <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
+                                <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
+                       clock-names = "mcde", "lcd", "hdmi";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       status = "disabled";
+
+                       dsi0: dsi@a0351000 {
+                               compatible = "ste,mcde-dsi";
+                               reg = <0xa0351000 0x1000>;
+                               vana-supply = <&ab8500_ldo_ana_reg>;
+                               clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
+                               clock-names = "hs", "lp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+                       dsi1: dsi@a0352000 {
+                               compatible = "ste,mcde-dsi";
+                               reg = <0xa0352000 0x1000>;
+                               vana-supply = <&ab8500_ldo_ana_reg>;
+                               clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
+                               clock-names = "hs", "lp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+                       dsi2: dsi@a0353000 {
+                               compatible = "ste,mcde-dsi";
+                               reg = <0xa0353000 0x1000>;
+                               vana-supply = <&ab8500_ldo_ana_reg>;
+                               /* This DSI port only has the Low Power / Energy Save clock */
+                               clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
+                               clock-names = "lp";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                cryp@a03cb000 {
index 35e944d8b5c42307c8dbb9f98d34b35a7457cc46..eeaea21f5ecae49de1f4993402ae8ba9fd42bf6a 100644 (file)
                                };
                        };
                };
+
+               mcde@a0350000 {
+                       status = "okay";
+
+                       dsi@a0351000 {
+                               panel {
+                                       compatible = "samsung,s6d16d0";
+                                       reg = <0>;
+                                       vdd1-supply = <&ab8500_ldo_aux1_reg>;
+                                       reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+                               };
+                       };
+               };
        };
 };
index 0e7d77d719d759955a3de5a5231d3fab16c19c0f..76868444caa43cc4db910a7794509c8389e5eec7 100644 (file)
                                };
                        };
                };
+
+               mcde@a0350000 {
+                       status = "okay";
+
+                       dsi@a0351000 {
+                               panel {
+                                       compatible = "samsung,s6d16d0";
+                                       reg = <0>;
+                                       vdd1-supply = <&ab8500_ldo_aux1_reg>;
+                                       reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+                               };
+                       };
+               };
        };
 };