ASoC: fsl_sai: Set SAI Channel Mode to Output Mode

Transmit data pins will output zero when slots are masked or channels
are disabled. In CHMOD TDM mode, transmit data pins are tri-stated when
slots are masked or channels are disabled. When data pins are tri-stated,
there is noise on some channels when FS clock value is high and data is
read while fsclk is transitioning from high to low.

Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/1599112427-22038-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 38c7bcbb361d3728a6185abf35aa67d7ab1e322b..b2d65e53dbc490c23912e5bb6111f3c0f1dcbd7b 100644 (file)
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -489,6 +489,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 
        val_cr4 |= FSL_SAI_CR4_FRSZ(slots);
 
+       /* Set to output mode to avoid tri-stated data pins */
+       if (tx)
+               val_cr4 |= FSL_SAI_CR4_CHMOD;
+
        /*
         * For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
         * generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
@@ -497,7 +501,8 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 
        if (!sai->is_slave_mode && fsl_sai_dir_is_synced(sai, adir)) {
                regmap_update_bits(sai->regmap, FSL_SAI_xCR4(!tx, ofs),
-                                  FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
+                                  FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
+                                  FSL_SAI_CR4_CHMOD_MASK,
                                   val_cr4);
                regmap_update_bits(sai->regmap, FSL_SAI_xCR5(!tx, ofs),
                                   FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
@@ -508,7 +513,8 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
                           FSL_SAI_CR3_TRCE_MASK,
                           FSL_SAI_CR3_TRCE((1 << pins) - 1));
        regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
-                          FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
+                          FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
+                          FSL_SAI_CR4_CHMOD_MASK,
                           val_cr4);
        regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx, ofs),
                           FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |

diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 5f630be748531e609582a5e260d0ae0270be65d4..736a437450c897018ea51b4a64b8c967932ed3f4 100644 (file)
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -119,6 +119,8 @@
 #define FSL_SAI_CR4_FRSZ_MASK  (0x1f << 16)
 #define FSL_SAI_CR4_SYWD(x)    (((x) - 1) << 8)
 #define FSL_SAI_CR4_SYWD_MASK  (0x1f << 8)
+#define FSL_SAI_CR4_CHMOD       BIT(5)
+#define FSL_SAI_CR4_CHMOD_MASK  BIT(5)
 #define FSL_SAI_CR4_MF         BIT(4)
 #define FSL_SAI_CR4_FSE                BIT(3)
 #define FSL_SAI_CR4_FSP                BIT(1)