drm/i915/icl: WaEnableStateCacheRedirectToCS

Redirects the state cache to the CS Command buffer section for
performance reasons.

v2: Rebased
v3: Rebased on top of the WA refactoring
v3: Added References (Mika)

References: HSDES#1604325460
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-3-git-send-email-oscar.mateo@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4eb159faf06db35928612daefc2715bce4fbf609..924b9a6b1cd0def4eab30d4de84bdaa05abc44c9 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7227,6 +7227,7 @@ enum {
 #define  DISABLE_PIXEL_MASK_CAMMING            (1<<14)
 
 #define GEN9_SLICE_COMMON_ECO_CHICKEN1         _MMIO(0x731c)
+#define   GEN11_STATE_CACHE_REDIRECT_TO_CS     (1 << 11)
 
 #define GEN7_L3SQCREG1                         _MMIO(0xB010)
 #define  VLV_B0_WA_L3SQCREG1_VALUE             0x00D30000

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 04aa88506edc60f7682ec2401e8f04869fad402f..1d298035b1d247ada8aa1bc2c76b7a64dd707121 100644 (file)
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -470,6 +470,10 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
                WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
                                  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
 
+       /* WaEnableStateCacheRedirectToCS:icl */
+       WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
+                         GEN11_STATE_CACHE_REDIRECT_TO_CS);
+
        return 0;
 }