arm64/cpufeature: Drop open encodings while extracting parange

Currently there are multiple instances of parange feature width mask open
encodings while fetching it's value. Even the width mask value (0x7) itself
is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in
ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field()
which can extract given standard feature (4 bits width i.e 0xf mask) field.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/1589360614-1164-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index be8a634abdd49f4ffc095425f4621d584376429e..1c5bfe48d381288b2a03ff34890922c6840da956 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2337,7 +2337,8 @@ static void verify_hyp_capabilities(void)
        }
 
        /* Verify IPA range */
-       parange = mmfr0 & 0x7;
+       parange = cpuid_feature_extract_unsigned_field(mmfr0,
+                               ID_AA64MMFR0_PARANGE_SHIFT);
        ipa_max = id_aa64mmfr0_parange_to_phys_shift(parange);
        if (ipa_max < get_kvm_ipa_limit()) {
                pr_crit("CPU%d: IPA range mismatch\n", smp_processor_id());

diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
index d4eb6612bb3c31da6c50195fdf4245d76b2e4a92..d8800ef4f42d8cf8082e70a14eb6b239fcdd8c8f 100644 (file)
--- a/arch/arm64/kvm/reset.c
+++ b/arch/arm64/kvm/reset.c
@@ -340,8 +340,11 @@ u32 get_kvm_ipa_limit(void)
 void kvm_set_ipa_limit(void)
 {
        unsigned int ipa_max, pa_max, va_max, parange;
+       u64 mmfr0;
 
-       parange = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1) & 0x7;
+       mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
+       parange = cpuid_feature_extract_unsigned_field(mmfr0,
+                               ID_AA64MMFR0_PARANGE_SHIFT);
        pa_max = id_aa64mmfr0_parange_to_phys_shift(parange);
 
        /* Clamp the IPA limit to the PA size supported by the kernel */
@@ -387,7 +390,7 @@ void kvm_set_ipa_limit(void)
  */
 int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
 {
-       u64 vtcr = VTCR_EL2_FLAGS;
+       u64 vtcr = VTCR_EL2_FLAGS, mmfr0;
        u32 parange, phys_shift;
        u8 lvls;
 
@@ -403,7 +406,9 @@ int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
                phys_shift = KVM_PHYS_SHIFT;
        }
 
-       parange = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1) & 7;
+       mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
+       parange = cpuid_feature_extract_unsigned_field(mmfr0,
+                               ID_AA64MMFR0_PARANGE_SHIFT);
        if (parange > ID_AA64MMFR0_PARANGE_MAX)
                parange = ID_AA64MMFR0_PARANGE_MAX;
        vtcr |= parange << VTCR_EL2_PS_SHIFT;