]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
authorLukas Wunner <lukas@wunner.de>
Wed, 4 May 2016 21:58:11 +0000 (16:58 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 4 May 2016 21:58:11 +0000 (16:58 -0500)
We cache the PCI_EXP_SLTCAP_HPC bit in pci_dev->is_hotplug_bridge on device
probe, so there's no need to read it again on allocation of port service
devices.

No functional change intended.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/pcie/portdrv_core.c

index 88122dc2e1b1375f1715f8b8ca431673cee8d3e9..847f4fdca50ca1a216eb62b2dcfaa0ba0a63eb80 100644 (file)
@@ -254,7 +254,6 @@ static void cleanup_service_irqs(struct pci_dev *dev)
 static int get_port_device_capability(struct pci_dev *dev)
 {
        int services = 0;
-       u32 reg32;
        int cap_mask = 0;
        int err;
 
@@ -273,19 +272,14 @@ static int get_port_device_capability(struct pci_dev *dev)
        }
 
        /* Hot-Plug Capable */
-       if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
-           pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) {
-               pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
-               if (reg32 & PCI_EXP_SLTCAP_HPC) {
-                       services |= PCIE_PORT_SERVICE_HP;
-                       /*
-                        * Disable hot-plug interrupts in case they have been
-                        * enabled by the BIOS and the hot-plug service driver
-                        * is not loaded.
-                        */
-                       pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
-                               PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
-               }
+       if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) {
+               services |= PCIE_PORT_SERVICE_HP;
+               /*
+                * Disable hot-plug interrupts in case they have been enabled
+                * by the BIOS and the hot-plug service driver is not loaded.
+                */
+               pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
+                         PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
        }
        /* AER capable */
        if ((cap_mask & PCIE_PORT_SERVICE_AER)