drm/bridge: analogix_dp: add fast link train for eDP

We would meet a short black screen when exit PSR with the full link
training, In this case, we should use fast link train instead of full
link training.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
[dropped header reordering]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180309222327.18689-6-enric.balletbo@collabora.com

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index ee00d3d920e0eedf897d679f99e25df4a5dbb73f..d64fcf83af5fa240dfcdb7cde2f0091ff41cf985 100644 (file)
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -15,6 +15,7 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/iopoll.h>
 #include <linux/interrupt.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
@@ -35,6 +36,8 @@
 
 #define to_dp(nm)      container_of(nm, struct analogix_dp_device, nm)
 
+static const bool verify_fast_training;
+
 struct bridge_init {
        struct i2c_client *client;
        struct device_node *node;
@@ -528,7 +531,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
        int lane, lane_count, retval;
        u32 reg;
-       u8 link_align, link_status[2], adjust_request[2];
+       u8 link_align, link_status[2], adjust_request[2], spread;
 
        usleep_range(400, 401);
 
@@ -571,6 +574,20 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
                dev_dbg(dp->dev, "final lane count = %.2x\n",
                        dp->link_train.lane_count);
 
+               retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
+                                          &spread);
+               if (retval != 1) {
+                       dev_err(dp->dev, "failed to read downspread %d\n",
+                               retval);
+                       dp->fast_train_support = false;
+               } else {
+                       dp->fast_train_support =
+                               (spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
+                                       true : false;
+               }
+               dev_dbg(dp->dev, "fast link training %s\n",
+                       dp->fast_train_support ? "supported" : "unsupported");
+
                /* set enhanced mode if available */
                analogix_dp_set_enhanced_mode(dp);
                dp->link_train.lt_state = FINISHED;
@@ -627,10 +644,12 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
        *lane_count = DPCD_MAX_LANE_COUNT(data);
 }
 
-static void analogix_dp_init_training(struct analogix_dp_device *dp,
-                                     enum link_lane_count_type max_lane,
-                                     int max_rate)
+static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
+                                      u32 max_lanes, u32 max_rate)
 {
+       int retval = 0;
+       bool training_finished = false;
+
        /*
         * MACRO_RST must be applied after the PLL_LOCK to avoid
         * the DP inter pair skew issue for at least 10 us
@@ -656,18 +675,13 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
        }
 
        /* Setup TX lane count & rate */
-       if (dp->link_train.lane_count > max_lane)
-               dp->link_train.lane_count = max_lane;
+       if (dp->link_train.lane_count > max_lanes)
+               dp->link_train.lane_count = max_lanes;
        if (dp->link_train.link_rate > max_rate)
                dp->link_train.link_rate = max_rate;
 
        /* All DP analog module power up */
        analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
-}
-
-static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
-{
-       int retval = 0, training_finished = 0;
 
        dp->link_train.lt_state = START;
 
@@ -702,22 +716,88 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
        return retval;
 }
 
-static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
-                                     u32 count, u32 bwtype)
+static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
 {
-       int i;
-       int retval;
+       int i, ret;
+       u8 link_align, link_status[2];
+       enum pll_status status;
 
-       for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
-               analogix_dp_init_training(dp, count, bwtype);
-               retval = analogix_dp_sw_link_training(dp);
-               if (retval == 0)
-                       break;
+       analogix_dp_reset_macro(dp);
 
-               usleep_range(100, 110);
+       analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
+       analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
+
+       for (i = 0; i < dp->link_train.lane_count; i++) {
+               analogix_dp_set_lane_link_training(dp,
+                       dp->link_train.training_lane[i], i);
        }
 
-       return retval;
+       ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status,
+                                status != PLL_UNLOCKED, 120,
+                                120 * DP_TIMEOUT_LOOP_COUNT);
+       if (ret) {
+               DRM_DEV_ERROR(dp->dev, "Wait for pll lock failed %d\n", ret);
+               return ret;
+       }
+
+       /* source Set training pattern 1 */
+       analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
+       /* From DP spec, pattern must be on-screen for a minimum 500us */
+       usleep_range(500, 600);
+
+       analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
+       /* From DP spec, pattern must be on-screen for a minimum 500us */
+       usleep_range(500, 600);
+
+       /* TODO: enhanced_mode?*/
+       analogix_dp_set_training_pattern(dp, DP_NONE);
+
+       /*
+        * Useful for debugging issues with fast link training, disable for more
+        * speed
+        */
+       if (verify_fast_training) {
+               ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED,
+                                       &link_align);
+               if (ret < 0) {
+                       DRM_DEV_ERROR(dp->dev, "Read align status failed %d\n",
+                                     ret);
+                       return ret;
+               }
+
+               ret = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status,
+                                      2);
+               if (ret < 0) {
+                       DRM_DEV_ERROR(dp->dev, "Read link status failed %d\n",
+                                     ret);
+                       return ret;
+               }
+
+               if (analogix_dp_clock_recovery_ok(link_status,
+                                                 dp->link_train.lane_count)) {
+                       DRM_DEV_ERROR(dp->dev, "Clock recovery failed\n");
+                       analogix_dp_reduce_link_rate(dp);
+                       return -EIO;
+               }
+
+               if (analogix_dp_channel_eq_ok(link_status, link_align,
+                                             dp->link_train.lane_count)) {
+                       DRM_DEV_ERROR(dp->dev, "Channel EQ failed\n");
+                       analogix_dp_reduce_link_rate(dp);
+                       return -EIO;
+               }
+       }
+
+       return 0;
+}
+
+static int analogix_dp_train_link(struct analogix_dp_device *dp)
+{
+       if (dp->fast_train_support)
+               return analogix_dp_fast_link_train(dp);
+
+       return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
+                                          dp->video_info.max_link_rate);
 }
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)
@@ -846,10 +926,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
                        DRM_ERROR("failed to disable the panel\n");
        }
 
-       ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
-                                        dp->video_info.max_link_rate);
+       ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
+                                DP_TIMEOUT_TRAINING_US * 5);
        if (ret) {
-               dev_err(dp->dev, "unable to do link train\n");
+               dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
                return;
        }
 

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index e135a42cb19edb8e5318bb59cc58ae7cfacb8ce1..920607d7eb3eec4cd755352482df7e010e5b0567 100644 (file)
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,6 +20,8 @@
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
 
+/* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
+#define DP_TIMEOUT_TRAINING_US                 22000
 #define DP_TIMEOUT_PSR_LOOP_MS                 300
 
 /* DP_MAX_LANE_COUNT */
@@ -171,6 +173,7 @@ struct analogix_dp_device {
        int                     hpd_gpio;
        bool                    force_hpd;
        bool                    psr_enable;
+       bool                    fast_train_support;
 
        struct mutex            panel_lock;
        bool                    panel_is_modeset;