]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
authorDavid Daney <ddaney@caviumnetworks.com>
Wed, 13 May 2009 22:59:55 +0000 (15:59 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 17 Jun 2009 10:06:31 +0000 (11:06 +0100)
Some CPUs have implementation dependent rdhwr registers.  Allow them
to be enabled on a per CPU basis.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu-features.h
arch/mips/kernel/traps.c

index 1cba4b2ffd1e5747132576a80563e2d2656f9069..8ab1d12ba7f4abef4dae8c450b58d1ecc682f1a7 100644 (file)
 #define cpu_scache_line_size() cpu_data[0].scache.linesz
 #endif
 
+#ifndef cpu_hwrena_impl_bits
+#define cpu_hwrena_impl_bits           0
+#endif
+
 #endif /* __ASM_CPU_FEATURES_H */
index e83da174b5333537f5daaf089e9ad2e6d86c2b0f..f54871797ab9cceb6d600e121be18dd06032a665 100644 (file)
@@ -1502,7 +1502,7 @@ void __cpuinit per_cpu_trap_init(void)
                         status_set);
 
        if (cpu_has_mips_r2) {
-               unsigned int enable = 0x0000000f;
+               unsigned int enable = 0x0000000f | cpu_hwrena_impl_bits;
 
                if (!noulri && cpu_has_userlocal)
                        enable |= (1 << 29);