drm/radeon/kms: add accessors for RCU indirect space

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 0f89ce3d02b90d7640c47a9b42f137001c76bcaf..9009dd41d65cf2f7f3c31aea8a2fe963c7bb9b40 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3120,10 +3120,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
                u32 efuse_straps_4;
                u32 efuse_straps_3;
 
-               WREG32(RCU_IND_INDEX, 0x204);
-               efuse_straps_4 = RREG32(RCU_IND_DATA);
-               WREG32(RCU_IND_INDEX, 0x203);
-               efuse_straps_3 = RREG32(RCU_IND_DATA);
+               efuse_straps_4 = RREG32_RCU(0x204);
+               efuse_straps_3 = RREG32_RCU(0x203);
                tmp = (((efuse_straps_4 & 0xf) << 4) |
                      ((efuse_straps_3 & 0xf0000000) >> 28));
        } else {

diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h
index 909219b1bf805c0ad68849f54cc978c64209899e..58c86cc051b1a0a3bf312fca241bb5f0c16ec209 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -31,6 +31,9 @@
 #define R600_PCIE_PORT_INDEX                0x0038
 #define R600_PCIE_PORT_DATA                 0x003c
 
+#define R600_RCU_INDEX                      0x0100
+#define R600_RCU_DATA                       0x0104
+
 #define R600_MC_VM_FB_LOCATION                 0x2180
 #define                R600_MC_FB_BASE_MASK                    0x0000FFFF
 #define                R600_MC_FB_BASE_SHIFT                   0

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ba59d952ba193634b11f7e3dc2d2dcebeb977e4d..5bc10af4e5b4ee0d00143ce9095a66a6e8c56096 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1850,6 +1850,8 @@ void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v);
 #define WREG32_PCIE_PORT(reg, v) rdev->pciep_wreg(rdev, (reg), (v))
 #define RREG32_SMC(reg) tn_smc_rreg(rdev, (reg))
 #define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v))
+#define RREG32_RCU(reg) r600_rcu_rreg(rdev, (reg))
+#define WREG32_RCU(reg, v) r600_rcu_wreg(rdev, (reg), (v))
 #define WREG32_P(reg, val, mask)                               \
        do {                                                    \
                uint32_t tmp_ = RREG32(reg);                    \
@@ -1906,6 +1908,21 @@ static inline void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v)
        WREG32(TN_SMC_IND_DATA_0, (v));
 }
 
+static inline u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg)
+{
+       u32 r;
+
+       WREG32(R600_RCU_INDEX, ((reg) & 0x1fff));
+       r = RREG32(R600_RCU_DATA);
+       return r;
+}
+
+static inline void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v)
+{
+       WREG32(R600_RCU_INDEX, ((reg) & 0x1fff));
+       WREG32(R600_RCU_DATA, (v));
+}
+
 void r100_pll_errata_after_index(struct radeon_device *rdev);