iwlwifi: move some msix and rx functions to a common place

We would like to allow other utlities to init msix and rx.
Put their declarations in a place accessible to other utilities.

Signed-off-by: Golan Ben Ami <golan.ben.ami@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h
index f6726ccef819be4c247c68fba0050d1f7b429db8..b63d44b7cd7c7be1e6a0a3fe0081edc5ea4820b7 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h
@@ -45,6 +45,7 @@
 #include "iwl-debug.h"
 #include "iwl-io.h"
 #include "iwl-op-mode.h"
+#include "iwl-drv.h"
 
 /* We need 2 entries for the TX command and header, and another one might
  * be needed for potential data in the SKB's head. The remaining ones can
@@ -639,6 +640,20 @@ IWL_TRANS_GET_PCIE_TRANS(struct iwl_trans *trans)
        return (void *)trans->trans_specific;
 }
 
+static inline void iwl_pcie_clear_irq(struct iwl_trans *trans,
+                                     struct msix_entry *entry)
+{
+       /*
+        * Before sending the interrupt the HW disables it to prevent
+        * a nested interrupt. This is done by writing 1 to the corresponding
+        * bit in the mask register. After handling the interrupt, it should be
+        * re-enabled by clearing this bit. This register is defined as
+        * write 1 clear (W1C) register, meaning that it's being clear
+        * by writing 1 to the bit.
+        */
+       iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(entry->entry));
+}
+
 static inline struct iwl_trans *
 iwl_trans_pcie_get_trans(struct iwl_trans_pcie *trans_pcie)
 {
@@ -666,6 +681,11 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id);
 irqreturn_t iwl_pcie_irq_rx_msix_handler(int irq, void *dev_id);
 int iwl_pcie_rx_stop(struct iwl_trans *trans);
 void iwl_pcie_rx_free(struct iwl_trans *trans);
+void iwl_pcie_free_rbs_pool(struct iwl_trans *trans);
+void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq);
+int iwl_pcie_dummy_napi_poll(struct napi_struct *napi, int budget);
+void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
+                           struct iwl_rxq *rxq);
 
 /*****************************************************
 * ICT - interrupt handling
@@ -892,6 +912,29 @@ static inline void *iwl_pcie_get_tfd(struct iwl_trans *trans,
        return txq->tfds + trans_pcie->tfd_size * idx;
 }
 
+static inline const char *queue_name(struct device *dev,
+                                    struct iwl_trans_pcie *trans_p, int i)
+{
+       if (trans_p->shared_vec_mask) {
+               int vec = trans_p->shared_vec_mask &
+                         IWL_SHARED_IRQ_FIRST_RSS ? 1 : 0;
+
+               if (i == 0)
+                       return DRV_NAME ": shared IRQ";
+
+               return devm_kasprintf(dev, GFP_KERNEL,
+                                     DRV_NAME ": queue %d", i + vec);
+       }
+       if (i == 0)
+               return DRV_NAME ": default queue";
+
+       if (i == trans_p->alloc_vecs - 1)
+               return DRV_NAME ": exception";
+
+       return devm_kasprintf(dev, GFP_KERNEL,
+                             DRV_NAME  ": queue %d", i);
+}
+
 static inline void iwl_enable_rfkill_int(struct iwl_trans *trans)
 {
        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);

diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
index 59bedb461a8c92fac37888cdea6de7647f562604..d017aa2a0a8bd7bed6c75f5f20da83460cca1c7a 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c
@@ -417,8 +417,8 @@ static struct page *iwl_pcie_rx_alloc_page(struct iwl_trans *trans,
  * iwl_pcie_rxq_restock. The latter function will update the HW to use the newly
  * allocated buffers.
  */
-static void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
-                                  struct iwl_rxq *rxq)
+void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
+                           struct iwl_rxq *rxq)
 {
        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
        struct iwl_rx_mem_buffer *rxb;
@@ -474,7 +474,7 @@ static void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
        }
 }
 
-static void iwl_pcie_free_rbs_pool(struct iwl_trans *trans)
+void iwl_pcie_free_rbs_pool(struct iwl_trans *trans)
 {
        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
        int i;
@@ -986,7 +986,7 @@ static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)
        iwl_pcie_enable_rx_wake(trans, true);
 }
 
-static void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)
+void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)
 {
        lockdep_assert_held(&rxq->lock);
 
@@ -996,7 +996,7 @@ static void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)
        rxq->used_count = 0;
 }
 
-static int iwl_pcie_dummy_napi_poll(struct napi_struct *napi, int budget)
+int iwl_pcie_dummy_napi_poll(struct napi_struct *napi, int budget)
 {
        WARN_ON(1);
        return 0;
@@ -1479,20 +1479,6 @@ static struct iwl_trans_pcie *iwl_pcie_get_trans_pcie(struct msix_entry *entry)
        return container_of(entries, struct iwl_trans_pcie, msix_entries[0]);
 }
 
-static inline void iwl_pcie_clear_irq(struct iwl_trans *trans,
-                                     struct msix_entry *entry)
-{
-       /*
-        * Before sending the interrupt the HW disables it to prevent
-        * a nested interrupt. This is done by writing 1 to the corresponding
-        * bit in the mask register. After handling the interrupt, it should be
-        * re-enabled by clearing this bit. This register is defined as
-        * write 1 clear (W1C) register, meaning that it's being clear
-        * by writing 1 to the bit.
-        */
-       iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(entry->entry));
-}
-
 /*
  * iwl_pcie_rx_msix_handle - Main entry function for receiving responses from fw
  * This interrupt handler should be used with RSS queue only.

diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
index a54c2bc985ad568d3939d004dbd5cc41ce7d96bd..7d319b6863feb2e14e8702907603c3f13b43de53 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
@@ -1709,29 +1709,6 @@ static void iwl_pcie_irq_set_affinity(struct iwl_trans *trans)
        }
 }
 
-static const char *queue_name(struct device *dev,
-                             struct iwl_trans_pcie *trans_p, int i)
-{
-       if (trans_p->shared_vec_mask) {
-               int vec = trans_p->shared_vec_mask &
-                         IWL_SHARED_IRQ_FIRST_RSS ? 1 : 0;
-
-               if (i == 0)
-                       return DRV_NAME ": shared IRQ";
-
-               return devm_kasprintf(dev, GFP_KERNEL,
-                                     DRV_NAME ": queue %d", i + vec);
-       }
-       if (i == 0)
-               return DRV_NAME ": default queue";
-
-       if (i == trans_p->alloc_vecs - 1)
-               return DRV_NAME ": exception";
-
-       return devm_kasprintf(dev, GFP_KERNEL,
-                             DRV_NAME  ": queue %d", i);
-}
-
 static int iwl_pcie_init_msix_handler(struct pci_dev *pdev,
                                      struct iwl_trans_pcie *trans_pcie)
 {