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target/riscv: Set opcode to env->bins for illegal/virtual instruction fault
[mirror_qemu.git] / target / riscv / pmu.c
2023-05-05 Conor Dooleytarget/riscv: fix invalid riscv,event-to-mhpmcounters... blob | commitdiff | raw
2023-05-05 Weiwei Litarget/riscv: Simplify type conversion for CPURISCVState blob | commitdiff | raw | diff to current
2023-05-05 Weiwei Litarget/riscv: Simplify getting RISCVCPU pointer from env blob | commitdiff | raw | diff to current
2022-09-07 Stefan HajnocziMerge tag 'pull-qapi-2022-09-07' of git://repo.or.cz... blob | commitdiff | raw | diff to current
2022-09-07 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20220907' of https:... blob | commitdiff | raw | diff to current
2022-09-07 Atish Patrahw/riscv: virt: Add PMU DT node to the device tree blob | commitdiff | raw | diff to current
2022-09-07 Atish Patratarget/riscv: Add sscofpmf extension support blob | commitdiff | raw | diff to current
2022-07-04 Richard HendersonMerge tag 'kraxel-20220704-pull-request' of https:... blob | commitdiff | raw | diff to current
2022-07-03 Richard HendersonMerge tag 'pull-riscv-to-apply-20220703-1' of github... blob | commitdiff | raw | diff to current
2022-07-03 Atish Patratarget/riscv: Support mcycle/minstret write operation blob | commitdiff | raw | diff to current
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