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hw/riscv: spike: Remove misleading comments
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2023-01-06 Christoph MuellnerRISC-V: Add Zawrs ISA extension support
2023-01-06 Bin Mengtarget/riscv: Clear mstatus.MPRV when leaving M-mode...
2023-01-06 Bin Mengtarget/riscv: Simplify helper_sret() a little bit
2023-01-06 Richard Hendersontarget/riscv: Set pc_succ_insn for !rvc illegal insn
2023-01-06 Bin Mengtarget/riscv: Fix mret exception cause when no pmp...
2023-01-06 Bin Mengtarget/riscv: Add some comments for sstatus CSR in...
2023-01-06 Jim Shutarget/riscv: support cache-related PMU events in virtu...
2023-01-06 Anup Pateltarget/riscv: Typo fix in sstc() predicate
2023-01-06 LIU Zhiweitarget/riscv: Add itrigger_enabled field to CPURISCVState
2023-01-06 LIU Zhiweitarget/riscv: Enable native debug itrigger
2023-01-06 LIU Zhiweitarget/riscv: Add itrigger support when icount is enabled
2023-01-06 LIU Zhiweitarget/riscv: Add itrigger support when icount is not...
2023-01-06 Mayuresh Chitaletarget/riscv: generate virtual instruction exception
2023-01-06 Mayuresh Chitaletarget/riscv: smstateen check for h/s/envcfg
2023-01-06 Mayuresh Chitaletarget/riscv: Add smstateen support
2023-01-06 LIU Zhiweitarget/riscv: Fix PMP propagation for tlb
2022-12-18 Peter MaydellMerge tag 'pull-hex-20221216-1' of https://github.com...
2022-12-18 Peter MaydellMerge tag 'pull-loongarch-20221215' of https://gitlab...
2022-12-17 Peter MaydellMerge tag 'pull-target-arm-20221216' of https://git...
2022-12-16 Peter Maydelltarget/riscv: Convert to 3-phase reset
2022-12-15 Peter MaydellMerge tag 'pull-target-arm-20221215-1' of https://git...
2022-12-15 Peter MaydellMerge tag 'next-8.0-pull-request' of https://gitlab...
2022-12-15 Peter MaydellMerge tag 'pull-misc-2022-12-14' of https://repo.or...
2022-12-14 Markus Armbrustercleanup: Tweak and re-run return_directly.cocci
2022-10-30 Stefan HajnocziMerge tag 'mem-2022-10-28' of https://github.com/davidh...
2022-10-30 Stefan HajnocziMerge tag 'misc-next-pull-request' of https://gitlab...
2022-10-30 Stefan HajnocziMerge tag 'block-pull-request' of https://gitlab.com...
2022-10-30 Stefan HajnocziMerge tag 'qga-pull-2022-10-26' of https://github.com...
2022-10-26 Stefan HajnocziMerge tag 'dump-pull-request' of https://gitlab.com...
2022-10-26 Stefan HajnocziMerge tag 'pull-tcg-20221026' of https://gitlab.com...
2022-10-26 Stefan HajnocziMerge tag 'pull-aspeed-20221025' of https://github...
2022-10-26 Richard Hendersontarget/riscv: Convert to tcg_ops restore_state_to_opc
2022-10-25 Stefan HajnocziMerge tag 'trivial-branch-for-7.2-pull-request' of...
2022-10-24 Bin Mengtreewide: Remove the unnecessary space before semicolon
2022-10-18 Stefan HajnocziMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2022-10-16 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20221014' of https:...
2022-10-14 Alistair Francistarget/riscv: pmp: Fixup TLB size calculation
2022-10-13 Stefan HajnocziMerge tag 'kraxel-20221013-pull-request' of https:...
2022-10-13 Stefan HajnocziMerge tag 'win32-pull-request' of https://gitlab.com...
2022-10-13 Stefan HajnocziMerge tag 'pull-request-2022-10-12' of https://gitlab...
2022-10-13 Stefan HajnocziMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2022-10-12 Stefan HajnocziMerge tag 'for_upstream' of https://git.kernel.org...
2022-10-12 Stefan HajnocziMerge tag 'pull-target-arm-20221010' of https://git...
2022-10-12 Stefan HajnocziMerge tag 'for-upstream' of git://repo.or.cz/qemu/kevin...
2022-10-11 Stefan HajnocziMerge tag 'dump-pull-request' of https://gitlab.com...
2022-10-10 Paolo Bonzinikvm: allow target-specific accelerator properties
2022-10-06 Janosch Frankdump: Replace opaque DumpState pointer with a typed one
2022-10-05 Stefan HajnocziMerge tag 'pull-hex-20221003' of https://github.com...
2022-10-05 Stefan HajnocziMerge tag 'pull-tcg-20221004' of https://gitlab.com...
2022-10-04 Richard Hendersonaccel/tcg: Introduce tb_pc and log_pc
2022-10-04 Richard Hendersonhw/core: Add CPUClass.get_pc
2022-10-04 Stefan HajnocziMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2022-09-28 Stefan HajnocziMerge tag 'linux-user-for-7.2-pull-request' of https...
2022-09-28 Stefan HajnocziMerge tag 'pull-xen-20220927' of https://xenbits.xen...
2022-09-27 Stefan HajnocziMerge tag 'net-pull-request' of https://github.com...
2022-09-27 Stefan HajnocziMerge tag 'm68k-for-7.2-pull-request' of https://github...
2022-09-27 Stefan HajnocziMerge tag 'pull-request-2022-09-26' of https://gitlab...
2022-09-27 Stefan HajnocziMerge tag 'kraxel-20220927-pull-request' of https:...
2022-09-27 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20220927' of https:...
2022-09-27 Yang Liutarget/riscv: rvv-1.0: vf[w]redsum distinguish between...
2022-09-27 Yang Liutarget/riscv: rvv-1.0: Simplify vfwredsum code
2022-09-27 Frank Changtarget/riscv: debug: Add initial support of type 6...
2022-09-27 Frank Changtarget/riscv: debug: Check VU/VS modes for type 2 trigger
2022-09-27 Frank Changtarget/riscv: debug: Create common trigger actions...
2022-09-27 Frank Changtarget/riscv: debug: Introduce tinfo CSR
2022-09-27 Frank Changtarget/riscv: debug: Restrict the range of tselect...
2022-09-27 Frank Changtarget/riscv: debug: Introduce tdata1, tdata2, and...
2022-09-27 Frank Changtarget/riscv: debug: Introduce build_tdata1() to build...
2022-09-27 Frank Changtarget/riscv: debug: Determine the trigger type from...
2022-09-26 Frank Changtarget/riscv: Check the correct exception cause in...
2022-09-26 Alistair Francistarget/riscv: Set the CPU resetvec directly
2022-09-26 Andrew Burgesstarget/riscv: remove fflags, frm, and fcsr from riscv...
2022-09-26 Weiwei Litarget/riscv: fix csr check for cycle{h}, instret{h...
2022-09-26 Rahul Pathaktarget/riscv: Remove sideleg and sedeleg
2022-09-17 Stefan HajnocziMerge tag 'pull-hmp-20220915a' of https://gitlab.com...
2022-09-17 Stefan HajnocziMerge tag 'pull-semi-20220914' of https://gitlab.com...
2022-09-13 Peter Maydelltarget/riscv: Honour -semihosting-config userspace...
2022-09-07 Stefan HajnocziMerge tag 'pull-qapi-2022-09-07' of git://repo.or.cz...
2022-09-07 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20220907' of https:...
2022-09-07 Atish Patratarget/riscv: Update the privilege field for sscofpmf...
2022-09-07 Atish Patrahw/riscv: virt: Add PMU DT node to the device tree
2022-09-07 Atish Patratarget/riscv: Add few cache related PMU events
2022-09-07 Atish Patratarget/riscv: Simplify counter predicate function
2022-09-07 Atish Patratarget/riscv: Add sscofpmf extension support
2022-09-07 Atish Patratarget/riscv: Add vstimecmp support
2022-09-07 Atish Patratarget/riscv: Add stimecmp support
2022-09-07 Atish Patrahw/intc: Move mtimer/mtimecmp to aclint
2022-09-07 Anup Pateltarget/riscv: Use official extension names for AIA...
2022-09-07 Rahul Pathaktarget/riscv: Add xicondops in ISA entry
2022-09-07 Atish Patratarget/riscv: Remove additional priv version check...
2022-09-07 Weiwei Litarget/riscv: Fix priority of csr related check in...
2022-09-07 Dao Lutarget/riscv: Add Zihintpause support
2022-09-07 eopXDtarget/riscv: rvv: Add option 'rvv_ma_all_1s' to enable...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector permuta...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector mask...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector floatin...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector fix...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector integer...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vector integer...
2022-09-07 Yueh-Ting (eop)... target/riscv: rvv: Add mask agnostic for vx instructions
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