]> git.proxmox.com Git - mirror_qemu.git/history - target/riscv
hw/arm/aspeed: Init CPU defaults in a common helper
[mirror_qemu.git] / target / riscv /
2024-01-30 Peter MaydellMerge tag 'qga-pull-2024-01-30' of https://github.com...
2024-01-30 Peter MaydellMerge tag 'pull-tcg-20240130' of https://gitlab.com...
2024-01-29 Richard Hendersoninclude/qemu: Add TCGCPUOps typedef to typedefs.h
2024-01-28 Anton Johanssontarget: Use vaddr in gen_intermediate_code
2024-01-20 Peter MaydellMerge tag 'pull-request-2024-01-19' of https://gitlab...
2024-01-19 Peter MaydellMerge tag 'hw-cpus-20240119' of https://github.com...
2024-01-19 Philippe Mathieu... target/riscv: Rename tcg_cpu_FOO() to include 'riscv'
2024-01-16 Peter MaydellMerge tag 'hppa-fixes-8.2-pull-request' of https:/...
2024-01-11 Peter MaydellMerge tag 'firmware/edk2-20231213-pull-request' of...
2024-01-11 Peter MaydellMerge tag 'pull-target-arm-20240111' of https://git...
2024-01-10 Peter MaydellMerge tag 'pull-riscv-to-apply-20240110' of https:...
2024-01-10 Alistair Francistarget/riscv: Ensure mideleg is set correctly on reset
2024-01-10 Alistair Francistarget/riscv: Don't adjust vscause for exceptions
2024-01-10 Alistair Francistarget/riscv: Assert that the CSR numbers will be correct
2024-01-10 Ivan Klokovtarget/riscv: pmp: Ignore writes when RW=01 and MML=0
2024-01-10 Daniel Henrique... target/riscv/kvm: add RVV and Vector CSR regs
2024-01-10 Daniel Henrique... target/riscv/kvm: do PR_RISCV_V_SET_CONTROL during...
2024-01-10 Yong-Xuan Wangtarget/riscv/kvm.c: remove group setting of KVM AIA...
2024-01-10 Daniel Henrique... target/riscv: add rva22s64 cpu
2024-01-10 Daniel Henrique... target/riscv: add RVA22S64 profile
2024-01-10 Daniel Henrique... target/riscv: add 'parent' in profile description
2024-01-10 Daniel Henrique... target/riscv: add satp_mode profile support
2024-01-10 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_is_32bit()
2024-01-10 Daniel Henrique... target/riscv/cpu.c: finalize satp_mode earlier
2024-01-10 Daniel Henrique... target/riscv: add priv ver restriction to profiles
2024-01-10 Daniel Henrique... target/riscv: implement svade
2024-01-10 Daniel Henrique... target/riscv: add 'rva22u64' CPU
2024-01-10 Daniel Henrique... riscv-qmp-cmds.c: add profile flags in cpu-model-expansion
2024-01-10 Daniel Henrique... target/riscv/tcg: validate profiles during finalize
2024-01-10 Daniel Henrique... target/riscv/tcg: honor user choice for G MISA bits
2024-01-10 Daniel Henrique... target/riscv/tcg: add hash table insert helpers
2024-01-10 Daniel Henrique... target/riscv/tcg: handle profile MISA bits
2024-01-10 Daniel Henrique... target/riscv/tcg: add riscv_cpu_write_misa_bit()
2024-01-10 Daniel Henrique... target/riscv/tcg: add MISA user options hash
2024-01-10 Daniel Henrique... target/riscv/tcg: add user flag for profile support
2024-01-10 Daniel Henrique... target/riscv/kvm: add 'rva22u64' flag as unavailable
2024-01-10 Daniel Henrique... target/riscv: add rva22u64 profile definition
2024-01-10 Daniel Henrique... riscv-qmp-cmds.c: expose named features in cpu_model_ex...
2024-01-10 Daniel Henrique... target/riscv/tcg: add 'zic64b' support
2024-01-10 Daniel Henrique... target/riscv: add zicbop extension flag
2024-01-10 Daniel Henrique... target/riscv: add rv64i CPU
2024-01-10 Daniel Henrique... target/riscv/tcg: update priv_ver on user_set extensions
2024-01-10 Daniel Henrique... target/riscv/tcg: do not use "!generic" CPU checks
2024-01-10 Daniel Henrique... target/riscv: create TYPE_RISCV_VENDOR_CPU
2024-01-10 Weiwei Litarget/riscv: Add support for Zacas extension
2024-01-10 Daniel Henrique... target/riscv/kvm: rename riscv_reg_id() to riscv_reg_id...
2024-01-10 Daniel Henrique... target/riscv/kvm: add RISCV_CONFIG_REG()
2024-01-10 Daniel Henrique... target/riscv/kvm: change timer regs size to u64
2024-01-10 Daniel Henrique... target/riscv/kvm: change KVM_REG_RISCV_FP_D to u64
2024-01-10 Daniel Henrique... target/riscv/kvm: change KVM_REG_RISCV_FP_F to u32
2024-01-10 Daniel Henrique... target/riscv/cpu.c: fix machine IDs getters
2024-01-10 Ivan Klokovtarget/riscv/pmp: Use hwaddr instead of target_ulong...
2024-01-10 LIU Zhiweitarget/riscv: Not allow write mstatus_vs without RVV
2024-01-10 LIU Zhiweitarget/riscv: Fix th.dcache.cval1 priviledge check
2024-01-10 Max Choutarget/riscv: The whole vector register move instructio...
2024-01-10 Max Choutarget/riscv: Add vill check for whole vector register...
2024-01-09 Peter MaydellMerge tag 'block-pull-request' of https://gitlab.com...
2024-01-09 Peter MaydellMerge tag 'pull-replay-fixes-080124-1' of https://gitla...
2024-01-08 Stefan Hajnocziqemu/main-loop: rename QEMU_IOTHREAD_LOCK_GUARD to...
2024-01-08 Peter MaydellMerge tag 'pull-vfio-20240107' of https://github.com...
2024-01-08 Peter MaydellMerge tag 'pull-trivial-patches' of https://gitlab...
2024-01-05 Xu Lutarget/riscv: Fix mcycle/minstret increment behavior
2024-01-05 Peter MaydellMerge tag 'hw-cpus-20240105' of https://github.com...
2024-01-05 Gavin Shantarget: Use generic cpu_model_from_type()
2024-01-05 Gavin Shantarget/riscv: Use generic cpu_list()
2024-01-05 Philippe Mathieu... cpu: Call object_class_dynamic_cast() once in cpu_class...
2024-01-05 Peter MaydellMerge tag 'migration-20240104-pull-request' of https...
2024-01-04 Peter MaydellMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2024-01-04 Peter MaydellMerge tag 'pull-20231230' of https://gitlab.com/rth7680...
2023-12-29 Richard Hendersontarget/riscv: Constify VMState in machine.c
2023-12-26 Stefan HajnocziMerge tag 'for_upstream' of https://git.kernel.org...
2023-12-26 Stefan HajnocziMerge tag 'dirtylimit-dirtyrate-pull-request-20231225...
2023-12-26 Stefan HajnocziMerge tag 'pull-trivial-patches' of https://gitlab...
2023-12-23 Natanael Copatarget/riscv/kvm: do not use non-portable strerrorname_np()
2023-12-12 Stefan HajnocziMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2023-12-05 Stefan HajnocziMerge tag 'pull-ufs-20231205' of https://gitlab.com...
2023-12-04 Stefan HajnocziMerge tag 'misc-fixes-20231204' of https://github.com...
2023-12-04 Daniel Henrique... target/riscv/kvm: fix shadowing in kvm_riscv_(get|put...
2023-11-22 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20231122' of https:...
2023-11-22 Ivan Klokovtarget/riscv/cpu_helper.c: Fix mxr bit behavior
2023-11-22 Ivan Klokovtarget/riscv/cpu_helper.c: Invalid exception on MMU...
2023-11-22 Clément Chigottarget/riscv: don't verify ISA compatibility for zicntr...
2023-11-20 Stefan HajnocziMerge tag '20231119-xtensa-1' of https://github.com...
2023-11-20 Stefan HajnocziMerge tag 'hppa64-fixes-pull-request' of https://github...
2023-11-20 Stefan HajnocziMerge tag 'pull-error-2023-11-17' of https://repo.or...
2023-11-20 Stefan HajnocziMerge tag 'pull-request-2023-11-16' of https://gitlab...
2023-11-20 Stefan HajnocziMerge tag 'pull-trivial-patches' of https://gitlab...
2023-11-15 Michael Tokarevtarget/riscv/cpu.h: spelling fix: separatly
2023-11-10 Stefan HajnocziMerge tag 'xen-virtio-fix-1-tag' of https://gitlab...
2023-11-09 Stefan HajnocziMerge tag 'for-upstream' of https://repo.or.cz/qemu...
2023-11-08 Stefan HajnocziMerge tag 'pull-ppc-20231107' of https://gitlab.com...
2023-11-08 Stefan HajnocziMerge tag 'misc-fixes-pull-request' of https://gitlab...
2023-11-08 Stefan HajnocziMerge tag 'pull-request-2023-11-07' of https://gitlab...
2023-11-08 Stefan HajnocziMerge tag 'misc-cpus-20231107' of https://github.com...
2023-11-07 Philippe Mathieu... hw/cpu: Call object_class_is_abstract() once in cpu_cla...
2023-11-07 Philippe Mathieu... target: Move ArchCPUClass definition to 'cpu.h'
2023-11-07 Philippe Mathieu... target/riscv: Use env_archcpu() in [check_]nanbox()
2023-11-07 Philippe Mathieu... target/riscv: Move TYPE_RISCV_CPU_BASE definition to...
2023-11-07 Philippe Mathieu... target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'
2023-11-07 Philippe Mathieu... target: Unify QOM style
next