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2023-03-05 Richard Hendersontarget/riscv: Avoid tcg_const_*
2023-03-05 Richard Hendersontarget/riscv: Drop tcg_temp_free
2023-03-05 Richard Hendersontarget/riscv: Drop temp_new
2023-03-05 Richard Hendersontarget/riscv: Drop ftemp_new
2023-03-03 Peter MaydellMerge tag 'pull-aspeed-20230302' of https://github...
2023-03-03 Peter MaydellMerge tag 'pull-loongarch-20230303' of https://gitlab...
2023-03-03 Peter MaydellMerge tag 'migration-20230302-pull-request' of https...
2023-03-03 Peter MaydellMerge tag 'for_upstream' of https://git.kernel.org...
2023-03-03 Peter MaydellMerge tag 'pull-riscv-to-apply-20230303' of https:...
2023-03-02 Peter MaydellMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2023-03-02 Peter MaydellMerge tag 'pull-testing-next-010323-1' of https://gitla...
2023-03-02 Peter MaydellMerge tag 'pull-monitor-2023-03-02' of https://repo...
2023-03-02 Peter MaydellMerge tag 'bsd-user-2023q1-pull-request' of gitlab...
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: some vector_helper...
2023-03-02 Daniel Henrique... target/riscv/vector_helper.c: avoid env_archcpu() when...
2023-03-02 Daniel Henrique... target/riscv/vector_helper.c: create vext_set_tail_elem...
2023-03-02 Palmer DabbeltMerge patch series "RISCVCPUConfig related cleanups"
2023-03-02 Daniel Henrique... target/riscv/csr.c: avoid env_archcpu() usages when...
2023-03-02 Daniel Henrique... target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cp...
2023-03-02 Daniel Henrique... target/riscv/csr.c: simplify mctr()
2023-03-02 Daniel Henrique... target/riscv/csr.c: use env_archcpu() in ctr()
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: Add support for Svadu...
2023-03-02 Weiwei Litarget/riscv: Export Svadu property
2023-03-02 Weiwei Litarget/riscv: Add *envcfg.HADE related check in address...
2023-03-02 Weiwei Litarget/riscv: Add *envcfg.PBMTE related check in addres...
2023-03-02 Weiwei Litarget/riscv: Add csr support for svadu
2023-03-02 Weiwei Litarget/riscv: Fix the relationship of PBMTE/STCE fields...
2023-03-02 Weiwei Litarget/riscv: Fix the relationship between menvcfg...
2023-03-02 Weiwei Litarget/riscv: Add support for Zicond extension
2023-03-02 Christoph MüllnerRISC-V: XTheadMemPair: Remove register restrictions...
2023-03-02 Shaobo Songtarget/riscv: Fix checking of whether instruciton at...
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: Various fixes to...
2023-03-02 Bin Mengtarget/riscv: Group all predicate() routines together
2023-03-02 Bin Mengtarget/riscv: Drop priv level check in mseccfg predicate()
2023-03-02 Bin Mengtarget/riscv: Allow debugger to access sstc CSRs
2023-03-02 Bin Mengtarget/riscv: Allow debugger to access {h, s}stateen...
2023-03-02 Bin Mengtarget/riscv: Allow debugger to access seed CSR
2023-03-02 Bin Mengtarget/riscv: Allow debugger to access user timer and...
2023-03-02 Bin Mengtarget/riscv: gdbstub: Drop the vector CSRs in riscv...
2023-03-02 Bin Mengtarget/riscv: gdbstub: Turn on debugger mode before...
2023-03-02 Bin Mengtarget/riscv: Avoid reporting odd-numbered pmpcfgX...
2023-03-02 Bin Mengtarget/riscv: Simplify getting RISCVCPU pointer from env
2023-03-02 Bin Mengtarget/riscv: Simplify {read, write}_pmpcfg() a little bit
2023-03-02 Bin Mengtarget/riscv: Use 'bool' type for read_only
2023-03-02 Bin Mengtarget/riscv: Coding style fixes in csr.c
2023-03-02 Bin Mengtarget/riscv: gdbstub: Do not generate CSR XML if Zicsr...
2023-03-02 Bin Mengtarget/riscv: gdbstub: Minor change for better readability
2023-03-02 Bin Mengtarget/riscv: Use g_assert() for the predicate() NULL...
2023-03-02 Bin Mengtarget/riscv: Add some comments to clarify the priority...
2023-03-02 Bin Mengtarget/riscv: gdbstub: Check priv spec version before...
2023-03-01 Palmer DabbeltMerge patch series "target/riscv: Some updates to float...
2023-03-01 Palmer DabbeltMerge patch series "make write_misa a no-op and FEATURE...
2023-03-01 Weiwei Litarget/riscv: Expose properties for Zv* extensions
2023-03-01 Weiwei Litarget/riscv: Simplify check for EEW = 64 in trans_rvv...
2023-03-01 Weiwei Litarget/riscv: Fix check for vector load/store instructi...
2023-03-01 Weiwei Litarget/riscv: Add support for Zvfh/zvfhmin extensions
2023-03-01 Weiwei Litarget/riscv: Remove redundunt check for zve32f and...
2023-03-01 Weiwei Litarget/riscv: Replace check for F/D to Zve32f/Zve64d...
2023-03-01 Weiwei Litarget/riscv: Simplify check for Zve32f and Zve64f
2023-03-01 Weiwei Litarget/riscv: Indent fixes in cpu.c
2023-03-01 Weiwei Litarget/riscv: Add property check for Zvfh{min} extensions
2023-03-01 Weiwei Litarget/riscv: Fix relationship between V, Zve*, F and D
2023-03-01 Weiwei Litarget/riscv: Add cfg properties for Zv* extensions
2023-03-01 Weiwei Litarget/riscv: Simplify the check for Zfhmin and Zhinxmin
2023-03-01 Weiwei Litarget/riscv: Fix the relationship between Zhinxmin...
2023-03-01 Weiwei Litarget/riscv: Fix the relationship between Zfhmin and Zfh
2023-03-01 Daniel Henrique... target/riscv/cpu: remove CPUArchState::features and...
2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_MMU
2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_PMP
2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_EPMP
2023-03-01 Daniel Henrique... target/riscv/cpu.c: error out if EPMP is enabled withou...
2023-03-01 Daniel Henrique... target/riscv: remove RISCV_FEATURE_DEBUG
2023-03-01 Daniel Henrique... target/riscv: allow MISA writes as experimental
2023-03-01 Daniel Henrique... target/riscv: do not mask unsupported QEMU extensions...
2023-03-01 Daniel Henrique... target/riscv: introduce riscv_cpu_cfg()
2023-03-01 Peter MaydellMerge tag 'pull-tcg-20230301' of https://gitlab.com...
2023-03-01 Richard Hendersonaccel/tcg: Pass max_insn to gen_intermediate_code by...
2023-03-01 Anton Johanssontarget/riscv: Replace `tb_pc()` with `tb->pc`
2023-03-01 Paolo BonziniMerge branch 'xenfv-kvm-15' of git://git.infradead...
2023-02-28 Peter MaydellMerge tag 'buildsys-qom-qdev-ui-20230227' of https...
2023-02-27 Philippe Mathieu... target/riscv/cpu: Move Floating-Point fields closer
2023-02-27 Philippe Mathieu... target/cpu: Restrict do_transaction_failed() handlers...
2023-02-27 Philippe Mathieu... target/cpu: Restrict cpu_get_phys_page_debug() handlers...
2023-02-27 Peter MaydellMerge tag 'for-upstream-8.0' of https://gitlab.com...
2023-02-27 Peter MaydellMerge tag 'pull-request-2023-02-27' of https://gitlab...
2023-02-26 Peter MaydellMerge tag 'pull-riscv-to-apply-20230224' of github...
2023-02-23 LIU Zhiweitarget/riscv: Fix vslide1up.vf and vslide1down.vf
2023-02-23 Daniel Henrique... target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
2023-02-23 Himanshu Chauhantarget/riscv: Smepmp: Skip applying default rules when...
2023-02-23 Frank Changtarget/riscv: Remove privileged spec version restrictio...
2023-02-08 Peter MaydellMerge tag 'pull-tricore-20230208' of https://github...
2023-02-08 Peter MaydellMerge tag 'pull-include-2023-02-06-v2' of https://repo...
2023-02-08 Markus Armbrusterriscv: Clean up includes
2023-02-07 Peter MaydellMerge tag 'for-upstream-py38' of https://gitlab.com...
2023-02-07 Peter MaydellMerge tag 'pull-aspeed-20230207' of https://github...
2023-02-07 Peter MaydellMerge tag 'pull-riscv-to-apply-20230207' of https:...
2023-02-06 Vladimir Isaevtarget/riscv: fix SBI getchar handler for KVM
2023-02-06 Vladimir Isaevtarget/riscv: fix ctzw behavior
2023-02-06 Deepak Guptatarget/riscv: fix for virtual instr exception
2023-02-06 Christoph MüllnerRISC-V: Adding XTheadFmv ISA extension
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