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qapi: Reformat doc comments to conform to current conventions
[mirror_qemu.git] / target / riscv /
2023-05-05 Richard HendersonMerge tag 'pw-pull-request' of https://gitlab.com/marca... tree | commitdiff
2023-05-05 Richard HendersonMerge tag 'migration-20230505-pull-request' of https... tree | commitdiff
2023-05-05 Richard HendersonMerge tag 'pull-riscv-to-apply-20230505-1' of https... tree | commitdiff
2023-05-05 Rahul Pathaktarget/riscv: add Ventana's Veyron V1 CPU tree | commitdiff
2023-05-05 Alexandre Ghitiriscv: Make sure an exception is raised if a pte is... tree | commitdiff
2023-05-05 Irina Ryapolovatarget/riscv: Fix Guest Physical Address Translation tree | commitdiff
2023-05-05 Bin Mengtarget/riscv: Restore the predicate() NULL check behavior tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: add TYPE_RISCV_DYNAMIC_CPU tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: add query-cpy-definitions support tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: add CPU QOM header tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Reorg sum check in get_physical_address tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Reorg access check in get_physical_address tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Merge checks for reserved pte flags tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Don't modify SUM with is_debug tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Suppress pte update with is_debug tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Move leaf pte processing out of level... tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Hoist pbmte and hade out of the level... tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Hoist second stage mode change to callers tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Check SUM in the correct register tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Move hstatus.spvp check to check_access_hlsv tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_2stage tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_priv tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_sum tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Handle HLV, HSV via helpers tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Use cpu_ld*_code_mmu for HLVX tree | commitdiff
2023-05-05 Fei Wutarget/riscv: Reduce overhead of MSTATUS_SUM change tree | commitdiff
2023-05-05 Fei Wutarget/riscv: Separate priv from mmu_idx tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Add a tb flags field for vstart tree | commitdiff
2023-05-05 Richard Hendersontarget/riscv: Remove mstatus_hs_{fs, vs} from tb_flags tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Encode the FS and VS on a normal way... tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Add a general status enum for extensions tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Extract virt enabled state from tb flags tree | commitdiff
2023-05-05 Yi Chentarget/riscv: fix H extension TVM trap tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Use check for relationship between Zdinx... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Legalize MPP value in write_mstatus tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Use PRV_RESERVED instead of PRV_H tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Fix the mstatus.MPP value after executing... tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv/cpu.c: redesign register_cpu_props() tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: add RVG and remove cpu->cfg.ext_g tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cfg.ext_g setup from rv64_thead_c9... tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove riscv_cpu_sync_misa_cfg() tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_v tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_j tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_h tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_u tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_s tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_m tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_e tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_i tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_f tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_d tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_c tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_a tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: introduce riscv_cpu_add_misa_properties() tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: remove MISA properties from isa_edata_arr[] tree | commitdiff
2023-05-05 Daniel Henrique... target/riscv: sync env->misa_ext* with cpu->cfg in... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Fix lines with over 80 characters tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Fix format for comments tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Fix format for indentation tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove riscv_cpu_virt_enabled() tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Set opcode to env->bins for illegal/virtu... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Fix addr type for get_physical_address tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove redundant parentheses tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Convert env->virt to a bool env->virt_enabled tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove check on RVH for riscv_cpu_set_vir... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove check on RVH for riscv_cpu_virt_en... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove redundant check on RVH tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Remove redundant call to riscv_cpu_virt_e... tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Fix itrigger when icount is used tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Add support for Zce tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: expose properties for Zc* extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zcmt extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zcmp extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zcb extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zcd extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zcf extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add support for Zca extension tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: add cfg properties for Zc* extension tree | commitdiff
2023-05-05 Conor Dooleytarget/riscv: fix invalid riscv,event-to-mhpmcounters... tree | commitdiff
2023-05-05 Philipp Tomsichtarget/riscv: redirect XVentanaCondOps to use the Zicon... tree | commitdiff
2023-05-05 Philipp Tomsichtarget/riscv: refactor Zicond support tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Simplify arguments for riscv_csrrw_check tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Simplify type conversion for CPURISCVState tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Simplify getting RISCVCPU pointer from env tree | commitdiff
2023-05-05 LIU Zhiweitarget/riscv: Fix priv version dependency for vector... tree | commitdiff
2023-05-05 Weiwei Litarget/riscv: Avoid env_archcpu() when reading RISCVCPU... tree | commitdiff
2023-03-24 Peter MaydellMerge tag 'qga-pull-2023-03-22' of github.com:kostyanf1... tree | commitdiff
2023-03-15 Peter MaydellMerge tag 'misc-next-pull-request' of https://gitlab... tree | commitdiff
2023-03-14 Peter MaydellMerge tag 'display-pull-request' of https://gitlab... tree | commitdiff
2023-03-14 Peter MaydellMerge tag 'pull-riscv-to-apply-20230314' of https:... tree | commitdiff
2023-03-14 Peter MaydellMerge tag 'trivial-branch-for-8.0-pull-request' of... tree | commitdiff
2023-03-14 Peter MaydellMerge tag 'pull-tcg-20230313' of https://gitlab.com... tree | commitdiff
2023-03-13 Anton Johanssontarget/riscv: Remove `NB_MMU_MODES` define tree | commitdiff
2023-03-12 Peter MaydellMerge tag 'linux-user-for-8.0-pull-request' of https... tree | commitdiff
2023-03-10 Peter MaydellMerge tag 'for_upstream' of https://git.kernel.org... tree | commitdiff
2023-03-10 Peter MaydellMerge tag 'qga-pull-2023-03-08' of github.com:kostyanf1... tree | commitdiff
2023-03-10 Peter MaydellMerge tag 'pull-hex-20230306' of https://github.com... tree | commitdiff
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