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target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h
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2022-06-11 Richard HendersonMerge tag 'for_upstream' of git://git.kernel.org/pub...
2022-06-10 Richard HendersonMerge tag 'pull-riscv-to-apply-20220610' of github...
2022-06-09 Alistair Francistarget/riscv: trans_rvv: Avoid assert for RV32 and e64
2022-06-09 Alistair Francistarget/riscv: Don't expose the CPU properties on names...
2022-06-09 eopXDtarget/riscv: rvv: Add option 'rvv_ta_all_1s' to enable...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector permuta...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector mask...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector reducti...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector floatin...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector fix...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector integer...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector integer...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector integer...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vx, vvm, vxm...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vector load...
2022-06-09 eopXDtarget/riscv: rvv: Add tail agnostic for vv instructions
2022-06-09 eopXDtarget/riscv: rvv: Early exit when vstart >= vl
2022-06-09 eopXDtarget/riscv: rvv: Rename ambiguous esz
2022-06-09 eopXDtarget/riscv: rvv: Prune redundant access_type paramete...
2022-06-09 eopXDtarget/riscv: rvv: Prune redundant ESZ, DSZ parameter...
2022-06-09 Frédéric Pétrottarget/riscv/debug.c: keep experimental rv128 support...
2022-06-09 Andrew Brestickertarget/riscv: Wake on VS-level external interrupts
2022-06-09 Weiwei Litarget/riscv: add support for zmmul extension v0.1
2022-05-25 Richard HendersonMerge tag 'for-upstream' of https://gitlab.com/bonzini...
2022-05-25 Richard HendersonMerge tag 'pull-aspeed-20220525' of https://github...
2022-05-25 Richard HendersonMerge tag 'linux-user-for-7.1-pull-request' of https...
2022-05-24 Richard HendersonMerge tag 'pull-riscv-to-apply-20220525' of github...
2022-05-24 Hongren (Zenithal... target/riscv: add zicsr/zifencei to isa_string
2022-05-24 Anup Pateltarget/riscv: Set [m|s]tval for both illegal and virtua...
2022-05-24 Anup Pateltarget/riscv: Fix hstatus.GVA bit setting for traps...
2022-05-24 Anup Pateltarget/riscv: Fix csr number based privilege checking
2022-05-24 Frank Changtarget/riscv: Fix typo of mimpid cpu option
2022-05-24 Weiwei Litarget/riscv: check 'I' and 'E' after checking 'G'...
2022-05-24 Tsukasa OItarget/riscv: Move/refactor ISA extension checks
2022-05-24 Tsukasa OItarget/riscv: FP extension requirements
2022-05-24 Tsukasa OItarget/riscv: Change "G" expansion
2022-05-24 Tsukasa OItarget/riscv: Disable "G" by default
2022-05-24 Tsukasa OItarget/riscv: Fix coding style on "G" expansion
2022-05-24 Tsukasa OItarget/riscv: Add short-isa-string option
2022-05-23 Tsukasa OItarget/riscv: Move Zhinx* extensions on ISA string
2022-05-23 eopXDtarget/riscv: rvv: Fix early exit condition for whole...
2022-05-23 Dylan Reidtarget/riscv: Fix VS mode hypervisor CSR access
2022-05-18 Richard HendersonMerge tag 'artist-cursor-fix-final-pull-request' of...
2022-05-15 Richard HendersonMerge tag 'or1k-pull-request-20220515' of https://githu...
2022-05-11 Richard HendersonMerge tag 'pull-misc-2022-05-11' of git://repo.or.cz...
2022-05-11 Markus ArmbrusterNormalize header guard symbol definition
2022-05-11 Markus ArmbrusterClean up ill-advised or unusual header guards
2022-04-29 Richard HendersonMerge tag 'pull-riscv-to-apply-20220429' of github...
2022-04-29 Weiwei Litarget/riscv: add scalar crypto related extenstion...
2022-04-29 Ralf Ramsauertarget/riscv: Fix incorrect PTE merge in walk_pte
2022-04-29 Weiwei Litarget/riscv: rvk: expose zbk* and zk* properties
2022-04-29 Weiwei Litarget/riscv: rvk: add CSR support for Zkr
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zksed/zksh extension
2022-04-29 Weiwei Litarget/riscv: rvk: add support for sha512 related instr...
2022-04-29 Weiwei Litarget/riscv: rvk: add support for sha512 related instr...
2022-04-29 Weiwei Litarget/riscv: rvk: add support for sha256 related instr...
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zkne/zknd extension...
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zknd/zkne extension...
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zbkx extension
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zbkc extension
2022-04-29 Weiwei Litarget/riscv: rvk: add support for zbkb extension
2022-04-29 Weiwei Litarget/riscv: rvk: add cfg properties for zbk* and zk*
2022-04-29 Frank Changtarget/riscv: Support configuarable marchid, mvendorid...
2022-04-27 Richard HendersonMerge tag 'kraxel-20220427-pull-request' of git://git...
2022-04-25 Richard HendersonMerge tag 'block-pull-request' of https://gitlab.com...
2022-04-22 Richard HendersonMerge tag 'pull-target-arm-20220422-1' of https://git...
2022-04-22 Richard HendersonMerge tag 'dump-pull-request' of gitlab.com:marcandre...
2022-04-22 Richard HendersonMerge tag 'pull-riscv-to-apply-20220422-1' of github...
2022-04-22 Bin Mengtarget/riscv: cpu: Enable native debug feature
2022-04-22 Bin Mengtarget/riscv: machine: Add debug state description
2022-04-22 Bin Mengtarget/riscv: csr: Hook debug CSR read/write
2022-04-22 Bin Mengtarget/riscv: cpu: Add a config option for native debug
2022-04-22 Bin Mengtarget/riscv: debug: Implement debug related TCGCPUOps
2022-04-22 Frank Changhw/intc: Make RISC-V ACLINT mtime MMIO register writable
2022-04-22 Nicolas Pitretarget/riscv/pmp: fix NAPOT range computation overflow
2022-04-22 Richard Hendersontarget/riscv: Use cpu_loop_exit_restore directly from...
2022-04-22 Weiwei Litarget/riscv: fix start byte for vmv<nf>r.v when vstart...
2022-04-22 Atish Patratarget/riscv: Add isa extenstion strings to the device...
2022-04-22 Tsukasa OItarget/riscv: misa to ISA string conversion fix
2022-04-22 Weiwei Litarget/riscv: optimize helper for vmv<nr>r.v
2022-04-22 Weiwei Litarget/riscv: optimize condition assign for scale < 0
2022-04-22 Bin Mengtarget/riscv: Add initial support for the Sdtrig extension
2022-04-22 Alistair Francistarget/riscv: Allow software access to MIP SEIP
2022-04-22 Alistair Francistarget/riscv: cpu: Fixup indentation
2022-04-22 Atish Patratarget/riscv: Enable privileged spec version 1.12
2022-04-22 Atish Patratarget/riscv: Add *envcfg* CSRs support
2022-04-22 Atish Patratarget/riscv: Add support for mconfigptr
2022-04-22 Atish Patratarget/riscv: Introduce privilege version field in...
2022-04-22 Atish Patratarget/riscv: Add the privileged spec version 1.12.0
2022-04-22 Atish Patratarget/riscv: Define simpler privileged spec version...
2022-04-21 Richard HendersonMerge tag 'pull-rx-20220421' of https://gitlab.com...
2022-04-21 Richard HendersonMerge tag 'python-pull-request' of https://gitlab.com...
2022-04-21 Richard HendersonMerge tag 'pull-qapi-2022-04-21' of git://repo.or.cz...
2022-04-21 Richard HendersonMerge tag 'misc-pull-request' of gitlab.com:marcandre...
2022-04-21 Marc-André Lureaucompiler.h: replace QEMU_NORETURN with G_NORETURN
2022-04-21 Richard HendersonMerge tag 'pull-ppc-20220420-2' of https://gitlab.com...
2022-04-20 Richard HendersonMerge tag 'pull-tcg-20220420' of https://gitlab.com...
2022-04-20 Richard HendersonMerge tag 'pull-log-20220420' of https://gitlab.com...
2022-04-20 Richard Hendersonexec/translator: Pass the locked filepointer to disas_l...
2022-04-20 Richard HendersonMerge tag 'for-upstream' of https://gitlab.com/bonzini...
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