]> git.proxmox.com Git - mirror_qemu.git/history - target
exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
[mirror_qemu.git] / target /
2023-06-20 Philippe Mathieu... meson: Replace softmmu_ss -> system_ss
2023-06-20 Philippe Mathieu... meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
2023-06-20 Philippe Mathieu... target/ppc: Check for USER_ONLY definition instead...
2023-06-20 Philippe Mathieu... target/m68k: Check for USER_ONLY definition instead...
2023-06-20 Philippe Mathieu... target/tricore: Remove pointless CONFIG_SOFTMMU guard
2023-06-20 Philippe Mathieu... target/i386: Simplify i386_tr_init_disas_context()
2023-06-19 Richard HendersonMerge tag 'pull-target-arm-20230619' of https://git...
2023-06-19 Peter Maydelltarget/arm: Convert load/store tags insns to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert load/store single structure to...
2023-06-19 Peter Maydelltarget/arm: Convert load/store (multiple structures...
2023-06-19 Peter Maydelltarget/arm: Convert LDAPR/STLR (imm) to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert load (pointer auth) insns to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert atomic memory ops to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert LDR/STR reg+reg to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert LDR/STR with 12-bit immediate to...
2023-06-19 Peter Maydelltarget/arm: Convert ld/st reg+imm9 insns to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert load/store-pair to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert load reg (literal) group to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert LDXP, STXP, CASP, CAS to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert load/store exclusive and ordered...
2023-06-19 Peter Maydelltarget/arm: Convert exception generation instructions...
2023-06-19 Peter Maydelltarget/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert MSR (immediate) to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert CFINV, XAFLAG and AXFLAG to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert barrier insns to decodetree
2023-06-19 Peter Maydelltarget/arm: Convert hint instruction space to decodetree
2023-06-19 Peter Maydelltarget/arm: Consistently use finalize_memop_asimd(...
2023-06-19 Peter Maydelltarget/arm: Pass memop to gen_mte_check1_mmuidx() in...
2023-06-19 Peter Maydelltarget/arm: Return correct result for LDG when ATA=0
2023-06-19 Peter Maydelltarget/arm: Fix return value from LDSMIN/LDSMAX 8/16...
2023-06-16 Richard HendersonMerge tag 'pull-loongarch-20230616' of https://gitlab...
2023-06-16 Richard HendersonMerge tag 'xenpvh5-tag' of https://gitlab.com/sstabelli...
2023-06-16 Jiajie Chentarget/loongarch: Fix CSR.DMW0-3.VSEG check
2023-06-16 Tianrui Zhaohw/intc: Set physical cpuid route for LoongArch ipi...
2023-06-16 Richard HendersonMerge tag 'pull-aspeed-20230615' of https://github...
2023-06-15 Cédric Le Goatertarget/arm: Allow users to set the number of VFP registers
2023-06-14 Richard HendersonMerge tag 'pull-riscv-to-apply-20230614' of https:...
2023-06-14 Richard HendersonMerge tag 'misc-20230613' of https://github.com/philmd...
2023-06-13 Philippe Mathieu... target/i386: Rename helper template headers as '.h...
2023-06-13 Philippe Mathieu... target/i386/helper: Shuffle do_cpu_init()
2023-06-13 Philippe Mathieu... target/i386/helper: Remove do_cpu_sipi() stub for user...
2023-06-13 Philippe Mathieu... target/hppa/meson: Only build int_helper.o with system...
2023-06-13 Himanshu Chauhantarget/riscv: Smepmp: Return error when access permissi...
2023-06-13 Xiao Wangtarget/riscv/vector_helper.c: Remove the check for...
2023-06-13 Xiao Wangtarget/riscv/vector_helper.c: clean up reference of...
2023-06-13 Weiwei Litarget/riscv: Fix initialized value for cur_pmmask
2023-06-13 Weiwei Litarget/riscv: Remove pc_succ_insn from DisasContext
2023-06-13 Weiwei Litarget/riscv: Enable PC-relative translation
2023-06-13 Weiwei Litarget/riscv: Use true diff for gen_pc_plus_diff
2023-06-13 Weiwei Litarget/riscv: Change gen_set_pc_imm to gen_update_pc
2023-06-13 Weiwei Litarget/riscv: Change gen_goto_tb to work on displacements
2023-06-13 Weiwei Litarget/riscv: Introduce cur_insn_len into DisasContext
2023-06-13 Weiwei Litarget/riscv: Fix target address to update badaddr
2023-06-13 Weiwei Litarget/riscv: Pass RISCVCPUConfig as target_info to...
2023-06-13 Weiwei Litarget/riscv: Split RISCVCPUConfig declarations from...
2023-06-13 Mayuresh Chitaletarget/riscv: smstateen knobs
2023-06-13 Mayuresh Chitaletarget/riscv: Reuse tb->flags.FS
2023-06-13 Mayuresh Chitaletarget/riscv: smstateen check for fcsr
2023-06-13 Weiwei Litarget/riscv: Update cur_pmmask/base when xl changes
2023-06-13 Weiwei Litarget/riscv: Fix pointer mask transformation for vecto...
2023-06-13 Weiwei Litarget/riscv: Deny access if access is partially inside...
2023-06-13 Weiwei Litarget/riscv: Separate pmp_update_rule() in pmpcfg_csr_...
2023-06-13 Weiwei Litarget/riscv: Flush TLB only when pmpcfg/pmpaddr really...
2023-06-13 Weiwei Litarget/riscv: Flush TLB when pmpaddr is updated
2023-06-13 Weiwei Litarget/riscv: Update the next rule addr in pmpaddr_csr_...
2023-06-13 Weiwei Litarget/riscv: Flush TLB when MMWP or MML bits are changed
2023-06-13 Weiwei Litarget/riscv: Remove unused paramters in pmp_hart_has_p...
2023-06-13 Weiwei Litarget/riscv: Make RLB/MML/MMWP bits writable only...
2023-06-13 Weiwei Litarget/riscv: Change the return type of pmp_hart_has_pr...
2023-06-13 Weiwei Litarget/riscv: Make the short cut really work in pmp_har...
2023-06-13 Weiwei Litarget/riscv: Move pmp_get_tlb_size apart from get_phys...
2023-06-13 Weiwei Litarget/riscv: Update pmp_get_tlb_size()
2023-06-13 Daniel Henrique... target/riscv: rework write_misa()
2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove cfg setup from riscv_cpu_init()
2023-06-13 Daniel Henrique... target/riscv/cpu.c: validate extensions before riscv_ti...
2023-06-13 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl()
2023-06-13 Daniel Henrique... target/riscv/cpu.c: add priv_spec validate/disable_exts...
2023-06-13 Weiwei Litarget/riscv: Update check for Zca/Zcf/Zcd
2023-06-13 Weiwei Litarget/riscv: Mask the implicitly enabled extensions...
2023-06-13 Daniel Henrique... target/riscv: add PRIV_VERSION_LATEST
2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove set_priv_version()
2023-06-13 Daniel Henrique... target/riscv/cpu.c: remove set_vext_version()
2023-06-13 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_validate_v()
2023-06-13 Weiwei Litarget/riscv: Move zc* out of the experimental properties
2023-06-13 Daniel Henrique... target/riscv/vector_helper.c: skip set tail when vta...
2023-06-10 Richard HendersonMerge tag 'pull-ppc-20230610' of https://gitlab.com...
2023-06-10 Richard HendersonMerge tag 'trivial-patches-20230610' of https://gitlab...
2023-06-10 BALATON Zoltantarget/ppc: Implement gathering irq statistics
2023-06-10 Nicholas Piggintarget/ppc: Rework store conditional to avoid branch
2023-06-10 Nicholas Piggintarget/ppc: Remove larx/stcx. memory barrier semantics
2023-06-10 Nicholas Piggintarget/ppc: Ensure stcx size matches larx
2023-06-10 Nicholas Piggintarget/ppc: Fix lqarx to set cpu_reserve
2023-06-10 BALATON Zoltantarget/ppc: Eliminate goto in mmubooke_check_tlb()
2023-06-10 BALATON Zoltantarget/ppc: Change ppcemb_tlb_check() to return bool
2023-06-10 BALATON Zoltantarget/ppc: Simplify ppcemb_tlb_search()
2023-06-10 BALATON Zoltantarget/ppc: Remove some unneded line breaks
2023-06-10 BALATON Zoltantarget/ppc: Move ppcemb_tlb_search() to mmu_common.c
2023-06-10 BALATON Zoltantarget/ppc: Remove "ext" parameter of ppcemb_tlb_check()
2023-06-10 BALATON Zoltantarget/ppc: Remove single use function
2023-06-10 Nicholas Piggintarget/ppc: PMU implement PERFM interrupts
next