Olof Johansson [Sat, 3 Oct 2020 19:37:45 +0000 (12:37 -0700)]
Merge tag 'v5.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
cpu-supply fixes (supply for each cpu core not only cpu0)
and a spelling for the status property.
* tag 'v5.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: replace status value "ok" by "okay"
ARM: dts: rockchip: update cpu supplies on rk3066a
ARM: dts: rockchip: rk3066a: add label to cpu@1
ARM: dts: rockchip: update cpu supplies on rk3288
Olof Johansson [Sat, 3 Oct 2020 19:36:26 +0000 (12:36 -0700)]
Merge tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt
Actions Semi ARM64 DT for v5.10:
- Fix the memory region used by pinctrl and sps drivers on the S700 SoC.
The issue is fixed by limiting the address space used by pinctrl driver.
In hardware these two are separate subsystems but the hw engineers somehow
merged the registers space into one. So we now limit the address space with
appropriate offsets for the two drivers.
- Add DMA controller support for S700 SoC. The relevant driver changes are
picked up by DMA Engine mainatainer. The DMA on this SoC can be used for
mem-to-mem and mem-to-peripheral transfers.
* tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
arm64: dts: actions: Add DMA Controller for S700
arm64: dts: actions: limit address range for pinctrl node
Olof Johansson [Sat, 3 Oct 2020 19:35:55 +0000 (12:35 -0700)]
Merge tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt
Actions Semi ARM DT for v5.10:
- Add devicetree support for Caninos Loucos Labrador SBC manufactured
by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil.
This board is based on Actions Semi S500 SoC. More information about
this board can be found in their website: https://caninosloucos.org/en/
- Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU
- Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi
team in Taiwan. This board is based on Actions Semi S500 SoC.
More information about this board can be found in their website:
http://roseapplepi.org/
* tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
ARM: dts: owl-s500: Add RoseapplePi
ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers
ARM: dts: Add Caninos Loucos Labrador v2
Olof Johansson [Sat, 3 Oct 2020 19:35:14 +0000 (12:35 -0700)]
Merge tag 'actions-bindings-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt
Actions Semi bindings for v5.10
- Add vendor prefix for Roseapple Pi: http://roseapplepi.org/
- Document RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan.
This board is based on Actions Semi S500 SoC. More information about
this board can be found in their website:
http://roseapplepi.org/index.php/spec/
- Add vendor prefix for Caninos Loucos Program:
https://caninosloucos.org/en/program-en/
- Document Caninos Loucos Labrador SBC manufactured by Laboratory of
Integrated Technological Systems (LSI-TEC), Brazil. This board is based
on Actions Semi S500 SoC. More information about this board can be found
in their website: https://caninosloucos.org/en/labrador-32-en/
* tag 'actions-bindings-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
dt-bindings: arm: actions: Document RoseapplePi
dt-bindings: Add vendor prefix for RoseapplePi.org
dt-bindings: arm: actions: Document Caninos Loucos Labrador
dt-bindings: Add vendor prefix for Caninos Loucos
Olof Johansson [Sat, 3 Oct 2020 19:34:01 +0000 (12:34 -0700)]
Merge tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches to support the Allwinner SoCs, this time
adding:
- Allwinner A100 initial support
- Mali, DMA, cedrus and IR Support for the R40
- Crypto support for the v3s
- New board: Allwinner A100 Perf1
* tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (24 commits)
ARM: dts: sun8i: v3s: Enable crypto engine
dt-bindings: crypto: Add compatible for V3s
dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset
arm64: dts: allwinner: a64: Update the audio codec compatible
arm64: dts: allwinner: a64: Update codec widget names
ARM: dts: sun8i: a33: Update codec widget names
ARM: dts: sun8i: r40: Add video engine node
ARM: dts: sun8i: r40: Add node for system controller
dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR
ARM: dts: sun8i: r40: Add IR nodes
dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible
ARM: dts: sun8i: r40: Add DMA node
dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible
arm64: allwinner: A100: add support for Allwinner Perf1 board
dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings
arm64: allwinner: A100: add the basical Allwinner A100 DTSI file
dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller
dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi
ARM: dts: sun4i: Enable HDMI support on the Mele A1000
...
* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
However, the driver from the 3.10 vendor kernel does not use the
following four interrupt lines:
- INT_MALI_PP3
- INT_MALI_PP3_MMU
- INT_MALI_PP7
- INT_MALI_PP7_MMU
Drop the "pp3" and "ppmmu3" interrupt lines. This is also important
because there is no matching entry in interrupt-names for it (meaning
the "pp2" interrupt is actually assigned to the "pp3" interrupt line).
Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Reported-by: Thomas Graichen <thomas.graichen@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: thomas graichen <thomas.graichen@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200815181957.408649-1-martin.blumenstingl@googlemail.com
Roger Quadros [Wed, 30 Sep 2020 12:20:32 +0000 (15:20 +0300)]
arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
The board uses lane 3 of SERDES for USB. Set the mux
accordingly.
The USB controller and EVM supports super-speed for USB0
on the Type-C port. However, the SERDES has a limitation
that upto 2 protocols can be used at a time. The SERDES is
wired for PCIe, QSGMII and USB super-speed. It has been
chosen to use PCI2 and QSGMII as default. So restrict
USB0 to high-speed mode.
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
First two lanes of SERDES is connected to PCIe, third lane is
connected to QSGMII and the last lane is connected to USB. However,
Cadence torrent SERDES doesn't support more than 2 protocols
at the same time. Configure it only for PCIe and QSGMII.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com
Olof Johansson [Sat, 26 Sep 2020 17:23:15 +0000 (10:23 -0700)]
Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dtc: amlogic updates for v5.10
- new boards: libretch s905x cc v2, Hardkernel ODROID-N2+
- vim3: sound updates
* tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson: initial support for aml-s905x-cc v2
dt-bindings: arm: amlogic: add support for libretch s905x cc v2
arm64: dts: meson: add support for the ODROID-N2+
dt-bindings: arm: amlogic: add support for the ODROID-N2+
arm64: dts: meson: convert ODROID-N2 to dtsi
arm64: dts: meson: vim3l: remove sound card definition
arm64: dts: meson: vim3: make sound card common to all variants
arm64: dts: meson: vim3: correct led polarity
Olof Johansson [Sat, 26 Sep 2020 17:22:46 +0000 (10:22 -0700)]
Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: amlogic updates for v5.10
- minor cleanup
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: move the L2 cache-controller inside the SoC node
Olof Johansson [Sat, 26 Sep 2020 17:22:03 +0000 (10:22 -0700)]
Merge tag 'stm32-dt-for-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.10, round 1
Highlights:
----------
MCU part:
-Some changes on stm32h743: enable display controler, add SPI resets,
use "st,stm32h7-uart" compatible.
MPU part:
-Add new Odyssey SOM board based on STM32MP157CAC. It embeds 4GB eMMC, 512
MB DDR3 RAM, USB and ETH connectors and a combo wifi/BT (AP6236 chip).
-Add FMC2 EBI support on EV1 board.
-Add arm-pmu node.
-LXA:
-Change ethernet phy delays to avoid kernel warnings.
-Enable DDR50 eMMC mode.
-DH:
-Add new DH DRC02 unit board.
-Add USB OTG support on PDK2 board.
-Use uart8 RTS/CTS on PDK2 board.
-Fix display PWM channel on PDK2 board.
-Swap phy reset line and touchscreen irq on DHCOM SOM.
-Drop QSPI CS2 on DHCOM SOM.
-Update SDMMC pin config on AV96.
-Enable uart7 RTS/CTS on AV96.
* tag 'stm32-dt-for-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: add arm-pmu node on stm32mp15
ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC
ARM: dts: stm32: Fix DH PDK2 display PWM channel
ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7
ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOM
ARM: dts: stm32: use stm32h7 usart compatible string for stm32h743
ARM: dts: stm32: add resets property to spi device nodes on stm32h743
ARM: dts: stm32: add display controller node to stm32h743
ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8
ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOM
ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmux
ARM: dts: stm32: add initial support for stm32mp157-odyssey board
dt-bindings: arm: stm32: document Odyssey compatible
dt-bindings: vendor-prefixes: add Seeed Studio
ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delays
ARM: dts: stm32: Add USB OTG support to DH PDK2
ARM: dts: stm32: Fix sdmmc2 pins on AV96
ARM: dts: stm32: Add DHSOM based DRC02 board
ARM: dts: stm32: Move ethernet PHY into DH SoM DT
Olof Johansson [Sat, 26 Sep 2020 17:21:19 +0000 (10:21 -0700)]
Merge tag 'qcom-arm64-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.10
Cleanup, refactor and modernize MSM8916 by sorting nodes, moving device
and platform specific parts to their respective files, add and use
labels for reference nodes and use IRQ defines. Migrate TCSR mutex off
the depricated binding, add resin node for PM8916.
Add LPASS clock controller for SC7180. Fix the LLCC reg, increase
interconnect-cells, drop flags on MDSS irqs. Add interconnects for
display, eMMC and SD-card, specify 'sustainable_power' for CPU thermal
zones, improve pinconf states related to UART and Bluetooth. Add new DT
for Lazor and Trogdor.
Increase #interconnect-cells for SDM845 to allow tags, add OPP tables
and power-domains for Venus and interconnects for display. Fix the ports
on the HDMI nodes for DB845c and add DT for the Xiaomi Poco F1.
Add interconnect providers, fix up primary USB's clock and use
dt-binding defines for GPU clocks on SM8150.
Add interconnect providers, CPUfreq, thermal configuration and missing
uarts for SM8250. Fix up naming of debug uart, add always-on supply
clock to gcc, fix up the sleep clock rate and define OPP tables for all
QUP devices. Then add a new DeviceTree for the QRB5165 RB5 board.
Enable watchdog on IPQ8074 and use the appropriate compatible for the
PMU node. Enable DVFS support for IPQ6018.
Finally correct the spelling of "interrupts" in MSM8992 uart node, fix
missing # in PM660 #interrupt-cells, add second VFE power-domain to
camss in MSM8996 and sort the Makefile.
* tag 'qcom-arm64-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (75 commits)
arm64: dts: qcom: sm8250: Add thermal zones and throttling support
arm64: dts: qcom: sm8250: Add cpufreq hw node
arm64: dts: qcom: sdm845: Add interconnects property for display
arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider
arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider
arm64: dts: qcom: sm8250: add interconnect nodes
arm64: dts: qcom: sm8150: add interconnect nodes
arm64: dts: qcom: sc7180: Increase the number of interconnect cells
arm64: dts: qcom: sdm845: Increase the number of interconnect cells
arm64: dts: qcom: Makefile: Sort lines
arm64: dts: qcom: pm8916: Sort nodes
arm64: dts: qcom: msm8916: Sort nodes
arm64: dts: qcom: msm8916: Pad addresses
arm64: dts: qcom: msm8916: Rename "x-smp2p" to "smp2p-x"
arm64: dts: qcom: msm8916: Use more generic node names
arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS
arm64: dts: qcom: msm8916: Minor style fixes
arm64: dts: qcom: msm8916: Drop qcom,tcsr-mutex syscon
arm64: dts: qcom: msm8916: Use IRQ defines, add IRQ types
arm64: dts: qcom: msm8916: Fix MDP/DSI interrupts
...
Olof Johansson [Sat, 26 Sep 2020 17:17:44 +0000 (10:17 -0700)]
Merge tag 'imx-dt64-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 5.10:
- New board/device support: Librem 5 phone, i.MX8MM DDR4 EVK, Variscite
VAR-SOM-MX8MN SoM and Symphony board.
- Add NWL MIPI DSI controller support for i.MX8MQ.
- Several series from Krzysztof Kozlowski to clean and fix up i.MX8
based device trees according to DT schema.
- A series from Michael Walle to add sl28cpld support for Kontron sl28
device based on LS1028A.
- Add two parameters for Samsung picophy tuning on imx8mm-evk and
imx8mn-evk boards.
- Add more thermal zones for Layerscape SoCs.
- Various random update and minor fix-ups.
* tag 'imx-dt64-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
arm64: dts: imx8mq-librem5: correct GPIO hog property
arm64: dts: imx8mm-var-som-symphony: Drop wake-up source from RTC
arm64: dts: imx8mq: correct interrupt flags
arm64: dts: imx8mn: correct interrupt flags
arm64: dts: imx8mm: correct interrupt flags
arm64: dts: imx8mm-var-som-symphony: fix ptn5150 interrupts
arm64: dts: layerscape: correct watchdog clocks for LS1088A
arm64: dts: freescale: sl28: enable fan support
arm64: dts: freescale: sl28: enable LED support
arm64: dts: freescale: sl28: map GPIOs to input events
arm64: dts: freescale: sl28: enable sl28cpld
arm64: dts: imx8mq-evk: Add MIPI DSI support
arm64: dts: layerscape: Add label to pcie nodes
arm64: dts: imx8mn-var-som-symphony: Add Variscite Symphony board with VAR-SOM-MX8MN
arm64: dts: imx8mn-var-som: Add Variscite VAR-SOM-MX8MN System on Module
arm64: dts: imx8mn-ddr4-evk: Remove unneeded PMIC pin configuration
arm64: dts: imx8mm-var-som-symphony: Adjust ethernet pin configuration
arm64: dts: imx8mm-var-som-symphony: Remove unneeded i2c3 properties
arm64: dts: imx8mm-var-som-symphony: Drop unused gpioledgrp
arm64: dts: imx8mq-librem5: Add interrupt-names to ti,tps6598x
...
Olof Johansson [Sat, 26 Sep 2020 17:17:03 +0000 (10:17 -0700)]
Merge tag 'imx-dt-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 device tree change for 5.10:
- New board/device support: Tolino Shine 2 HD, TQMa6 SoM, Y Soft IOTA
Orion board.
- update GPMI NAND node name to nand-controller for aligning with DT
schema.
- Remove the legacy fsl,spi-num-chipselects property from a few board.
- A series to update imx6q-logicpd support, using GPIO chipselect,
adding board compatible string, and enabling DTB build for the board.
- Complete RNG device node in i.MX6SL device tree, and add RNG node for
i.MX6SLL and i.MX6ULL.
- Correct interrupt flags for imx6qdl-gw5xxx boards.
- Add missing enet_out clock for i.MX6Q/DL Ethernet device.
- Enable PCIe support for imx6qp-sabreauto board.
- A series from Shengjiu Wang to add audio sound card for imx7d-sdb and
imx6sll-evk board, add headphone detection for sound card on a few NXP
development boards.
- A couple of minor fix-ups on i.MX25 pin functions.
- Some random update on various boards.
* tag 'imx-dt-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
ARM: dts: imx6qdl-gw5xxx: correct interrupt flags
ARM: dts: imx6q-logicpd: Use GPIO chipselect
ARM: dts: imx: Add an entry for imx6q-logicpd.dtb
ARM: dts: imx6q-logicpd: Add a specific board compatible string
ARM: dts: imx6q: align GPIO hog names with dtschema
ARM: dts: imx6qdl-tqma6: fix LM75 compatible string
ARM: dts: imx6qdl-tqma6: remove obsolete fsl,spi-num-chipselects
ARM: dts: imx6qdl-tqma6: fix indentation
ARM: dts: imx28-m28: Align GPMI NAND node name with schema
ARM: dts: imx6qdl: add enet_out clk support
ARM: dts: imx6qdl: move iomuxc compatible assignment out of root node
ARM: dts: vf: Fix PCA95xx GPIO expander properties on ZII CFU1
ARM: dts: imx: add devicetree for Tolino Shine 2 HD
ARM: dts: imx6qdl-gw553x: Remove unneeded #address-cells/#size-cells
ARM: dts: imx6sll-evk: Add audio sound card node
ARM: dts: imx6sl-evk: Add headphone detection for sound card
ARM: dts: imx6sx-sdb: Add headphone detection for sound card
ARM: dts: imx6q-kontron-samx6i: Remove old fsl,spi-num-chipselects
ARM: dts: imx: Fix the SPI chipselect polarity
ARM: dts: imx25-pinfunc: Fix GPT function names
...
Olof Johansson [Sat, 26 Sep 2020 17:15:52 +0000 (10:15 -0700)]
Merge tag 'imx-bindings-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT bindings update for 5.10:
- Various board compatible string additions to fsl.ymal.
- Update Vybrid OCOTP binding for syscon compatible string, which is
required to access the UID.
* tag 'imx-bindings-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add binding for Variscite Symphony board with VAR-SOM-MX8MN
dt-bindings: arm: fsl: Add PHYTEC i.MX6 devicetree bindings
dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings
dt-bindings: arm: fsl: Add an entry for the i.MX6 LogicPD board
dt-bindings: arm: fsl: Fix matching Purism Librem5 phones
dt-bindings: arm: fsl: Add imx8mm ddr4 evk board
dt-bindings: arm: fsl: add compatible string for Tolino Shine 2 HD
dt-bindings: nvmem: Add syscon to Vybrid OCOTP driver
dt-bindings: arm: fsl: Add binding for Variscite Symphony board with VAR-SOM-MX8MM
dt-bindings: arm: fsl: Add binding for Variscite VAR-SOM-MX8MM module
dt-bindings: arm: fsl: Add ZII Ultra boards binding
dt-bindings: arm: fsl: Fix Toradex Colibri i.MX 8 binding
dt-bindings: arm: fsl: Add Beacon i.MX8M Mini Development Kit binding
dt-bindings: arm: fsl: Add the librem 5 phone
dt-bindings: arm: fsl: Add Y Soft IOTA Orion board
Olof Johansson [Sat, 26 Sep 2020 17:02:58 +0000 (10:02 -0700)]
Merge tag 'samsung-dt64-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.10, part two
Minor cleanups: removal of undocumented I2S properties, alignment of OPP
table node name with dtschema.
* tag 'samsung-dt64-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Align OPP table name with dt-schema
arm64: dts: exynos: Remove undocumented i2s properties in Exynos5433
Olof Johansson [Sat, 26 Sep 2020 17:02:35 +0000 (10:02 -0700)]
Merge tag 'samsung-dt-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.10, part two
1. Further cleanup of DTS with dtschema: s5pv210, s3c6410 and s3c24xx.
This fixes many minor dtschema violations, adds few missing
functionalities (like clock for RTC) and improves the code
maintainability in few places. Except the RTC clock, this should not
have visible impact.
2. Fix few remaining Exynos dtschema violations.
* tag 'samsung-dt-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (36 commits)
ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Goni
ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Aquila
ARM: dts: s5pv210: move fixed regulators under root node in Goni
ARM: dts: s5pv210: move fixed regulators under root node in Aquila
ARM: dts: exynos: Align OPP table name with dt-schema
ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4
ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
ARM: dts: exynos: add input clock to CMU in Exynos3250
ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416
ARM: dts: s3c24xx: add address to CPU node
ARM: dts: s3c24xx: align PWM/timer node name with dtschema
ARM: dts: s3c24xx: override nodes by label
ARM: dts: s3c24xx: fix number of PWM cells
ARM: dts: s3c6410: remove additional CPU compatible
ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410
ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
ARM: dts: s5pv210: align SPI GPIO node name with dtschema in Aries
...
Olof Johansson [Sat, 26 Sep 2020 17:01:51 +0000 (10:01 -0700)]
Merge tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Changes for v5.10-rc1
This set of changes fixes some minor issues in existing device trees and
adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled
to allow them to be detected by software.
It also adds support for the Tegra234 VDK board, which is a pre-silicon
platform for the upcoming Orin SoC.
* tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Initial Tegra234 VDK support
arm64: tegra: Populate EEPROMs for Jetson Xavier NX
arm64: tegra: Add label properties for EEPROMs
arm64: tegra: Add DT binding for AHUB components
arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano
arm64: tegra: Properly size register regions for GPU on Tegra194
arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
arm64: tegra: Describe display controller outputs for Tegra210
arm64: tegra: Disable SD card write-protection on Jetson Nano
arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano
arm64: tegra: Wire up pinctrl states for all DPAUX controllers
arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier
Olof Johansson [Sat, 26 Sep 2020 16:59:24 +0000 (09:59 -0700)]
Merge tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10 (take two)
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
* tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Add DRIF support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
ARM: dts: r8a7742: Add VSP support
arm64: dts: renesas: Drop superfluous pin configuration containers
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support
arm64: dts: renesas: r8a77961: Add HDMI device nodes
arm64: dts: renesas: r8a77961: Add DU device nodes
arm64: dts: renesas: r8a77961: Add VSP device nodes
arm64: dts: renesas: r8a77961: Add FCP device nodes
arm64: dts: renesas: Fix pin controller node names
ARM: dts: renesas: Fix pin controller node names
arm64: dts: renesas: Add Renesas Falcon boards support
arm64: dts: renesas: Add Renesas R8A779A0 SoC support
ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
ARM: dts: r8a7742: Add VIN DT nodes
...
arm64: dts: apm: drop unused reg-io-width from DW APB GPIO controller
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
ARM: dts: picoxcell: drop unused reg-io-width from DW APB GPIO controller
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Olof Johansson [Sat, 26 Sep 2020 16:46:29 +0000 (09:46 -0700)]
Merge tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Olof Johansson [Sat, 26 Sep 2020 16:46:09 +0000 (09:46 -0700)]
Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: hisilicon: replace status value "ok" by "okay"
J7200 SoM has a HyperFlash connected to HyperBus memory controller. But
HyperBus is muxed with OSPI, therefore keep HyperBus node disabled.
Bootloader will detect the mux and enable the node as required.
Amit Kucheria [Thu, 10 Sep 2020 10:14:30 +0000 (15:44 +0530)]
arm64: dts: qcom: sm8250: Add thermal zones and throttling support
sm8250 has 24 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle on
crossing passive temperature thresholds.
Ahmad Fatoum [Fri, 28 Aug 2020 13:00:02 +0000 (15:00 +0200)]
ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.
Marek Vasut [Fri, 28 Aug 2020 12:14:12 +0000 (14:14 +0200)]
ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOM
On the production revision of the SoM, 587-200, the PHY reset GPIO and
touchscreen IRQs are swapped to prevent collision between EXTi IRQs,
reflect that in DT.
Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Tobias Schramm [Fri, 14 Aug 2020 22:35:43 +0000 (00:35 +0200)]
ARM: dts: stm32: add resets property to spi device nodes on stm32h743
The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its initial "after device reset" state. The
driver does already support resetting the spi device at probe, thus this
patch adds only the required device tree properties
ARM: dts: stm32: add initial support for stm32mp157-odyssey board
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only basic kernel boot is supported and interfacing
SD card and on-board eMMC.
Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Holger Assmann [Fri, 7 Aug 2020 15:03:56 +0000 (17:03 +0200)]
ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delays
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve
the desired phase shift between clock- and data-signal, now trigger a
kernel warning when used in rgmii-id mode:
*-skew-ps values should be used only with phy-mode = "rgmii"
This is because commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode
support for the KSZ9031 PHY") now configures own timings when
phy-mode = "rgmii-id". Device trees wanting to set their own delays
should use phy-mode "rgmii" instead as the warning prescribes.
The "standard" timings now used with "rgmii-id" work fine on this
board, so drop the explicit timings in the device tree and thereby
silence the warning.
Marek Vasut [Thu, 30 Jul 2020 23:27:57 +0000 (01:27 +0200)]
ARM: dts: stm32: Fix sdmmc2 pins on AV96
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which
differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one
pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later.
The PA15 is correct on AV96, so fix this. This error is likely a
result of rebasing across the stm32mp1 DT pinctrl rework.
Fixes: 611325f68102 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Wed, 29 Jul 2020 16:51:41 +0000 (18:51 +0200)]
ARM: dts: stm32: Add DHSOM based DRC02 board
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Common Processor board is the baseboard that has most of the actual
connectors, power supply etc. A SOM (System on Module) is plugged on
to the common processor board and this contains the SoC, PMIC, DDR and
basic high speed components necessary for functionality.
Note:
* The minimum configuration required to boot up the board is System On
Module(SOM) + Common Processor Board.
* Since there is just a single SOM and Common Processor Board, we are
maintaining common processor board as the base dts and SOM as the dtsi
that we include. In the future as more SOM's appear, we should move
common processor board as a dtsi and include configurations as dts.
* All daughter cards beyond the basic boards shall be maintained as
overlays.
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C
and I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-5-lokeshvutla@ti.com
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
arm64: dts: ti: Makefile: Use ARCH_K3 for building dtbs
To allow lesser dependency and better maintainability use CONFIG_ARCH_K3
for building dtbs for all K3 based devices. This is as per the
discussion in [0].
arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances
J721E Common Processor Board has PCIe connectors for the 1st three PCIe
instances. Configure the three PCIe instances in RC mode and disable the
4th PCIe instance.
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
For level low interrupts, enable also internal pull up. It is
required at least on imx8mm-evk, according to schematics.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH
In case of level low interrupts, enable also internal pull up. It is
required at least on imx8mm-evk, according to schematics.
The schematics for Variscite imx8mm-var-som are not available and
I was unable to get proper configuration from Variscite.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Mon, 14 Sep 2020 21:43:39 +0000 (23:43 +0200)]
arm64: dts: freescale: sl28: enable LED support
Now that we have support for GPIO lines of the SMARC connector, enable
LED support on the KBox A-230-LS. There are two LEDs without fixed
functions, one is yellow and one is green. Unfortunately, it is just one
multi-color LED, thus while it is possible to enable both at the same
time it is hard to tell the difference between "yellow only" and "yellow
and green".
Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Mon, 14 Sep 2020 21:43:38 +0000 (23:43 +0200)]
arm64: dts: freescale: sl28: map GPIOs to input events
Now that we have support for GPIO lines of the SMARC connector, map the
sleep, power and lid switch signals to the corresponding keys using the
gpio-keys and gpio-keys-polled drivers. The power and sleep signals have
dedicated interrupts, thus we use these ones. The lid switch is just
mapped to a GPIO input and needs polling.
Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arm64: dts: imx8mn-var-som-symphony: Add Variscite Symphony board with VAR-SOM-MX8MN
Add a basic DTS for Variscite Symphony evaluation kit with VAR-SOM-MX8MN
(i.MX 8M Nano) System on Module. This brings up the board with basic
functionalities although still few issues remain (e.g. I2C3 and USB OTG
port, although it might not be the problem of DTS).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>