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3 years agomigration: introduce UFFD-WP low-level interface helpers
Andrey Gruzdev [Fri, 29 Jan 2021 10:14:04 +0000 (13:14 +0300)]
migration: introduce UFFD-WP low-level interface helpers

Glue code to the userfaultfd kernel implementation.
Querying feature support, createing file descriptor, feature control,
memory region registration, IOCTLs on registered registered regions.

Signed-off-by: Andrey Gruzdev <andrey.gruzdev@virtuozzo.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <20210129101407.103458-3-andrey.gruzdev@virtuozzo.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
  Fixed up range.start casting for 32bit

3 years agomigration: introduce 'background-snapshot' migration capability
Andrey Gruzdev [Fri, 29 Jan 2021 10:14:03 +0000 (13:14 +0300)]
migration: introduce 'background-snapshot' migration capability

Add new capability to 'qapi/migration.json' schema.
Update migrate_caps_check() to validate enabled capability set
against introduced one. Perform checks for required kernel features
and compatibility with guest memory backends.

Signed-off-by: Andrey Gruzdev <andrey.gruzdev@virtuozzo.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210129101407.103458-2-andrey.gruzdev@virtuozzo.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agomigration/qemu-file: Fix maybe uninitialized on qemu_get_buffer_in_place()
Wainer dos Santos Moschetta [Thu, 28 Jan 2021 13:06:25 +0000 (10:06 -0300)]
migration/qemu-file: Fix maybe uninitialized on qemu_get_buffer_in_place()

Fixed error when compiling migration/qemu-file.c with -Werror=maybe-uninitialized
as shown here:

../migration/qemu-file.c: In function 'qemu_get_buffer_in_place':
../migration/qemu-file.c:604:18: error: 'src' may be used uninitialized in this function [-Werror=maybe-uninitialized]
  604 |             *buf = src;
      |             ~~~~~^~~~~
cc1: all warnings being treated as errors

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20210128130625.569900-1-wainersm@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agosavevm: Fix memory leak of vmstate_configuration
Jinhao Gao [Thu, 31 Dec 2020 06:10:19 +0000 (14:10 +0800)]
savevm: Fix memory leak of vmstate_configuration

When VM migrate VMState of configuration, the fields(name and capabilities)
of configuration having a flag of VMS_ALLOC need to allocate memory. If the
src doesn't free memory of capabilities in SaveState after save VMState of
configuration, or the dst doesn't free memory of name and capabilities in post
load of configuration, it may result in memory leak of name and capabilities.
We free memory in configuration_post_save and configuration_post_load func,
which prevents memory leak.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Jinhao Gao <gaojinhao@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20201231061020.828-3-gaojinhao@huawei.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agospapr_pci: Fix memory leak of vmstate_spapr_pci
Jinhao Gao [Thu, 31 Dec 2020 06:10:18 +0000 (14:10 +0800)]
spapr_pci: Fix memory leak of vmstate_spapr_pci

When VM migrate VMState of spapr_pci, the field(msi_devs) of spapr_pci
having a flag of VMS_ALLOC need to allocate memory. If the src doesn't free
memory of msi_devs in SaveStateEntry of spapr_pci after QEMUFile save
VMState of spapr_pci, it may result in memory leak of msi_devs. We add the
post_save func to free memory, which prevents memory leak.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Jinhao Gao <gaojinhao@huawei.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20201231061020.828-2-gaojinhao@huawei.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agoMerge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210207' into staging
Peter Maydell [Mon, 8 Feb 2021 09:23:53 +0000 (09:23 +0000)]
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210207' into staging

qemu-sparc queue

# gpg: Signature made Sun 07 Feb 2021 22:09:12 GMT
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg:                issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-20210207:
  utils/fifo8: add VMSTATE_FIFO8_TEST macro
  utils/fifo8: change fatal errors from abort() to assert()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoutils/fifo8: add VMSTATE_FIFO8_TEST macro
Mark Cave-Ayland [Thu, 28 Jan 2021 22:17:28 +0000 (22:17 +0000)]
utils/fifo8: add VMSTATE_FIFO8_TEST macro

Rewrite the existing VMSTATE_FIFO8 macro to use VMSTATE_FIFO8_TEST as per the
standard pattern in include/migration/vmstate.h.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210128221728.14887-3-mark.cave-ayland@ilande.co.uk>

3 years agoutils/fifo8: change fatal errors from abort() to assert()
Mark Cave-Ayland [Thu, 28 Jan 2021 22:17:27 +0000 (22:17 +0000)]
utils/fifo8: change fatal errors from abort() to assert()

Developer errors are better represented with assert() rather than abort(). Also
improve the strictness of the checks by using range checks within the assert()
rather than converting the existing equality checks to inequality checks.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210121102518.20112-1-mark.cave-ayland@ilande.co.uk>

3 years agoMerge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210205' into staging
Peter Maydell [Fri, 5 Feb 2021 22:59:12 +0000 (22:59 +0000)]
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210205' into staging

TCGCPUOps cleanups (claudio)
tcg/s390 compare fix (phil)
tcg/aarch64 rotli_vec fix
tcg/tci cleanups and fixes

# gpg: Signature made Fri 05 Feb 2021 22:55:10 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210205: (46 commits)
  accel: introduce AccelCPUClass extending CPUClass
  accel: replace struct CpusAccel with AccelOpsClass
  accel: extend AccelState and AccelClass to user-mode
  cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
  cpu: move debug_check_watchpoint to tcg_ops
  cpu: move adjust_watchpoint_address to tcg_ops
  physmem: make watchpoint checking code TCG-only
  cpu: move do_unaligned_access to tcg_ops
  cpu: move cc->transaction_failed to tcg_ops
  cpu: move cc->do_interrupt to tcg_ops
  target/arm: do not use cc->do_interrupt for KVM directly
  cpu: Move debug_excp_handler to tcg_ops
  cpu: Move tlb_fill to tcg_ops
  cpu: Move cpu_exec_* to tcg_ops
  cpu: Move synchronize_from_tb() to tcg_ops
  accel/tcg: split TCG-only code from cpu_exec_realizefn
  target/riscv: remove CONFIG_TCG, as it is always TCG
  cpu: Introduce TCGCpuOperations struct
  tcg/tci: Remove TCG_CONST
  tcg/tci: Fix TCG_REG_R4 misusage
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoaccel: introduce AccelCPUClass extending CPUClass
Claudio Fontana [Thu, 4 Feb 2021 16:39:26 +0000 (17:39 +0100)]
accel: introduce AccelCPUClass extending CPUClass

add a new optional interface to CPUClass, which allows accelerators
to extend the CPUClass with additional accelerator-specific
initializations.

This will allow to separate the target cpu code that is specific
to each accelerator, and register it automatically with object
hierarchy lookup depending on accelerator code availability,
as part of the accel_init_interfaces() initialization step.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-19-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoaccel: replace struct CpusAccel with AccelOpsClass
Claudio Fontana [Thu, 4 Feb 2021 16:39:25 +0000 (17:39 +0100)]
accel: replace struct CpusAccel with AccelOpsClass

This will allow us to centralize the registration of
the cpus.c module accelerator operations (in accel/accel-softmmu.c),
and trigger it automatically using object hierarchy lookup from the
new accel_init_interfaces() initialization step, depending just on
which accelerators are available in the code.

Rename all tcg-cpus.c, kvm-cpus.c, etc to tcg-accel-ops.c,
kvm-accel-ops.c, etc, matching the object type names.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-18-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoaccel: extend AccelState and AccelClass to user-mode
Claudio Fontana [Thu, 4 Feb 2021 16:39:24 +0000 (17:39 +0100)]
accel: extend AccelState and AccelClass to user-mode

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
[claudio: rebased on Richard's splitwx work]

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-17-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana [Thu, 4 Feb 2021 16:39:23 +0000 (17:39 +0100)]
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.

Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header file,
which is only included by TCG, target-specific code.

This leaves just a NULL pointer in the cpu.h for the non-TCG builds.

This also tidies up the code in all targets a bit, having all TCG cpu
operations neatly contained by a dedicated data struct.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-16-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: move debug_check_watchpoint to tcg_ops
Claudio Fontana [Thu, 4 Feb 2021 16:39:22 +0000 (17:39 +0100)]
cpu: move debug_check_watchpoint to tcg_ops

commit 568496c0c0f1 ("cpu: Add callback to check architectural") and
commit 3826121d9298 ("target-arm: Implement checking of fired")
introduced an ARM-specific hack for cpu_check_watchpoint.

Make debug_check_watchpoint optional, and move it to tcg_ops.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-15-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: move adjust_watchpoint_address to tcg_ops
Claudio Fontana [Thu, 4 Feb 2021 16:39:21 +0000 (17:39 +0100)]
cpu: move adjust_watchpoint_address to tcg_ops

commit 40612000599e ("arm: Correctly handle watchpoints for BE32 CPUs")

introduced this ARM-specific, TCG-specific hack to adjust the address,
before checking it with cpu_check_watchpoint.

Make adjust_watchpoint_address optional and move it to tcg_ops.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-14-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agophysmem: make watchpoint checking code TCG-only
Claudio Fontana [Thu, 4 Feb 2021 16:39:20 +0000 (17:39 +0100)]
physmem: make watchpoint checking code TCG-only

cpu_check_watchpoint, watchpoint_address_matches are TCG-only.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-13-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: move do_unaligned_access to tcg_ops
Claudio Fontana [Thu, 4 Feb 2021 16:39:19 +0000 (17:39 +0100)]
cpu: move do_unaligned_access to tcg_ops

make it consistently SOFTMMU-only.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio: make the field presence in cpu.h unconditional, removing the ifdefs]
Message-Id: <20210204163931.7358-12-cfontana@suse.de>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: move cc->transaction_failed to tcg_ops
Claudio Fontana [Thu, 4 Feb 2021 16:39:18 +0000 (17:39 +0100)]
cpu: move cc->transaction_failed to tcg_ops

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio: wrap target code around CONFIG_TCG and !CONFIG_USER_ONLY]

avoiding its use in headers used by common_ss code (should be poisoned).

Note: need to be careful with the use of CONFIG_USER_ONLY,
Message-Id: <20210204163931.7358-11-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: move cc->do_interrupt to tcg_ops
Claudio Fontana [Thu, 4 Feb 2021 16:39:17 +0000 (17:39 +0100)]
cpu: move cc->do_interrupt to tcg_ops

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204163931.7358-10-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotarget/arm: do not use cc->do_interrupt for KVM directly
Claudio Fontana [Thu, 4 Feb 2021 16:39:16 +0000 (17:39 +0100)]
target/arm: do not use cc->do_interrupt for KVM directly

cc->do_interrupt is in theory a TCG callback used in accel/tcg only,
to prepare the emulated architecture to take an interrupt as defined
in the hardware specifications,

but in reality the _do_interrupt style of functions in targets are
also occasionally reused by KVM to prepare the architecture state in a
similar way where userspace code has identified that it needs to
deliver an exception to the guest.

In the case of ARM, that includes:

1) the vcpu thread got a SIGBUS indicating a memory error,
   and we need to deliver a Synchronous External Abort to the guest to
   let it know about the error.
2) the kernel told us about a debug exception (breakpoint, watchpoint)
   but it is not for one of QEMU's own gdbstub breakpoints/watchpoints
   so it must be a breakpoint the guest itself has set up, therefore
   we need to deliver it to the guest.

So in order to reuse code, the same arm_do_interrupt function is used.
This is all fine, but we need to avoid calling it using the callback
registered in CPUClass, since that one is now TCG-only.

Fortunately this is easily solved by replacing calls to
CPUClass::do_interrupt() with explicit calls to arm_do_interrupt().

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210204163931.7358-9-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: Move debug_excp_handler to tcg_ops
Eduardo Habkost [Thu, 4 Feb 2021 16:39:15 +0000 (17:39 +0100)]
cpu: Move debug_excp_handler to tcg_ops

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204163931.7358-8-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: Move tlb_fill to tcg_ops
Eduardo Habkost [Thu, 4 Feb 2021 16:39:14 +0000 (17:39 +0100)]
cpu: Move tlb_fill to tcg_ops

[claudio: wrapped target code in CONFIG_TCG]

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204163931.7358-7-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost [Thu, 4 Feb 2021 16:39:13 +0000 (17:39 +0100)]
cpu: Move cpu_exec_* to tcg_ops

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
[claudio: wrapped target code in CONFIG_TCG]
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204163931.7358-6-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: Move synchronize_from_tb() to tcg_ops
Eduardo Habkost [Thu, 4 Feb 2021 16:39:12 +0000 (17:39 +0100)]
cpu: Move synchronize_from_tb() to tcg_ops

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
[claudio: wrapped target code in CONFIG_TCG, reworded comments]
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-5-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoaccel/tcg: split TCG-only code from cpu_exec_realizefn
Claudio Fontana [Thu, 4 Feb 2021 16:39:11 +0000 (17:39 +0100)]
accel/tcg: split TCG-only code from cpu_exec_realizefn

move away TCG-only code, make it compile only on TCG.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio: moved the prototypes from hw/core/cpu.h to exec/cpu-all.h]
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-4-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotarget/riscv: remove CONFIG_TCG, as it is always TCG
Claudio Fontana [Thu, 4 Feb 2021 16:39:10 +0000 (17:39 +0100)]
target/riscv: remove CONFIG_TCG, as it is always TCG

for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-3-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agocpu: Introduce TCGCpuOperations struct
Eduardo Habkost [Thu, 4 Feb 2021 16:39:09 +0000 (17:39 +0100)]
cpu: Introduce TCGCpuOperations struct

The TCG-specific CPU methods will be moved to a separate struct,
to make it easier to move accel-specific code outside generic CPU
code in the future.  Start by moving tcg_initialize().

The new CPUClass.tcg_opts field may eventually become a pointer,
but keep it an embedded struct for now, to make code conversion
easier.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
[claudio: move TCGCpuOperations inside include/hw/core/cpu.h]
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210204163931.7358-2-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Remove TCG_CONST
Richard Henderson [Fri, 29 Jan 2021 01:07:41 +0000 (15:07 -1000)]
tcg/tci: Remove TCG_CONST

Restrict all operands to registers.  All constants will be forced
into registers by the middle-end.  Removing the difference in how
immediate integers were encoded will allow more code to be shared
between 32-bit and 64-bit operations.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Fix TCG_REG_R4 misusage
Richard Henderson [Fri, 29 Jan 2021 00:55:57 +0000 (14:55 -1000)]
tcg/tci: Fix TCG_REG_R4 misusage

This was removed from tcg_target_reg_alloc_order and
tcg_target_call_iarg_regs on the assumption that it
was the stack.  This was incorrectly copied from i386.
For tci, the stack is R15.

By adding R4 back to tcg_target_call_iarg_regs, adjust the other
entries so that 6 (or 12) entries are still present in the array,
and adjust the numbers in the interpreter.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Restrict TCG_TARGET_NB_REGS to 16
Richard Henderson [Fri, 29 Jan 2021 00:54:16 +0000 (14:54 -1000)]
tcg/tci: Restrict TCG_TARGET_NB_REGS to 16

As noted in several comments, 8 regs is not enough for 32-bit
to perform calls, as currently implemented.  Shortly, we will
rearrange the encoding which will make 32 regs impossible.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Remove TODO as unused
Richard Henderson [Thu, 28 Jan 2021 08:01:17 +0000 (22:01 -1000)]
tcg/tci: Remove TODO as unused

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Implement 64-bit division
Richard Henderson [Thu, 28 Jan 2021 06:30:00 +0000 (20:30 -1000)]
tcg/tci: Implement 64-bit division

Trivially implemented like other arithmetic.
Tested via check-tcg and the ppc64 target.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*
Richard Henderson [Thu, 28 Jan 2021 06:17:49 +0000 (20:17 -1000)]
tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*

We do not simultaneously support div and div2 -- it's one
or the other.  TCI is already using div, so remove div2.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Use g_assert_not_reached
Richard Henderson [Thu, 28 Jan 2021 06:11:11 +0000 (20:11 -1000)]
tcg/tci: Use g_assert_not_reached

Three TODO instances are never happen cases.
Other uses of tcg_abort are also indicating unreachable cases.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_{st_i32,st32_i64}
Richard Henderson [Thu, 28 Jan 2021 05:53:59 +0000 (19:53 -1000)]
tcg/tci: Merge INDEX_op_{st_i32,st32_i64}

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Move stack bounds check to compile-time
Richard Henderson [Thu, 28 Jan 2021 06:04:43 +0000 (20:04 -1000)]
tcg/tci: Move stack bounds check to compile-time

The existing check was incomplete:
(1) Only applied to two of the 7 stores, and not to the loads at all.
(2) Only checked the upper, but not the lower bound of the stack.

Doing this at compile time means that we don't need to do it
at runtime as well.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_st16_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:49:37 +0000 (19:49 -1000)]
tcg/tci: Merge INDEX_op_st16_{i32,i64}

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_st8_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:47:02 +0000 (19:47 -1000)]
tcg/tci: Merge INDEX_op_st8_{i32,i64}

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64}
Richard Henderson [Thu, 28 Jan 2021 05:44:01 +0000 (19:44 -1000)]
tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64}

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_ld16s_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:42:42 +0000 (19:42 -1000)]
tcg/tci: Merge INDEX_op_ld16s_{i32,i64}

Eliminating a TODO for ld16s_i64.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_ld16u_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:41:17 +0000 (19:41 -1000)]
tcg/tci: Merge INDEX_op_ld16u_{i32,i64}

Eliminating a TODO for ld16u_i32.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_ld8s_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:39:39 +0000 (19:39 -1000)]
tcg/tci: Merge INDEX_op_ld8s_{i32,i64}

Eliminating a TODO for ld8s_i32.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Merge INDEX_op_ld8u_{i32,i64}
Richard Henderson [Thu, 28 Jan 2021 05:37:55 +0000 (19:37 -1000)]
tcg/tci: Merge INDEX_op_ld8u_{i32,i64}

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Inline tci_write_reg64 into 64-bit callers
Richard Henderson [Thu, 28 Jan 2021 05:35:07 +0000 (19:35 -1000)]
tcg/tci: Inline tci_write_reg64 into 64-bit callers

Note that we had two functions of the same name: a 32-bit version
which took two register numbers and a 64-bit version which was a
no-op wrapper for tcg_write_reg.  After this, we are left with
only the 32-bit version.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Inline tci_write_reg32 into all callers
Richard Henderson [Thu, 28 Jan 2021 05:31:49 +0000 (19:31 -1000)]
tcg/tci: Inline tci_write_reg32 into all callers

For a 64-bit TCI, the upper bits of a 32-bit operation are
undefined (much like a native ppc64 32-bit operation).  It
simplifies everything if we don't force-extend the result.

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Inline tci_write_reg16 into the only caller
Richard Henderson [Thu, 28 Jan 2021 05:25:42 +0000 (19:25 -1000)]
tcg/tci: Inline tci_write_reg16 into the only caller

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Inline tci_write_reg8 into its callers
Richard Henderson [Thu, 28 Jan 2021 05:23:55 +0000 (19:23 -1000)]
tcg/tci: Inline tci_write_reg8 into its callers

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Inline tci_write_reg32s into the only caller
Richard Henderson [Thu, 28 Jan 2021 05:21:10 +0000 (19:21 -1000)]
tcg/tci: Inline tci_write_reg32s into the only caller

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Implement INDEX_op_ld8s_i64
Stefan Weil [Thu, 28 Jan 2021 02:04:25 +0000 (03:04 +0100)]
tcg/tci: Implement INDEX_op_ld8s_i64

That TCG opcode is used by debian-buster (arm64) running ffmpeg:

    qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20210128020425.2055454-1-sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Implement INDEX_op_ld16s_i32
Stefan Weil [Thu, 28 Jan 2021 02:48:14 +0000 (03:48 +0100)]
tcg/tci: Implement INDEX_op_ld16s_i32

That TCG opcode is used by debian-buster (arm64) running ffmpeg:

    qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm

Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20210128024814.2056958-1-sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Make tci_tb_ptr thread-local
Richard Henderson [Sun, 24 Jan 2021 20:57:01 +0000 (10:57 -1000)]
tcg/tci: Make tci_tb_ptr thread-local

Each thread must have its own pc, even under TCI.

Remove the GETPC ifdef, because GETPC is always available for
helpers, and thus is always required.  Move the assignment
under INDEX_op_call, because the value is only visible when
we make a call to a helper function.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204014509.882821-6-richard.henderson@linaro.org>

3 years agoconfigure: Fix --enable-tcg-interpreter
Richard Henderson [Sun, 24 Jan 2021 21:10:55 +0000 (11:10 -1000)]
configure: Fix --enable-tcg-interpreter

The configure option was backward, and we failed to
pass the value on to meson.

Fixes: 23a77b2d18b ("build-system: clean up TCG/TCI configury")
Tested-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/aarch64: Do not convert TCGArg to temps that are not temps
Richard Henderson [Fri, 5 Feb 2021 01:48:20 +0000 (01:48 +0000)]
tcg/aarch64: Do not convert TCGArg to temps that are not temps

Fixes INDEX_op_rotli_vec for aarch64 host, where the 3rd
argument is an integer, not a temporary, which now tickles
an assert added in e89b28a6350.

Previously, the value computed into v2 would be garbage for
rotli_vec, but as the value was unused it caused no harm.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoexec/cpu-defs: Remove TCG backends dependency
Philippe Mathieu-Daudé [Thu, 4 Feb 2021 19:14:23 +0000 (20:14 +0100)]
exec/cpu-defs: Remove TCG backends dependency

"exec/cpu-defs.h" contains generic CPU definitions for the
TCG frontends (mostly related to TLB). TCG backends definitions
aren't relevant here.

See tcg/README description:

  4) Backend

  tcg-target.h contains the target specific definitions. tcg-target.c.inc
  contains the target specific code; it is #included by tcg/tcg.c, rather
  than being a standalone C file.

So far only "tcg/tcg.h" requires these headers.

Remove the "target-tcg.h" header dependency on TCG frontends, so we
don't have to rebuild all frontends when hacking a single backend.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210204191423.1754158-1-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/s390: Fix compare instruction from extended-immediate facility
Philippe Mathieu-Daudé [Thu, 4 Feb 2021 18:29:02 +0000 (19:29 +0100)]
tcg/s390: Fix compare instruction from extended-immediate facility

The code is currently comparing c2 to the type promotion of
uint32_t and int32_t. That is, the conversion rules are as:

  (common_type) c2 == (common_type) (uint32_t)
                        (is_unsigned
                        ? (uint32_t)c2
                        : (uint32_t)(int32_t)c2)

In the signed case we lose the desired sign extensions because
of the argument promotion rules of the ternary operator.

Solve the problem by doing the round-trip parsing through the
intermediate type and back to the desired common type (all at
one expression).

Fixes: a534bb15f30 ("tcg/s390: Use constant pool for cmpi")
Tested-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
Reported-by: Richard W.M. Jones <rjones@redhat.com>
Suggested-by: David Hildenbrand <david@redhat.com>
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210204182902.1742826-1-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell [Fri, 5 Feb 2021 15:27:02 +0000 (15:27 +0000)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pc,virtio,pci: fixes, features,code removal

Fixes all over the place.
Ability to control ACPI OEM ID's.
Ability to control rom BAR size.
Removal of deprecated pc machine types.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Fri 05 Feb 2021 13:54:32 GMT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  tests/acpi: disallow updates for expected data files
  tests/acpi: update expected data files
  tests/acpi: add OEM ID and OEM TABLE ID test
  acpi: use constants as strncpy limit
  acpi: Permit OEM ID and OEM table ID fields to be changed
  tests/acpi: allow updates for expected data files
  vhost: Check for valid vdev in vhost_backend_handle_iotlb_msg
  hw/virtio/virtio-balloon: Remove the "class" property
  hw/i386: Remove the deprecated pc-1.x machine types
  vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support
  virtio-pmem: add trace events
  virtio: Add corresponding memory_listener_unregister to unrealize
  virtio-mmio: fix guest kernel crash with SHM regions
  virtio: move 'use-disabled-flag' property to hw_compat_4_2
  pci: add romsize property
  pci: reject too large ROMs

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoiotests: 30: drop from auto group (and effectively from make check)
Vladimir Sementsov-Ogievskiy [Fri, 5 Feb 2021 11:10:21 +0000 (14:10 +0300)]
iotests: 30: drop from auto group (and effectively from make check)

I reproduced the following crash fast enough:

0  raise () at /lib64/libc.so.6
1  abort () at /lib64/libc.so.6
2  _nl_load_domain.cold () at /lib64/libc.so.6
3  annobin_assert.c_end () at /lib64/libc.so.6
4  bdrv_reopen_multiple (bs_queue=0x55de75fa9b70, errp=0x0)
   at ../block.c:3820
5  bdrv_reopen_set_read_only (bs=0x55de760fc020, read_only=true,
   errp=0x0) at ../block.c:3870
6  stream_clean (job=0x55de75fa9410) at ../block/stream.c:99
7  job_clean (job=0x55de75fa9410) at ../job.c:680
8  job_finalize_single (job=0x55de75fa9410) at ../job.c:696
9  job_txn_apply (job=0x55de75fa9410,
   fn=0x55de741eee27 <job_finalize_single>) at ../job.c:158
10 job_do_finalize (job=0x55de75fa9410) at ../job.c:805
11 job_completed_txn_success (job=0x55de75fa9410) at ../job.c:855
12 job_completed (job=0x55de75fa9410) at ../job.c:868
13 job_exit (opaque=0x55de75fa9410) at ../job.c:888
14 aio_bh_call (bh=0x55de76b9b4e0) at ../util/async.c:136
15 aio_bh_poll (ctx=0x55de75bc5300) at ../util/async.c:164
16 aio_dispatch (ctx=0x55de75bc5300) at ../util/aio-posix.c:381
17 aio_ctx_dispatch (source=0x55de75bc5300, callback=0x0,
   user_data=0x0) at ../util/async.c:306
18 g_main_context_dispatch () at /lib64/libglib-2.0.so.0
19 glib_pollfds_poll () at ../util/main-loop.c:232
20 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:255
21 main_loop_wait (nonblocking=0) at ../util/main-loop.c:531
22 qemu_main_loop () at ../softmmu/runstate.c:722
23 main (argc=20, argv=0x7ffe218f0268, envp=0x7ffe218f0310) at
   ../softmmu/main.c:50

(gdb) fr 4
4  bdrv_reopen_multiple (bs_queue=0x55de75fa9b70, errp=0x0) at
      ../block.c:3820
3820                assert(perm == state->perm);
(gdb) list
3815
3816            if (ret == 0) {
3817                uint64_t perm, shared;
3818
3819                bdrv_get_cumulative_perm(state->bs, &perm,
                    &shared);
3820                assert(perm == state->perm);
3821                assert(shared == state->shared_perm);
3822
3823                bdrv_set_perm(state->bs);
3824            } else {
(gdb) p perm
$1 = 1
(gdb) p state->perm
$2 = 0

Then I had 38 successful iterations and another crash:
0  bdrv_check_update_perm (bs=0x5631ac97bc50, q=0x0, new_used_perm=1,
   new_shared_perm=31, ignore_children=0x0, errp=0x7ffd9d477cf8) at
   ../block.c:2197
1  bdrv_root_attach_child
    (child_bs=0x5631ac97bc50, child_name=0x5631aaf6b1f9 "backing",
    child_class=0x5631ab280ca0 <child_of_bds>, child_role=8,
    ctx=0x5631ab757300, perm=1, shared_perm=31, opaque=0x5631abb8c020,
    errp=0x7ffd9d477cf8)
    at ../block.c:2642
2  bdrv_attach_child (parent_bs=0x5631abb8c020,
   child_bs=0x5631ac97bc50, child_name=0x5631aaf6b1f9 "backing",
   child_class=0x5631ab280ca0 <child_of_bds>, child_role=8,
   errp=0x7ffd9d477cf8)
    at ../block.c:2719
3  bdrv_set_backing_hd (bs=0x5631abb8c020, backing_hd=0x5631ac97bc50,
   errp=0x7ffd9d477cf8) at ../block.c:2854
4  stream_prepare (job=0x5631ac751eb0) at ../block/stream.c:74
5  job_prepare (job=0x5631ac751eb0) at ../job.c:784
6  job_txn_apply (job=0x5631ac751eb0, fn=0x5631aacb1156 <job_prepare>)
   at ../job.c:158
7  job_do_finalize (job=0x5631ac751eb0) at ../job.c:801
8  job_completed_txn_success (job=0x5631ac751eb0) at ../job.c:855
9  job_completed (job=0x5631ac751eb0) at ../job.c:868
10 job_exit (opaque=0x5631ac751eb0) at ../job.c:888
11 aio_bh_call (bh=0x7f3d9c007680) at ../util/async.c:136
12 aio_bh_poll (ctx=0x5631ab757300) at ../util/async.c:164
13 aio_dispatch (ctx=0x5631ab757300) at ../util/aio-posix.c:381
14 aio_ctx_dispatch (source=0x5631ab757300, callback=0x0,
   user_data=0x0) at ../util/async.c:306
15 g_main_context_dispatch () at /lib64/libglib-2.0.so.0
16 glib_pollfds_poll () at ../util/main-loop.c:232
17 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:255
18 main_loop_wait (nonblocking=0) at ../util/main-loop.c:531
19 qemu_main_loop () at ../softmmu/runstate.c:722
20 main (argc=20, argv=0x7ffd9d478198, envp=0x7ffd9d478240) at
   ../softmmu/main.c:50
(gdb) list
2192        QLIST_FOREACH(c, &bs->parents, next_parent) {
2193            if (g_slist_find(ignore_children, c)) {
2194                continue;
2195            }
2196
2197            if ((new_used_perm & c->shared_perm) != new_used_perm)
                {
2198                char *user = bdrv_child_user_desc(c);
2199                char *perm_names = bdrv_perm_names(new_used_perm &
                    ~c->shared_perm);
2200
2201                error_setg(errp, "Conflicts with use by %s as '%s',
                    which does not "
(gdb) p c
$1 = (BdrvChild *) 0x8585858585858585

Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id: 20210205111021.715240-1-vsementsov@virtuozzo.com
Reviewed-by: Eric Blake <eblake@redhat.com>
[PMM: trimmed the part of the commit message referring to
as-yet-unapplied patchseries]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agotests/acpi: disallow updates for expected data files
Marian Postevca [Tue, 19 Jan 2021 00:32:16 +0000 (02:32 +0200)]
tests/acpi: disallow updates for expected data files

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-6-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agotests/acpi: update expected data files
Marian Postevca [Tue, 19 Jan 2021 00:32:15 +0000 (02:32 +0200)]
tests/acpi: update expected data files

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-5-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agotests/acpi: add OEM ID and OEM TABLE ID test
Marian Postevca [Tue, 19 Jan 2021 00:32:14 +0000 (02:32 +0200)]
tests/acpi: add OEM ID and OEM TABLE ID test

Add support for testing the fields OEM ID and
OEM TABLE ID in all ACPI tables for PC,Q35,MICROVM,AARCH64

Full diff of changed files disassembly:
Table tests/data/acpi/virt/FACP diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-VQIIX0, Mon Jan 18 23:55:00 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : BB
+[009h 0009   1]                     Checksum : 55
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/APIC diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-BQIIX0, Mon Jan 18 23:55:00 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 000000A8
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : B3
+[009h 0009   1]                     Checksum : 50
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/GTDT diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-QQIIX0, Mon Jan 18 23:55:00 2021
  *
  * ACPI Data Table [GTDT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "GTDT"    [Generic Timer Description Table]
 [004h 0004   4]                 Table Length : 00000060
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : D9
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCGTDT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/MCFG diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-OQIIX0, Mon Jan 18 23:55:00 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 4F
+[009h 0009   1]                     Checksum : EC
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SPCR diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-EMIIX0, Mon Jan 18 23:55:00 2021
  *
  * ACPI Data Table [SPCR]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SPCR"    [Serial Port Console Redirection table]
 [004h 0004   4]                 Table Length : 00000050
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : 13
+[009h 0009   1]                     Checksum : CB
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSPCR"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/DSDT diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/virt/DSDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-RMIIX0, Mon Jan 18 23:55:00 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001454 (5204)
  *     Revision         0x02
- *     Checksum         0x60
+ *     Checksum         0x0F
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\_SB)
     {

Table tests/data/acpi/virt/FACP.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-JROMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : BB
+[009h 0009   1]                     Checksum : 55
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/APIC.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-2ROMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 000000A8
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : B3
+[009h 0009   1]                     Checksum : 50
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/GTDT.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-WROMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [GTDT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "GTDT"    [Generic Timer Description Table]
 [004h 0004   4]                 Table Length : 00000060
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : D9
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCGTDT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/MCFG.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-YOOMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 4F
+[009h 0009   1]                     Checksum : EC
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SPCR.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-TOOMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [SPCR]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SPCR"    [Serial Port Console Redirection table]
 [004h 0004   4]                 Table Length : 00000050
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : 13
+[009h 0009   1]                     Checksum : CB
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSPCR"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SRAT.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-LPOMX0, Mon Jan 18 23:55:27 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 0000006A
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : AB
+[009h 0009   1]                     Checksum : 65
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/DSDT.numamem diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-HPOMX0, Mon Jan 18 23:55:27 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001454 (5204)
  *     Revision         0x02
- *     Checksum         0x60
+ *     Checksum         0x0F
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\_SB)
     {

Table tests/data/acpi/virt/FACP.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/FACP.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-OERTX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : BB
+[009h 0009   1]                     Checksum : 55
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/APIC.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/APIC.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FERTX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 000000A8
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : B3
+[009h 0009   1]                     Checksum : 50
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/GTDT.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/GTDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-BERTX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [GTDT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "GTDT"    [Generic Timer Description Table]
 [004h 0004   4]                 Table Length : 00000060
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : D9
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCGTDT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/MCFG.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/MCFG.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-8DRTX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 4F
+[009h 0009   1]                     Checksum : EC
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SPCR.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SPCR.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-IN6NX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [SPCR]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SPCR"    [Serial Port Console Redirection table]
 [004h 0004   4]                 Table Length : 00000050
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : 13
+[009h 0009   1]                     Checksum : CB
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSPCR"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SRAT.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SRAT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FN6NX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 000000E2
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 5C
+[009h 0009   1]                     Checksum : 16
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SLIT.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-CN6NX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [SLIT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SLIT"    [System Locality Information Table]
 [004h 0004   4]                 Table Length : 00000030
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 2C
+[009h 0009   1]                     Checksum : E8
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSLIT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SSDT.memhp diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-9M6NX0, Mon Jan 18 23:55:41 2021
  *
  * Original Table Header:
  *     Signature        "SSDT"
  *     Length           0x000002E0 (736)
  *     Revision         0x01
- *     Checksum         0x3F
+ *     Checksum         0xFF
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "NVDIMM"
+ *     OEM Table ID     "NVDIMM  "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM  ", 0x00000001)
 {
     Scope (\_SB)
     {

Table tests/data/acpi/virt/NFIT.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-6M6NX0, Mon Jan 18 23:55:41 2021
  *
  * ACPI Data Table [NFIT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "NFIT"    [NVDIMM Firmware Interface Table]
 [004h 0004   4]                 Table Length : 000000E0
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : D1
+[009h 0009   1]                     Checksum : 82
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCNFIT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/DSDT.memhp diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-3M6NX0, Mon Jan 18 23:55:41 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000019A5 (6565)
  *     Revision         0x02
- *     Checksum         0x90
+ *     Checksum         0x3F
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     External (_SB_.NVDR, UnknownObj)

Table tests/data/acpi/virt/FACP.pxb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-206LX0, Mon Jan 18 23:55:52 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : BB
+[009h 0009   1]                     Checksum : 55
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/APIC.pxb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-E16LX0, Mon Jan 18 23:55:52 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 000000A8
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : B3
+[009h 0009   1]                     Checksum : 50
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/GTDT.pxb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-J16LX0, Mon Jan 18 23:55:52 2021
  *
  * ACPI Data Table [GTDT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "GTDT"    [Generic Timer Description Table]
 [004h 0004   4]                 Table Length : 00000060
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : D9
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCGTDT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/MCFG.pxb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-N16LX0, Mon Jan 18 23:55:52 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 4F
+[009h 0009   1]                     Checksum : EC
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/SPCR.pxb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-B16LX0, Mon Jan 18 23:55:52 2021
  *
  * ACPI Data Table [SPCR]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SPCR"    [Serial Port Console Redirection table]
 [004h 0004   4]                 Table Length : 00000050
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : 13
+[009h 0009   1]                     Checksum : CB
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSPCR"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/virt/DSDT.pxb diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-G16LX0, Mon Jan 18 23:55:52 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001E09 (7689)
  *     Revision         0x02
- *     Checksum         0x30
+ *     Checksum         0xDF
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\_SB)
     {

Table tests/data/acpi/pc/HPET diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-QNVAX0, Mon Jan 18 23:58:53 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/WAET diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-NNVAX0, Mon Jan 18 23:58:53 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/FACP.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-MB7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3C7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-0C7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/TPM2.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-ZC7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [TPM2]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "TPM2"    [Trusted Platform Module hardware interface table]
 [004h 0004   4]                 Table Length : 0000004C
 [008h 0008   1]                     Revision : 04
-[009h 0009   1]                     Checksum : 72
+[009h 0009   1]                     Checksum : 15
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCTPM2"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-XC7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.tis diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-VC7EX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.tis diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-RC7EX0, Mon Jan 18 23:58:55 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000020D7 (8407)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0xC8
+ *     Checksum         0x77
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/q35/FACP.bridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3N7NX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.bridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-WN7NX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.bridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-DI7NX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.bridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-BI7NX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.bridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-9H7NX0, Mon Jan 18 23:58:55 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.bridge diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.bridge, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-6H7NX0, Mon Jan 18 23:58:55 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001E8B (7819)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x8F
+ *     Checksum         0x3E
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/q35/FACP.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-KW0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-HR0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LR0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SRAT.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-OR0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 000000E0
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 3B
+[009h 0009   1]                     Checksum : F5
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-TR0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.mmio64 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ZR0GX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.mmio64 diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-7R0GX0, Mon Jan 18 23:58:56 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000022E4 (8932)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x9D
+ *     Checksum         0x4C
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/q35/FACP.ipmibt diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VVX8W0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.ipmibt diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-GUX8W0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.ipmibt diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LUX8W0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.ipmibt diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-QUX8W0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.ipmibt diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VUX8W0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.ipmibt diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.ipmibt, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-3UX8W0, Mon Jan 18 23:58:56 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001EC4 (7876)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x2A
+ *     Checksum         0xD9
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/q35/FACP.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-2HJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ARJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 000000A0
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 7B
+[009h 0009   1]                     Checksum : 18
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ERJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SRAT.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/SRAT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-IRJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 00000130
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 36
+[009h 0009   1]                     Checksum : F0
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SLIT.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/SLIT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-MRJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [SLIT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SLIT"    [System Locality Information Table]
 [004h 0004   4]                 Table Length : 00000030
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 2C
+[009h 0009   1]                     Checksum : E8
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSLIT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-PRJNX0, Mon Jan 18 23:58:56 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.cphp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-TRJNX0, Mon Jan 18 23:58:57 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.cphp diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.cphp, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-2RJNX0, Mon Jan 18 23:58:57 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00002049 (8265)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x5A
+ *     Checksum         0x09
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/q35/HPET.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-V1NBX0, Mon Jan 18 23:58:57 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.memhp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-B2NBX0, Mon Jan 18 23:58:57 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-BJ6PX0, Mon Jan 18 23:58:57 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.numamem diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-UH6PX0, Mon Jan 18 23:58:57 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/FACP.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ITDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-STDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000090
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : AE
+[009h 0009   1]                     Checksum : 4B
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-WTDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SRAT.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-XTJEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 00000188
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 68
+[009h 0009   1]                     Checksum : 22
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0TDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-8TDEX0, Mon Jan 18 23:58:58 2021
  *
  * Original Table Header:
  *     Signature        "SSDT"
  *     Length           0x000002DE (734)
  *     Revision         0x01
- *     Checksum         0x46
+ *     Checksum         0x06
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "NVDIMM"
+ *     OEM Table ID     "NVDIMM  "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM  ", 0x00000001)
 {
     Scope (\_SB)
     {

Table tests/data/acpi/q35/NFIT.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9VDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [NFIT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "NFIT"    [NVDIMM Firmware Interface Table]
 [004h 0004   4]                 Table Length : 000000F0
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 24
+[009h 0009   1]                     Checksum : D5
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCNFIT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.dimmpxm diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-DWDEX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-IWDEX0, Mon Jan 18 23:58:58 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000024EF (9455)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x26
+ *     Checksum         0xD5
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     External (_SB_.NVDR, UnknownObj)

Table tests/data/acpi/q35/FACP.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-OKSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 000000F4
 [008h 0008   1]                     Revision : 03
-[009h 0009   1]                     Checksum : 1F
+[009h 0009   1]                     Checksum : B9
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/APIC.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0KSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000080
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : DA
+[009h 0009   1]                     Checksum : 77
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HPET.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-5KSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/SRAT.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9KSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [SRAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "SRAT"    [System Resource Affinity Table]
 [004h 0004   4]                 Table Length : 00000118
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : C0
+[009h 0009   1]                     Checksum : 7A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCSRAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/HMAT.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ALYOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [HMAT]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HMAT"    [Heterogeneous Memory Attributes Table]
 [004h 0004   4]                 Table Length : 00000118
 [008h 0008   1]                     Revision : 02
-[009h 0009   1]                     Checksum : 98
+[009h 0009   1]                     Checksum : 42
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHMAT"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/MCFG.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ELSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [MCFG]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "MCFG"    [Memory Mapped Configuration table]
 [004h 0004   4]                 Table Length : 0000003C
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : EF
+[009h 0009   1]                     Checksum : 8C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCMCFG"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/WAET.acpihmat diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ILSOX0, Mon Jan 18 23:58:58 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/q35/DSDT.acpihmat diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/q35/DSDT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-2JSOX0, Mon Jan 18 23:58:58 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000023A6 (9126)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0xB3
+ *     Checksum         0x62
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/pc/FACP.ipmikcs diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-1HH9W0, Mon Jan 18 23:58:59 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 00000074
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : A1
+[009h 0009   1]                     Checksum : 3B
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/APIC.ipmikcs diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-GIH9W0, Mon Jan 18 23:58:59 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/HPET.ipmikcs diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-PIH9W0, Mon Jan 18 23:58:59 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/WAET.ipmikcs diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-OIH9W0, Mon Jan 18 23:58:59 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/DSDT.ipmikcs diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-9GH9W0, Mon Jan 18 23:58:59 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00001411 (5137)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x33
+ *     Checksum         0xE2
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/pc/FACP.roothp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-84PIX0, Mon Jan 18 23:59:01 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 00000074
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : A1
+[009h 0009   1]                     Checksum : 3B
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/APIC.roothp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-D5PIX0, Mon Jan 18 23:59:01 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/HPET.roothp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-P5PIX0, Mon Jan 18 23:59:01 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/WAET.roothp diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-N5PIX0, Mon Jan 18 23:59:01 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/DSDT.roothp diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-83PIX0, Mon Jan 18 23:59:02 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x0000148D (5261)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0xC6
+ *     Checksum         0x75
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/pc/FACP.hpbridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-2ZSAX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 00000074
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : A1
+[009h 0009   1]                     Checksum : 3B
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/APIC.hpbridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-B0SAX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/HPET.hpbridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-G2SAX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/WAET.hpbridge diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-F2SAX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/DSDT.hpbridge diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-R2SAX0, Mon Jan 18 23:59:02 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x000013A2 (5026)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0xD9
+ *     Checksum         0x88
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/pc/FACP.hpbrroot diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-D9COX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 00000074
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : A1
+[009h 0009   1]                     Checksum : 3B
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/APIC.hpbrroot diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-K9COX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000078
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : ED
+[009h 0009   1]                     Checksum : 8A
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/HPET.hpbrroot diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-L4COX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [HPET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "HPET"    [High Precision Event Timer table]
 [004h 0004   4]                 Table Length : 00000038
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 03
+[009h 0009   1]                     Checksum : B4
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCHPET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/WAET.hpbrroot diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-W4COX0, Mon Jan 18 23:59:02 2021
  *
  * ACPI Data Table [WAET]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "WAET"    [Windows ACPI Emulated Devices Table]
 [004h 0004   4]                 Table Length : 00000028
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : 88
+[009h 0009   1]                     Checksum : 39
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCWAET"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/pc/DSDT.hpbrroot diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-S4COX0, Mon Jan 18 23:59:02 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00000C0C (3084)
  *     Revision         0x01 **** 32-bit table (V1), no 64-bit math support
- *     Checksum         0x81
+ *     Checksum         0x30
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (\)
     {

Table tests/data/acpi/microvm/FACP.usb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-PZ3FX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : 7E
+[009h 0009   1]                     Checksum : 18
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/APIC.usb diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZZ3FX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000046
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : D7
+[009h 0009   1]                     Checksum : 74
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/DSDT.usb diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/microvm/DSDT.usb, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-XZ3FX0, Mon Jan 18 23:59:03 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x0000019E (414)
  *     Revision         0x02
- *     Checksum         0x72
+ *     Checksum         0x21
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (_SB)
     {

Table tests/data/acpi/microvm/FACP.rtc diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TX8BX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : 7E
+[009h 0009   1]                     Checksum : 18
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/APIC.rtc diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-QS8BX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000046
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : D7
+[009h 0009   1]                     Checksum : 74
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/DSDT.rtc diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/microvm/DSDT.rtc, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-4S8BX0, Mon Jan 18 23:59:03 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00000194 (404)
  *     Revision         0x02
- *     Checksum         0x30
+ *     Checksum         0xDF
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (_SB)
     {

Table tests/data/acpi/microvm/FACP.ioapic2 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZRMOX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : 7E
+[009h 0009   1]                     Checksum : 18
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/APIC.ioapic2 diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/APIC.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-VMMOX0, Mon Jan 18 23:59:03 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 00000052
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : E6
+[009h 0009   1]                     Checksum : 83
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/DSDT.ioapic2 diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/microvm/DSDT.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TMMOX0, Mon Jan 18 23:59:03 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x0000016D (365)
  *     Revision         0x02
- *     Checksum         0x1C
+ *     Checksum         0xCB
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (_SB)
     {

Table tests/data/acpi/microvm/FACP.pcie diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/FACP, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-M6CGX0, Tue Jan 19 00:03:13 2021
  *
  * ACPI Data Table [FACP]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "FACP"    [Fixed ACPI Description Table (FADT)]
 [004h 0004   4]                 Table Length : 0000010C
 [008h 0008   1]                     Revision : 05
-[009h 0009   1]                     Checksum : 7E
+[009h 0009   1]                     Checksum : 18
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCFACP"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/APIC.pcie diff:
@@ -3,7 +3,7 @@
  * AML/ASL+ Disassembler version 20200326 (64-bit version)
  * Copyright (c) 2000 - 2020 Intel Corporation
  *
- * Disassembly of tests/data/acpi/microvm/APIC.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-V6CGX0, Tue Jan 19 00:03:13 2021
  *
  * ACPI Data Table [APIC]
  *
@@ -13,9 +13,9 @@
 [000h 0000   4]                    Signature : "APIC"    [Multiple APIC Description Table (MADT)]
 [004h 0004   4]                 Table Length : 0000006E
 [008h 0008   1]                     Revision : 01
-[009h 0009   1]                     Checksum : DF
+[009h 0009   1]                     Checksum : 7C
 [00Ah 0010   6]                       Oem ID : "BOCHS "
-[010h 0016   8]                 Oem Table ID : "BXPCAPIC"
+[010h 0016   8]                 Oem Table ID : "BXPC    "
 [018h 0024   4]                 Oem Revision : 00000001
 [01Ch 0028   4]              Asl Compiler ID : "BXPC"
 [020h 0032   4]        Asl Compiler Revision : 00000001

Table tests/data/acpi/microvm/DSDT.pcie diff:
@@ -5,20 +5,20 @@
  *
  * Disassembling to symbolic ASL+ operators
  *
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-16CGX0, Tue Jan 19 00:03:13 2021
  *
  * Original Table Header:
  *     Signature        "DSDT"
  *     Length           0x00000BD7 (3031)
  *     Revision         0x02
- *     Checksum         0x99
+ *     Checksum         0x48
  *     OEM ID           "BOCHS "
- *     OEM Table ID     "BXPCDSDT"
+ *     OEM Table ID     "BXPC    "
  *     OEM Revision     0x00000001 (1)
  *     Compiler ID      "BXPC"
  *     Compiler Version 0x00000001 (1)
  */
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC    ", 0x00000001)
 {
     Scope (_SB)
     {

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-4-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agoacpi: use constants as strncpy limit
Michael S. Tsirkin [Tue, 2 Feb 2021 22:52:53 +0000 (17:52 -0500)]
acpi: use constants as strncpy limit

gcc is not smart enough to figure out length was validated before use as
strncpy limit, resulting in this warning:

inlined from ‘virt_set_oem_table_id’ at ../../hw/arm/virt.c:2197:5:
/usr/include/aarch64-linux-gnu/bits/string_fortified.h:106:10: error:
‘__builtin_strncpy’ specified bound depends on the length of the
source argument [-Werror=stringop-overflow=]

Simplify things by using a constant limit instead.

Fixes: 97fc5d507fca ("acpi: Permit OEM ID and OEM table ID fields to be changed")
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agoacpi: Permit OEM ID and OEM table ID fields to be changed
Marian Postevca [Tue, 19 Jan 2021 00:32:13 +0000 (02:32 +0200)]
acpi: Permit OEM ID and OEM table ID fields to be changed

Qemu's ACPI table generation sets the fields OEM ID and OEM table ID
to "BOCHS " and "BXPCxxxx" where "xxxx" is replaced by the ACPI
table name.

Some games like Red Dead Redemption 2 seem to check the ACPI OEM ID
and OEM table ID for the strings "BOCHS" and "BXPC" and if they are
found, the game crashes(this may be an intentional detection
mechanism to prevent playing the game in a virtualized environment).

This patch allows you to override these default values.

The feature can be used in this manner:
qemu -machine oem-id=ABCDEF,oem-table-id=GHIJKLMN

The oem-id string can be up to 6 bytes in size, and the
oem-table-id string can be up to 8 bytes in size. If the string are
smaller than their respective sizes they will be padded with space.
If either of these parameters is not set, the current default values
will be used for the one missing.

Note that the the OEM Table ID field will not be extended with the
name of the table, but will use either the default name or the user
provided one.

This does not affect the -acpitable option (for user-defined ACPI
tables), which has precedence over -machine option.

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-3-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agotests/acpi: allow updates for expected data files
Marian Postevca [Tue, 19 Jan 2021 00:32:12 +0000 (02:32 +0200)]
tests/acpi: allow updates for expected data files

Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-2-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agovhost: Check for valid vdev in vhost_backend_handle_iotlb_msg
Eugenio Pérez [Fri, 29 Jan 2021 09:07:28 +0000 (10:07 +0100)]
vhost: Check for valid vdev in vhost_backend_handle_iotlb_msg

Not checking this can lead to invalid dev->vdev member access in
vhost_device_iotlb_miss if backend issue an iotlb message in a bad
timing, either maliciously or by a bug.

Reproduced rebooting a guest with testpmd in txonly forward mode.
 #0  0x0000559ffff94394 in vhost_device_iotlb_miss (
     dev=dev@entry=0x55a0012f6680, iova=10245279744, write=1)
     at ../hw/virtio/vhost.c:1013
 #1  0x0000559ffff9ac31 in vhost_backend_handle_iotlb_msg (
     imsg=0x7ffddcfd32c0, dev=0x55a0012f6680)
     at ../hw/virtio/vhost-backend.c:411
 #2  vhost_backend_handle_iotlb_msg (dev=dev@entry=0x55a0012f6680,
     imsg=imsg@entry=0x7ffddcfd32c0)
     at ../hw/virtio/vhost-backend.c:404
 #3  0x0000559fffeded7b in slave_read (opaque=0x55a0012f6680)
     at ../hw/virtio/vhost-user.c:1464
 #4  0x000055a0000c541b in aio_dispatch_handler (
     ctx=ctx@entry=0x55a0010a2120, node=0x55a0012d9e00)
     at ../util/aio-posix.c:329

Fixes: 020e571b8b ("vhost: rework IOTLB messaging")
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20210129090728.831208-1-eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agohw/virtio/virtio-balloon: Remove the "class" property
Thomas Huth [Wed, 3 Feb 2021 17:18:31 +0000 (18:18 +0100)]
hw/virtio/virtio-balloon: Remove the "class" property

This property was only required for compatibility reasons in the
pc-1.0 machine type and earlier. Now that these machine types have
been removed, the property is not useful anymore.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210203171832.483176-4-thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: David Hildenbrand <david@redhat.com>
3 years agohw/i386: Remove the deprecated pc-1.x machine types
Thomas Huth [Wed, 3 Feb 2021 17:18:29 +0000 (18:18 +0100)]
hw/i386: Remove the deprecated pc-1.x machine types

They have been deprecated since QEMU v5.0, time to remove them now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210203171832.483176-2-thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
3 years agovhost: Unbreak SMMU and virtio-iommu on dev-iotlb support
Peter Xu [Thu, 4 Feb 2021 19:12:28 +0000 (14:12 -0500)]
vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support

Previous work on dev-iotlb message broke vhost on either SMMU or virtio-iommu
since dev-iotlb (or PCIe ATS) is not yet supported for those archs.

An initial idea is that we can let IOMMU to export this information to vhost so
that vhost would know whether the vIOMMU would support dev-iotlb, then vhost
can conditionally register to dev-iotlb or the old iotlb way.  We can work
based on some previous patch to introduce PCIIOMMUOps as Yi Liu proposed [1].

However it's not as easy as I thought since vhost_iommu_region_add() does not
have a PCIDevice context at all since it's completely a backend.  It seems
non-trivial to pass over a PCI device to the backend during init.  E.g. when
the IOMMU notifier registered hdev->vdev is still NULL.

To make the fix smaller and easier, this patch goes the other way to leverage
the flag_changed() hook of vIOMMUs so that SMMU and virtio-iommu can trap the
dev-iotlb registration and fail it.  Then vhost could try the fallback solution
as using UNMAP invalidation for it's translations.

[1] https://lore.kernel.org/qemu-devel/1599735398-6829-4-git-send-email-yi.l.liu@intel.com/

Reported-by: Eric Auger <eric.auger@redhat.com>
Fixes: b68ba1ca57677acf870d5ab10579e6105c1f5338
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
Message-Id: <20210204191228.187550-1-peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agovirtio-pmem: add trace events
Pankaj Gupta [Tue, 17 Nov 2020 11:57:05 +0000 (12:57 +0100)]
virtio-pmem: add trace events

This patch adds trace events for virtio-pmem functionality.
Adding trace events for virtio pmem request, reponse and host
side fsync functionality.

Signed-off-by: Pankaj Gupta <pankaj.gupta.linux@gmail.com>
Message-Id: <20201117115705.32195-1-pankaj.gupta.linux@gmail.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agovirtio: Add corresponding memory_listener_unregister to unrealize
Eugenio Pérez [Mon, 25 Jan 2021 19:25:05 +0000 (20:25 +0100)]
virtio: Add corresponding memory_listener_unregister to unrealize

Address space is destroyed without proper removal of its listeners with
current code. They are expected to be removed in
virtio_device_instance_finalize [1], but qemu calls it through
object_deinit, after address_space_destroy call through
device_set_realized [2].

Move it to virtio_device_unrealize, called before device_set_realized
[3] and making it symmetric with memory_listener_register in
virtio_device_realize.

v2: Delete no-op call of virtio_device_instance_finalize.
    Add backtraces.

[1]

 #0  virtio_device_instance_finalize (obj=0x555557de5120)
     at /home/qemu/include/hw/virtio/virtio.h:71
 #1  0x0000555555b703c9 in object_deinit (type=0x555556639860,
      obj=<optimized out>) at ../qom/object.c:671
 #2  object_finalize (data=0x555557de5120) at ../qom/object.c:685
 #3  object_unref (objptr=0x555557de5120) at ../qom/object.c:1184
 #4  0x0000555555b4de9d in bus_free_bus_child (kid=0x555557df0660)
     at ../hw/core/qdev.c:55
 #5  0x0000555555c65003 in call_rcu_thread (opaque=opaque@entry=0x0)
     at ../util/rcu.c:281

Queued by:

 #0  bus_remove_child (bus=0x555557de5098,
     child=child@entry=0x555557de5120) at ../hw/core/qdev.c:60
 #1  0x0000555555b4ee31 in device_unparent (obj=<optimized out>)
     at ../hw/core/qdev.c:984
 #2  0x0000555555b70465 in object_finalize_child_property (
     obj=<optimized out>, name=<optimized out>, opaque=0x555557de5120)
     at ../qom/object.c:1725
 #3  0x0000555555b6fa17 in object_property_del_child (
     child=0x555557de5120, obj=0x555557ddcf90) at ../qom/object.c:645
 #4  object_unparent (obj=0x555557de5120) at ../qom/object.c:664
 #5  0x0000555555b4c071 in bus_unparent (obj=<optimized out>)
     at ../hw/core/bus.c:147
 #6  0x0000555555b70465 in object_finalize_child_property (
     obj=<optimized out>, name=<optimized out>, opaque=0x555557de5098)
     at ../qom/object.c:1725
 #7  0x0000555555b6fa17 in object_property_del_child (
     child=0x555557de5098, obj=0x555557ddcf90) at ../qom/object.c:645
 #8  object_unparent (obj=0x555557de5098) at ../qom/object.c:664
 #9  0x0000555555b4ee19 in device_unparent (obj=<optimized out>)
     at ../hw/core/qdev.c:981
 #10 0x0000555555b70465 in object_finalize_child_property (
     obj=<optimized out>, name=<optimized out>, opaque=0x555557ddcf90)
     at ../qom/object.c:1725
 #11 0x0000555555b6fa17 in object_property_del_child (
     child=0x555557ddcf90, obj=0x55555685da10) at ../qom/object.c:645
 #12 object_unparent (obj=0x555557ddcf90) at ../qom/object.c:664
 #13 0x00005555558dc331 in pci_for_each_device_under_bus (
     opaque=<optimized out>, fn=<optimized out>, bus=<optimized out>)
     at ../hw/pci/pci.c:1654

[2]

Optimizer omits pci_qdev_unrealize, called by device_set_realized, and
do_pci_unregister_device, called by pci_qdev_unrealize and caller of
address_space_destroy.

 #0  address_space_destroy (as=0x555557ddd1b8)
     at ../softmmu/memory.c:2840
 #1  0x0000555555b4fc53 in device_set_realized (obj=0x555557ddcf90,
      value=<optimized out>, errp=0x7fffeea8f1e0)
     at ../hw/core/qdev.c:850
 #2  0x0000555555b6eaa6 in property_set_bool (obj=0x555557ddcf90,
      v=<optimized out>, name=<optimized out>, opaque=0x555556650ba0,
     errp=0x7fffeea8f1e0) at ../qom/object.c:2255
 #3  0x0000555555b70e07 in object_property_set (
      obj=obj@entry=0x555557ddcf90,
      name=name@entry=0x555555db99df "realized",
      v=v@entry=0x7fffe46b7500,
      errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1400
 #4  0x0000555555b73c5f in object_property_set_qobject (
      obj=obj@entry=0x555557ddcf90,
      name=name@entry=0x555555db99df "realized",
      value=value@entry=0x7fffe44f6180,
      errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/qom-qobject.c:28
 #5  0x0000555555b71044 in object_property_set_bool (
      obj=0x555557ddcf90, name=0x555555db99df "realized",
      value=<optimized out>, errp=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1470
 #6  0x0000555555921cb7 in pcie_unplug_device (bus=<optimized out>,
      dev=0x555557ddcf90,
      opaque=<optimized out>) at /home/qemu/include/hw/qdev-core.h:17
 #7  0x00005555558dc331 in pci_for_each_device_under_bus (
      opaque=<optimized out>, fn=<optimized out>,
      bus=<optimized out>) at ../hw/pci/pci.c:1654

[3]

 #0  virtio_device_unrealize (dev=0x555557de5120)
     at ../hw/virtio/virtio.c:3680
 #1  0x0000555555b4fc63 in device_set_realized (obj=0x555557de5120,
     value=<optimized out>, errp=0x7fffee28df90)
     at ../hw/core/qdev.c:850
 #2  0x0000555555b6eab6 in property_set_bool (obj=0x555557de5120,
     v=<optimized out>, name=<optimized out>, opaque=0x555556650ba0,
     errp=0x7fffee28df90) at ../qom/object.c:2255
 #3  0x0000555555b70e17 in object_property_set (
     obj=obj@entry=0x555557de5120,
     name=name@entry=0x555555db99ff "realized",
     v=v@entry=0x7ffdd8035040,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1400
 #4  0x0000555555b73c6f in object_property_set_qobject (
     obj=obj@entry=0x555557de5120,
     name=name@entry=0x555555db99ff "realized",
     value=value@entry=0x7ffdd8035020,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/qom-qobject.c:28
 #5  0x0000555555b71054 in object_property_set_bool (
     obj=0x555557de5120, name=name@entry=0x555555db99ff "realized",
     value=value@entry=false, errp=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1470
 #6  0x0000555555b4edc5 in qdev_unrealize (dev=<optimized out>)
     at ../hw/core/qdev.c:403
 #7  0x0000555555b4c2a9 in bus_set_realized (obj=<optimized out>,
     value=<optimized out>, errp=<optimized out>)
     at ../hw/core/bus.c:204
 #8  0x0000555555b6eab6 in property_set_bool (obj=0x555557de5098,
     v=<optimized out>, name=<optimized out>, opaque=0x555557df04c0,
     errp=0x7fffee28e0a0) at ../qom/object.c:2255
 #9  0x0000555555b70e17 in object_property_set (
     obj=obj@entry=0x555557de5098,
     name=name@entry=0x555555db99ff "realized",
     v=v@entry=0x7ffdd8034f50,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1400
 #10 0x0000555555b73c6f in object_property_set_qobject (
     obj=obj@entry=0x555557de5098,
     name=name@entry=0x555555db99ff "realized",
     value=value@entry=0x7ffdd8020630,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/qom-qobject.c:28
 #11 0x0000555555b71054 in object_property_set_bool (
     obj=obj@entry=0x555557de5098,
     name=name@entry=0x555555db99ff "realized",
     value=value@entry=false, errp=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1470
 #12 0x0000555555b4c725 in qbus_unrealize (
     bus=bus@entry=0x555557de5098) at ../hw/core/bus.c:178
 #13 0x0000555555b4fc00 in device_set_realized (obj=0x555557ddcf90,
     value=<optimized out>, errp=0x7fffee28e1e0)
     at ../hw/core/qdev.c:844
 #14 0x0000555555b6eab6 in property_set_bool (obj=0x555557ddcf90,
     v=<optimized out>, name=<optimized out>, opaque=0x555556650ba0,
     errp=0x7fffee28e1e0) at ../qom/object.c:2255
 #15 0x0000555555b70e17 in object_property_set (
     obj=obj@entry=0x555557ddcf90,
     name=name@entry=0x555555db99ff "realized",
     v=v@entry=0x7ffdd8020560,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1400
 #16 0x0000555555b73c6f in object_property_set_qobject (
     obj=obj@entry=0x555557ddcf90,
     name=name@entry=0x555555db99ff "realized",
     value=value@entry=0x7ffdd8020540,
     errp=errp@entry=0x5555565bbf38 <error_abort>)
     at ../qom/qom-qobject.c:28
 #17 0x0000555555b71054 in object_property_set_bool (
     obj=0x555557ddcf90, name=0x555555db99ff "realized",
     value=<optimized out>, errp=0x5555565bbf38 <error_abort>)
     at ../qom/object.c:1470
 #18 0x0000555555921cb7 in pcie_unplug_device (bus=<optimized out>,
     dev=0x555557ddcf90, opaque=<optimized out>)
     at /home/qemu/include/hw/qdev-core.h:17
 #19 0x00005555558dc331 in pci_for_each_device_under_bus (
     opaque=<optimized out>, fn=<optimized out>, bus=<optimized out>)
     at ../hw/pci/pci.c:1654

Fixes: c611c76417f ("virtio: add MemoryListener to cache ring translations")
Buglink: https://bugs.launchpad.net/qemu/+bug/1912846
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20210125192505.390554-1-eperezma@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agovirtio-mmio: fix guest kernel crash with SHM regions
Laurent Vivier [Sun, 20 Dec 2020 16:35:39 +0000 (17:35 +0100)]
virtio-mmio: fix guest kernel crash with SHM regions

In the kernel, virtio_gpu_init() uses virtio_get_shm_region()
since
commit 6076a9711dc5 ("drm/virtio: implement blob resources: probe for host visible region")
but vm_get_shm_region() unconditionally uses VIRTIO_MMIO_SHM_SEL to
get the address and the length of the region.

commit 38e895487afc ("virtio: Implement get_shm_region for MMIO transport"

As this is not implemented in QEMU, address and length are 0 and passed
as is to devm_request_mem_region() that triggers a crash:

  [drm:virtio_gpu_init] *ERROR* Could not reserve host visible region
  Unable to handle kernel NULL pointer dereference at virtual address (ptrval)

According to the comments in the kernel, a non existent shared region
has a length of (u64)-1.

This is what we return now with this patch to disable the region.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20201220163539.2255963-1-laurent@vivier.eu>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agovirtio: move 'use-disabled-flag' property to hw_compat_4_2
Stefano Garzarella [Fri, 8 Jan 2021 17:12:52 +0000 (18:12 +0100)]
virtio: move 'use-disabled-flag' property to hw_compat_4_2

Commit 9d7bd0826f introduced a new 'use-disabled-flag' property
set to true by default.
To allow the migration, we set this property to false in the hw_compat,
but in the wrong place (hw_compat_4_1).

Since commit 9d7bd0826f was released with QEMU 5.0, we move
'use-disabled-flag' property to hw_compat_4_2, so 4.2 machine types
will have the pre-patch behavior and the migration can work.

The issue was discovered with vhost-vsock device and 4.2 machine
type without running any kernel in the VM:
    $ qemu-4.2 -M pc-q35-4.2,accel=kvm \
        -device vhost-vsock-pci,guest-cid=4 \
        -monitor stdio -incoming tcp:0:3333

    $ qemu-5.2 -M pc-q35-4.2,accel=kvm \
        -device vhost-vsock-pci,guest-cid=3 \
        -monitor stdio
    (qemu) migrate -d tcp:0:3333

    # qemu-4.2 output
    qemu-system-x86_64: Failed to load virtio-vhost_vsock:virtio
    qemu-system-x86_64: error while loading state for instance 0x0 of device '0000:00:03.0/virtio-vhost_vsock'
    qemu-system-x86_64: load of migration failed: No such file or directory

Reported-by: Jing Zhao <jinzhao@redhat.com>
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1907255
Fixes: 9d7bd0826f ("virtio-pci: disable vring processing when bus-mastering is disabled")
Cc: mdroth@linux.vnet.ibm.com
CC: qemu-stable@nongnu.org
Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <20210108171252.209502-1-sgarzare@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
3 years agopci: add romsize property
Paolo Bonzini [Wed, 3 Feb 2021 13:18:28 +0000 (14:18 +0100)]
pci: add romsize property

This property can be useful for distros to set up known-good ROM sizes for
migration purposes.  The VM will fail to start if the ROM is too large,
and migration compatibility will not be broken if the ROM is too small.

Note that even though romsize is a uint32_t, it has to be between 1
(because empty ROM files are not accepted, and romsize must be greater
than the file) and 2^31 (because values above are not powers of two and
are rejected).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <20201218182736.1634344-1-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210203131828.156467-3-pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
3 years agopci: reject too large ROMs
Paolo Bonzini [Wed, 3 Feb 2021 13:18:27 +0000 (14:18 +0100)]
pci: reject too large ROMs

get_image_size() returns an int64_t, which pci_add_option_rom() assigns
to an "int" without any range checking.  A 32-bit BAR could be up to
2 GiB in size, so reject anything above it.  In order to accomodate
a rounded-up size of 2 GiB, change pci_patch_ids's size argument
to unsigned.

Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210203131828.156467-2-pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
3 years agoMerge remote-tracking branch 'remotes/kraxel/tags/vga-ui-20210205-pull-request' into...
Peter Maydell [Fri, 5 Feb 2021 10:09:16 +0000 (10:09 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-ui-20210205-pull-request' into staging

ui+virtio-gpu: opengl cleanups and fixes.
qxl+spice: bugfixes

# gpg: Signature made Fri 05 Feb 2021 06:56:04 GMT
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/vga-ui-20210205-pull-request: (24 commits)
  tests: add some virtio-gpu & vhost-user-gpu acceptance test
  chardev: check if the chardev is registered for yanking
  display/ui: add a callback to indicate GL state is flushed
  virtio-gpu: avoid re-entering cmdq processing
  ui: add egl dmabuf import to gtkglarea
  ui: check gtk-egl dmabuf support
  ui: add qemu_egl_has_dmabuf helper
  ui: check hw requirements during DCL registration
  ui: add a DCLOps callback to check dmabuf support
  ui: add an optional get_flags callback to GraphicHwOps
  vhost-user-gpu: add a configuration flag for dmabuf usage
  ui: remove console_has_gl_dmabuf()
  ui: annotate DCLOps callback requirements
  ui: add gd_gl_area_scanout_disable
  ui: remove gl_ctx_get_current
  ui: remove extra #ifdef CONFIG_OPENGL
  vhost-user-gpu: handle display-info in a callback
  vhost-user-gpu: use an extandable state enum for commands
  vhost-user-gpu: handle vhost-user-gpu features in a callback
  vhost-user-gpu: check backend for EDID support
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210204...
Peter Maydell [Thu, 4 Feb 2021 19:48:30 +0000 (19:48 +0000)]
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210204' into staging

virtiofs: Security pull 2021-02-04

This contains an important CVE fix for virtiofsd,
together with two fixes for over-eager seccomp rules.

Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
# gpg: Signature made Thu 04 Feb 2021 18:30:37 GMT
# gpg:                using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A  9FA9 0516 331E BC5B FDE7

* remotes/dgilbert-gitlab/tags/pull-virtiofs-20210204:
  virtiofsd: Add restart_syscall to the seccomp whitelist
  virtiofsd: Add _llseek to the seccomp whitelist
  virtiofsd: prevent opening of special files (CVE-2020-35517)
  virtiofsd: optionally return inode pointer from lo_do_lookup()
  virtiofsd: extract lo_do_open() from lo_open()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agovirtiofsd: Add restart_syscall to the seccomp whitelist
Greg Kurz [Mon, 1 Feb 2021 19:33:05 +0000 (20:33 +0100)]
virtiofsd: Add restart_syscall to the seccomp whitelist

This is how linux restarts some system calls after SIGSTOP/SIGCONT.
This is needed to avoid virtiofsd termination when resuming execution
under GDB for example.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20210201193305.136390-1-groug@kaod.org>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agovirtiofsd: Add _llseek to the seccomp whitelist
Greg Kurz [Thu, 21 Jan 2021 17:15:40 +0000 (18:15 +0100)]
virtiofsd: Add _llseek to the seccomp whitelist

This is how glibc implements lseek(2) on POWER.

BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1917692
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20210121171540.1449777-1-groug@kaod.org>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agovirtiofsd: prevent opening of special files (CVE-2020-35517)
Stefan Hajnoczi [Thu, 4 Feb 2021 15:02:08 +0000 (15:02 +0000)]
virtiofsd: prevent opening of special files (CVE-2020-35517)

A well-behaved FUSE client does not attempt to open special files with
FUSE_OPEN because they are handled on the client side (e.g. device nodes
are handled by client-side device drivers).

The check to prevent virtiofsd from opening special files is missing in
a few cases, most notably FUSE_OPEN. A malicious client can cause
virtiofsd to open a device node, potentially allowing the guest to
escape. This can be exploited by a modified guest device driver. It is
not exploitable from guest userspace since the guest kernel will handle
special files inside the guest instead of sending FUSE requests.

This patch fixes this issue by introducing the lo_inode_open() function
to check the file type before opening it. This is a short-term solution
because it does not prevent a compromised virtiofsd process from opening
device nodes on the host.

Restructure lo_create() to try O_CREAT | O_EXCL first. Note that O_CREAT
| O_EXCL does not follow symlinks, so O_NOFOLLOW masking is not
necessary here. If the file exists and the user did not specify O_EXCL,
open it via lo_do_open().

Reported-by: Alex Xu <alex@alxu.ca>
Fixes: CVE-2020-35517
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Vivek Goyal <vgoyal@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20210204150208.367837-4-stefanha@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agovirtiofsd: optionally return inode pointer from lo_do_lookup()
Stefan Hajnoczi [Thu, 4 Feb 2021 15:02:07 +0000 (15:02 +0000)]
virtiofsd: optionally return inode pointer from lo_do_lookup()

lo_do_lookup() finds an existing inode or allocates a new one. It
increments nlookup so that the inode stays alive until the client
releases it.

Existing callers don't need the struct lo_inode so the function doesn't
return it. Extend the function to optionally return the inode. The next
commit will need it.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <20210204150208.367837-3-stefanha@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agovirtiofsd: extract lo_do_open() from lo_open()
Stefan Hajnoczi [Thu, 4 Feb 2021 15:02:06 +0000 (15:02 +0000)]
virtiofsd: extract lo_do_open() from lo_open()

Both lo_open() and lo_create() have similar code to open a file. Extract
a common lo_do_open() function from lo_open() that will be used by
lo_create() in a later commit.

Since lo_do_open() does not otherwise need fuse_req_t req, convert
lo_add_fd_mapping() to use struct lo_data *lo instead.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20210204150208.367837-2-stefanha@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
3 years agotests: add some virtio-gpu & vhost-user-gpu acceptance test
Marc-André Lureau [Thu, 4 Feb 2021 10:52:32 +0000 (14:52 +0400)]
tests: add some virtio-gpu & vhost-user-gpu acceptance test

This will check virtio/vhost-user-vga & virgl are correctly initialized
by the Linux kernel on an egl-headless display.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-21-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agochardev: check if the chardev is registered for yanking
Marc-André Lureau [Thu, 4 Feb 2021 10:52:31 +0000 (14:52 +0400)]
chardev: check if the chardev is registered for yanking

Not all chardevs are created via qmp_chardev_open_socket(), and those
should not call the yank function registration, as this will eventually
assert() not being registered.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-20-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agodisplay/ui: add a callback to indicate GL state is flushed
Marc-André Lureau [Thu, 4 Feb 2021 10:52:30 +0000 (14:52 +0400)]
display/ui: add a callback to indicate GL state is flushed

Displaying rendered resources requires blocking qemu GPU to avoid extra
framebuffer copies. For an external display, via Spice currently, there
is a callback to block/unblock the rendering in the same thread.

But with the vhost-user-gpu backend, the qemu process doesn't handle
the rendering itself, and the blocking callback isn't effective.
Instead, the backend must be notified when the display code is done.

Fix this by adding a new GraphicHwOps callback to indicate the GL state
is flushed, and we are done manipulating the shared GL resources. Call
it from gtk and spice display.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-19-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovirtio-gpu: avoid re-entering cmdq processing
Marc-André Lureau [Thu, 4 Feb 2021 10:52:29 +0000 (14:52 +0400)]
virtio-gpu: avoid re-entering cmdq processing

The next patch will notify the GL context got flush, which will resume
the queue processing. However, if this happens within the caller
context, it will end up with a stack overflow flush/update loop.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-18-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: add egl dmabuf import to gtkglarea
Marc-André Lureau [Thu, 4 Feb 2021 10:52:28 +0000 (14:52 +0400)]
ui: add egl dmabuf import to gtkglarea

GtkGLArea is used on wayland, where EGL is usually available.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-17-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: check gtk-egl dmabuf support
Marc-André Lureau [Thu, 4 Feb 2021 10:52:27 +0000 (14:52 +0400)]
ui: check gtk-egl dmabuf support

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-16-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: add qemu_egl_has_dmabuf helper
Marc-André Lureau [Thu, 4 Feb 2021 10:52:26 +0000 (14:52 +0400)]
ui: add qemu_egl_has_dmabuf helper

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-15-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: check hw requirements during DCL registration
Marc-André Lureau [Thu, 4 Feb 2021 10:52:25 +0000 (14:52 +0400)]
ui: check hw requirements during DCL registration

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-14-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: add a DCLOps callback to check dmabuf support
Marc-André Lureau [Thu, 4 Feb 2021 10:52:24 +0000 (14:52 +0400)]
ui: add a DCLOps callback to check dmabuf support

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-13-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: add an optional get_flags callback to GraphicHwOps
Marc-André Lureau [Thu, 4 Feb 2021 10:52:23 +0000 (14:52 +0400)]
ui: add an optional get_flags callback to GraphicHwOps

Those flags can be used to express different requirements for the
display or other needs.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-12-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovhost-user-gpu: add a configuration flag for dmabuf usage
Marc-André Lureau [Thu, 4 Feb 2021 10:52:22 +0000 (14:52 +0400)]
vhost-user-gpu: add a configuration flag for dmabuf usage

Let's inform VirtioGPUBase that vhost-user-gpu require DMABUF messages.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-11-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: remove console_has_gl_dmabuf()
Marc-André Lureau [Thu, 4 Feb 2021 10:52:21 +0000 (14:52 +0400)]
ui: remove console_has_gl_dmabuf()

This check is currently limited. It only is used by vhost-user-gpu (not
by vfio-display), and will print an error repeatedly during run-time.

We are going to dissociate the GL context from the
DisplayChangeListener, and listeners may come and go. The following
patches will address this differently.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-10-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: annotate DCLOps callback requirements
Marc-André Lureau [Thu, 4 Feb 2021 10:52:20 +0000 (14:52 +0400)]
ui: annotate DCLOps callback requirements

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-9-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: add gd_gl_area_scanout_disable
Marc-André Lureau [Thu, 4 Feb 2021 10:52:19 +0000 (14:52 +0400)]
ui: add gd_gl_area_scanout_disable

Require the callback, drop the fallback path.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-8-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: remove gl_ctx_get_current
Marc-André Lureau [Thu, 4 Feb 2021 10:52:18 +0000 (14:52 +0400)]
ui: remove gl_ctx_get_current

There are no users left.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-7-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agoui: remove extra #ifdef CONFIG_OPENGL
Marc-André Lureau [Thu, 4 Feb 2021 10:52:17 +0000 (14:52 +0400)]
ui: remove extra #ifdef CONFIG_OPENGL

Since commit 5cb69566daa8081abb82a13403dcc0fffed02007 ("gtk: remove
CONFIG_GTK_GL"), some #ifdef are redundants.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-6-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovhost-user-gpu: handle display-info in a callback
Marc-André Lureau [Thu, 4 Feb 2021 10:52:16 +0000 (14:52 +0400)]
vhost-user-gpu: handle display-info in a callback

Fixes a deadlock where the backend calls QEMU, while QEMU also calls the
backend simultaneously, both ends waiting for each other.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-5-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovhost-user-gpu: use an extandable state enum for commands
Marc-André Lureau [Thu, 4 Feb 2021 10:52:15 +0000 (14:52 +0400)]
vhost-user-gpu: use an extandable state enum for commands

Introduce a pending state for commands which aren't finished yet, but
are being handled. See following patch.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210204105232.834642-4-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovhost-user-gpu: handle vhost-user-gpu features in a callback
Marc-André Lureau [Thu, 4 Feb 2021 10:52:14 +0000 (14:52 +0400)]
vhost-user-gpu: handle vhost-user-gpu features in a callback

Fixes a deadlock where the backend calls QEMU, while QEMU also calls the
backend simultaneously, both ends waiting for each other.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-3-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
3 years agovhost-user-gpu: check backend for EDID support
Marc-André Lureau [Thu, 4 Feb 2021 10:52:13 +0000 (14:52 +0400)]
vhost-user-gpu: check backend for EDID support

EDID has been enabled by default, but the backend may not implement
it (such as the contrib backend). This results in extra warnings and
potentially other issues in the guest.

The option shouldn't probably have been added to VIRTIO_GPU_BASE, but
it's a bit too late now, report an error and disable EDID when it's
not available.

Fixes: 0a7196625 ("edid: flip the default to enabled")
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20210204105232.834642-2-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>