Olof Johansson [Mon, 19 Jun 2017 05:49:57 +0000 (22:49 -0700)]
Merge tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.13
Cleanup:
* Correct PCI bus dtc warnings for r8a779x SoCs
Enhancements:
* Add support for iWave G20D-Q7 board based on RZ/G1M SoC
* Add support for GR-Peach board based on r7s72100 SoC
* Add composite video and HDMI input to gose board
* tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a779x: Fix PCI bus dtc warnings
ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
ARM: dts: gose: add composite video input
ARM: dts: r7s72100: Add support for GR-Peach
ARM: dts: gose: add HDMI input
Olof Johansson [Mon, 19 Jun 2017 05:37:31 +0000 (22:37 -0700)]
Merge tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.13
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
* tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
ARM: dts: add GSBI8 defines to the MSM8660 family
ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
ARM: dts: qcom: ipq4019: fix i2c_0 node
ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
ARM: dts: qcom-apq8064: Collapse usb support into one node
ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms
ARM: dts: qcom: add charger otg regulator
ARM: dts: qcom: Remove s4/5vs1,2 from RPM pm8941 control
Olof Johansson [Mon, 19 Jun 2017 04:01:58 +0000 (21:01 -0700)]
Merge tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
* tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: fix PCI bus dtc warnings
ARM: tegra: remove Whistler support
Olof Johansson [Mon, 19 Jun 2017 03:40:35 +0000 (20:40 -0700)]
Merge tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.13
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
* tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: sun6i: a31s: primo81: Enable battery power supply
ARM: sun6i: a31s: primo81: Change USB OTG to OTG mode
ARM: sun8i: a83t: Add dt node for the syscon control module
ARM: sun8i: a83t: Add device node for R_PIO
ARM: sun8i: v3s: add device nodes for DE2 display pipeline
ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
ARM: sun5i: add a cryptographic engine node
ARM: sun8i: a83t: Add device node for PRCM
ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus support
ARM: dts: orange-pi-zero: add node for SPI NOR
ARM: sun7i: a20: cubietruck: Tie AXP209's USB power supply to USB PHY
ARM: sun6i: a31: hummingbird: Enable AXP221's ACIN power supply
ARM: sun4i: a10: cubieboard: Enable AXP209's ACIN power supply
ARM: sun7i: a20: bananapi-m1-plus: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Move usb_otg node for alphabetical ordering
ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output
ARM: sun8i: a83t: cubietruck-plus: Add LED device nodes
ARM: sun8i: a83t: Add device node for SPDIF transmitter
ARM: sun8i: a83t: Add device node for DMA controller
...
Olof Johansson [Mon, 19 Jun 2017 03:37:56 +0000 (20:37 -0700)]
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses
- add/use real clock controller
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8: add and use the real clock controller
ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi
ARM: dts: meson: organize devices in their corresponding busses
Olof Johansson [Mon, 19 Jun 2017 03:15:54 +0000 (20:15 -0700)]
Merge tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based Device Tree changes for 4.13.
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
* tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero: Enable OTG mode
ARM: dts: bcm283x: Add generic USB PHY
ARM: dts: bcm283x: Add dtsi for OTG mode
ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
ARM: dts: NSP: Add Thermal Support
ARM: dts: Cygnus: Add BCM11360's V3D device
ARM: dts: BCM5301X: Specify MDIO bus in the DT
ARM: dts: BCM5301X: Add CPU thermal sensor and zone
ARM: dts: bcm283x: switch from &sdhci to &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Olof Johansson [Mon, 19 Jun 2017 03:11:08 +0000 (20:11 -0700)]
Merge tag 'uniphier-dt-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.13
- fix W=1 build warnings
- use SPDX License Identifier
- add generic compatible string for I2C EEPROM
* tag 'uniphier-dt-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
ARM: dts: uniphier: use SPDX-License-Identifier
ARM: dts: uniphier: fix simple-bus unit address format error
ARM: dts: uniphier: Use - instead of @ for DT OPP entries
* tag 'v4.12-next-dts32' of https://github.com/mbgg/linux-mediatek: (25 commits)
arm: dts: mediatek: Add audio driver node for MT2701
arm: dts: Add Mediatek MT2701 i2c device node
arm: dts: mt2701: Add node for Mediatek JPEG Decoder
arm: dts: mt2701: add nor flash node
ARM: dts: mt2701: Add mtk-cirq node for mt2701
arm: dts: mt7623: add Sean as one of authors for mt7623.dtsi files
arm: dts: mt7623: add thermal nodes to the mt7623.dtsi file
arm: dts: mt7623: add efuse nodes to the mt7623.dtsi file
arm: dts: mt7623: add auxadc nodes to the mt7623.dtsi file
arm: dts: mt7623: add rng nodes to the mt7623.dtsi file
arm: dts: mt7623: add afe nodes to the mt7623.dtsi file
arm: dts: mt7623: add ir nodes to the mt7623.dtsi file
arm: dts: mt7623: add crypto engine nodes to the mt7623.dtsi file
arm: dts: mt7623: add ethernet nodes to the mt7623.dtsi file
arm: dts: mt7623: add pwm nodes to the mt7623.dtsi file
arm: dts: mt7623: add usb nodes to the mt7623.dtsi file
arm: dts: mt7623: add mmc nodes to the mt7623.dtsi file
arm: dts: mt7623: add nand nodes to the mt7623.dtsi file
arm: dts: mt7623: add spi nodes to the mt7623.dtsi file
arm: dts: mt7623: add i2c nodes to the mt7623.dtsi file
...
Olof Johansson [Mon, 19 Jun 2017 02:14:52 +0000 (19:14 -0700)]
Merge tag 'keystone_dts_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
ARM: dts: Keystone K2G ICE EVM support for v4.13
* tag 'keystone_dts_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: Add minimum support for K2G ICE evm
ARM: keystone: Create new binding for K2G ICE evm
ARM: dts: k2g-evm: Add unit address to memory node
ARM: dts: keystone-k2g: Remove skeleton.dtsi
Olof Johansson [Mon, 19 Jun 2017 02:10:31 +0000 (19:10 -0700)]
Merge tag 'samsung-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.13:
1. Add HDMI CEC to Exynos5 SoCs.
2. Minor cleanups and readability improvements.
* tag 'samsung-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use human-friendly symbols for GIC interrupt properties
ARM: dts: exynos: Use human-friendly symbols for interrupt flags in board sources
ARM: dts: exynos: Add HDMI CEC device to Exynos5 SoC family
ARM: dts: exynos: Remove MFC reserved buffers
Olof Johansson [Mon, 19 Jun 2017 02:07:25 +0000 (19:07 -0700)]
Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable usb for rk3229 evb board
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: add adc button for Firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
ARM: dts: rockchip: add ARM Mali GPU node for rk3288
dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
ARM: dts: rockchip: set default rates for core clocks on rk322x
ARM: dts: rockchip: add second uart2 pinctrl on rk322x
ARM: dts: rockchip: correct rk322x uart2 pinctrl
ARM: dts: rockchip: add watchdog device node on rk322x
clk: rockchip: add clock-ids for more rk3228 clocks
clk: rockchip: add ids for camera on rk3399
ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2
Olof Johansson [Mon, 19 Jun 2017 02:05:14 +0000 (19:05 -0700)]
Merge tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Miscellaneous DT support updates for DA850. Includes Lego mindstorms
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
* tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
ARM: dts: da850: Add interrupt-controller property to gpio node
ARM: dts: da850: Add CPPI 4.1 DMA to USB OTG controller
ARM: dts: da850-lego-ev3: Add node for LEGO MINDSTORMS EV3 Battery
Olof Johansson [Mon, 19 Jun 2017 01:56:35 +0000 (18:56 -0700)]
Merge tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.13 merge window.
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
* tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: dts: am33xx: Remove redundant interrupt-parent property
ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
ARM: dts: Add am335x-boneblue
ARM: dts: twl4030: Add missing madc reference for bci subnode
ARM: dts: am43xx-clocks: Add support for CLKOUT2
ARM: dts: Configure USB host for 37xx-evm
ARM: dts: omap: Add generic compatible string for I2C EEPROM
ARM: dts: Enable earlycon stdout path for LogicPD torpedo
ARM: dts: Enable earlycon stdout path for duovero
arm: dts: boneblack-wireless: add WL1835 Bluetooth device node
ARM: dts: am571x-idk: Enable the system mailboxes 5 and 6
ARM: dts: am572x-idk: Enable the system mailboxes 5 and 6
ARM: dts: omap4-devkit8000: fix gpmc ranges property
ARM: dts: omap3: Remove 'enable-active-low' property
ARM: dts: OMAP5: uevm: add µSD card detect
ARM: dts: omap4-droid4: Add bluetooth
ARM: dts: dra7x-evm: Enable dual-role mode for USB1
ARM: dts: Use - instead of @ for DT OPP entries for TI SoCs
ARM: dts: am335x-phycore-som: fix rv4162 compatible
"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock
entries to avoid conflicts.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP4 has a second aes module, so let's use proper name for
the first instance.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Linus Walleij [Mon, 20 Mar 2017 22:39:26 +0000 (23:39 +0100)]
ARM: dts: add Gemini PATA/SATA support
The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.
Cc: John Feng-Hsin Chiang <john453@faraday-tech.com> Cc: Greentime Hu <green.hu@gmail.com> Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Faraday Technology FTDMAC020 DMA controller to
the Gemini SoC DTSI file. It is only used for memcpy work so
we can activate it for all users of the chipset.
Florian Fainelli [Tue, 13 Jun 2017 19:38:48 +0000 (12:38 -0700)]
Merge tag 'bcm2835-dt-next-2017-06-12' into devicetree/next
This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
Linus Walleij [Mon, 15 May 2017 07:50:34 +0000 (09:50 +0200)]
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a
Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus.
Add entries for these to the device tree. The interrupt line
from the WM8903 chip is not routed anywhere on this design
so it can not be used.
Stephen Warren [Thu, 13 Apr 2017 18:55:58 +0000 (12:55 -0600)]
ARM: tegra: remove Whistler support
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Stefan Wahren [Sun, 21 May 2017 16:44:38 +0000 (18:44 +0200)]
ARM: dts: bcm2835-rpi-zero: Enable OTG mode
Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages
during FIFO init") the dwc2 driver is able to handle OTG and gadget
mode for bcm2835. So enable this feature for the Raspberry Pi Zero.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Sun, 21 May 2017 16:44:36 +0000 (18:44 +0200)]
ARM: dts: bcm283x: Add dtsi for OTG mode
The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file
to configure the USB interface accordingly. The fifo sizes are optimized
for device endpoint 6 and 7 with the maximum of 768.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Fri, 28 Apr 2017 22:22:04 +0000 (15:22 -0700)]
ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
Cygnus has a single amac controller connected to the B53 switch with 2
PHYs. On the BCM911360_EP platform, those two PHYs are connected to the
external ethernet jacks.
Eric Anholt [Tue, 18 Apr 2017 23:32:34 +0000 (16:32 -0700)]
ARM: dts: Cygnus: Add BCM11360's V3D device
This loads the VC4 driver on the 911360_entphn platform (with the
corresponding series sent to dri-devel), which is supported by master
of the Mesa tree.
Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
ARM: dts: BCM5301X: Add CPU thermal sensor and zone
This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.
Cc: devicetree@vger.kernel.org Cc: Marcel Partap <mpartap@gmx.net> Cc: Michael Scott <michael.scott@linaro.org> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
Subhajit Paul [Wed, 7 Jun 2017 21:27:30 +0000 (16:27 -0500)]
ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks
The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK.
Both of these are mux clocks and are derived from the DPLL_CORE
H14 output clock CORE_GPU_CLK by default. These clocks can also be
be derived from DPLL_PER or DPLL_GPU.
The GPU DPLL provides the output clocks primarily for the GPU.
Configuring the GPU for different OPP clock frequencies is easier
to achieve when using the DPLL_GPU rather than the other two DPLLs
due to:
1. minimal affect on any other output clocks from these DPLLs
2. may require an impossible post-divider values on existing DPLLs
without affecting other clocks.
So, switch the GPU functional clocks to be sourced from GPU DPLL by
default. This is done using the DT standard properties "assigned-clocks"
and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse
and can update these properties to choose an appropriate one-time fixed
OPP configuration as all the required ABB/AVS setup is performed within
the bootloader. Note that there is no DVFS supported for any of the
non-MPU domains. The DPLL will automatically transition into a low-power
stop mode when the associated output clocks are not utilized or gated
automatically.
This patch also sets the initial values for the DPLL_GPU outputs.
These values are chosen based on the OPP_NOM values defined as per
recommendation from design team. The DPLL locked frequency is kept
at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck,
can be set to 425.67 MHz for OPP_NOM.
Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
[s-anna@ti.com: revise patch description] Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 7 Jun 2017 21:27:29 +0000 (16:27 -0500)]
ARM: dts: dra7xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL in DRA7xx provides the output clocks for only the IVAHD
subsystem in DRA7xx as compared to previous OMAP generations when it
provided the clocks for both DSP and IVAHD subsystems. This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
IVA DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The reset value of the divider M2 (that supplies the IVA_GFLCK, the
functional clock for the IVAHD subsystem) does not match a specific
OPP. So, the derived output clock from this IVA DPLL has to be
initialized as well to avoid initializing these divider outputs to an
incorrect frequencies.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 2300 MHz, so
the dpll_iva_ck clock rate used is half of this value. The value for the
divider clock, dpll_iva_m2_ck, has to be set to 388.333334 MHz or more
for the divider clk logic to compute the appropriate divider value for
OPP_NOM.
Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 7 Jun 2017 21:27:28 +0000 (16:27 -0500)]
ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock rates
The DSP DPLL is a new DPLL compared to previous OMAP generations and
supplies the root clocks for the DSP processors, as well as a mux
input source for EVE sub-system (on applicable SoCs). This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
DSP DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The DSP DPLL provides two output clocks, DSP_GFCLK and EVE_GCLK. The
desired rate for DSP_GFCLK is 600 MHz (same as DSP DPLL CLKOUT frequency),
and is currently auto set due to the desired M2 divider value being the
same as reset value for the locked frequency of 600 MHz. The EVE_GCLK
however is required to be 400 MHz, so set the dpll_dsp_m3x2_ck's rate
explicitly so that the divider is set properly. The dpll_dsp_m2_ck rate
is also set explicitly to not rely on any implicit matching divider reset
values to the locked DPLL frequency.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 1200 MHz, so
the dpll_dsp_ck clock rate used is half of this value.
Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 7 Jun 2017 21:27:27 +0000 (16:27 -0500)]
ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL
The IPU1 functional clock is actually the output of a mux clock,
ipu1_gfclk_mux. The mux clock is sourced by default from the
DPLL_ABE_X2_CLK, and this results in a rather odd clock frequency
(361 MHz) for the IPU1 functional clock on platforms where ABE_DPLL
is configured properly. Reconfigure the mux clock to be sourced from
CORE_IPU_ISS_BOOST_CLK (dpll_core_h22x2_ck), so that both the IPU1
and IPU2 are running from the same clock and clocked at the same
nominal frequency of 425 MHz.
This also ensures that IPU1 functional clock is always configured
properly and becomes independent of the state of the ABE DPLL on
all boards.
Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 7 Jun 2017 21:27:26 +0000 (16:27 -0500)]
ARM: dts: omap54xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers H11 & H12 (functional clocks for DSP
and IVAHD respectively) are identical to each other, but are different
at each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP_NOM values as defined in
the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA
Preferred Settings". The recommended maximum DPLL locked frequency is
2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck
clock rate used is half of this value. The value 465.92 MHz is used
instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider
value can be calculated.
Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Wed, 7 Jun 2017 21:27:25 +0000 (16:27 -0500)]
ARM: dts: omap44xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers M4 & M5 (functional clocks for DSP and
IVAHD respectively) are identical to each other, but are different at
each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP100 values as defined in the
OMAP4430 ES2.x Public TRM vAP, section "3.6.3.8.7 DPLL_IVA Preferred
Settings". The DPLL locked frequency is 1862.4 MHz (value for
DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of
this value.
Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
The Renesas Salvator-XS (Salvator-X 2nd version) development board can
be equipped with either an R-Car H3 ES2.0 or M3-W ES1.x SiP, which are
pin-compatible.
Document board part number and compatible values for the version with
R-Car H3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Update R-Car Gen3 ULCB board part numbers
The board part numbers for the R-Car H3 and M3 ULCB boards corresponded
to versions predating mass production. Update them for mass production.
Note that the H3 ULCB board can be equipped with either revision ES1.1
or ES2.0 of the R-Car H3 SoC. While these have different board part
numbers, no new compatible values are needed, as the revision can be
detected at runtime using the PRR register.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Jacopo Mondi [Tue, 23 May 2017 19:20:54 +0000 (21:20 +0200)]
ARM: dts: r7s72100: Add support for GR-Peach
Add device tree source for Renesas GR-Peach board.
GR-Peach is an RZ/A1H based board with 10MB of on-chip SRAM and 8MB
QSPI flash storage.
Add support for the board, and create a 2MB partition to use as rootfs.
Motorola Droid 4 uses a WL1285C, so use proper compatible value.
To avoid regressions while support for the new compatible value
is added to the Linux kernel, the old compatible value is preserved
as fallback.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
Chen-Yu Tsai [Fri, 9 Jun 2017 15:34:36 +0000 (23:34 +0800)]
ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E
The Orange Pi Plus 2E, unlike the Orange Pi PC and PC Plus which its
schematics are based on, uses an external Realtek RTL8211E PHY in
RGMII mode, with a GPIO enabling the regulator for I/O signalling
power supplies. The PHY's main power supply is enabled by the main
5V power supply.
Add the regulator and PHY nodes, and override the PHY phandle under
the EMAC node, so that the EMAC works properly on this board.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: dts: meson8: add and use the real clock controller
This removes the dummy clk81 gate and replaces it with the actual clock
controller's CLKID_CLK81. This will also allow us to pass the real clock
IDs to all devices where the clock is controlled by clkc in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Patrice Chotard [Wed, 7 Jun 2017 07:16:00 +0000 (09:16 +0200)]
ARM: dts: stm32: Add stm32h743i-disco board
Add basic support for stm32h743i-discovery board
This board offers :
_ 2MBytes Flash
_ 1 x micro USB OTG port
_ 1 x STLink connector (micro USB)
_ 1 x micro SD card slot
_ 1 x RJ45 connector
_ 1 x RCA connector
_ 2 x Audio jack connectors (in and out)
_ 2 x speaker connectors (left and right)
_ 1 x joystick
_ 1 x DCMI connector (Digital camera interface)
_ 1 x 4 inch DSI LCD (Display Serial Interface)
_ Arduino Uno Connectors
_ 2 x PIO connectors (PMOD and PMOD+)
_ 1 x wakeup button
_ 1 x reset button
ARM: dts: stm32: Set gpio controller as interrupt controller on F4 and F7
This patch set each gpio controller as a interrupt controller. User who
wants to use gpio as interrupt will have choice to use either "gpiolib"
interface or "common" interrupt interface.
Antoine Tenart [Thu, 1 Jun 2017 19:39:04 +0000 (21:39 +0200)]
ARM: sun5i: add a cryptographic engine node
Add a node for the cryptographic engine that can be found on sun5i SoCs.
This cryptographic engine is compatible with the Allwinner cryptographic
accelerator driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Mon, 5 Jun 2017 09:00:32 +0000 (17:00 +0800)]
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Now that the R_CCU device tree binding headers have been merged, we
can convert the raw number references in the device trees to use the
defined macros.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Kevin Hilman [Wed, 31 May 2017 01:21:25 +0000 (18:21 -0700)]
ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
In order GPIOS from this controller to be used with the "gpio-hogs"
property, the tca6416 node has to properly labeled as a gpio-controller,
and use #gpio-cells.
With that, the SEL_A, SEL_B, SEL_C lines that are used to select VPIF
input can be configured using GPIO hogs.
As an example, example, the configuration below selects the analog video
input on the da850-evm UI board:
Interrupt-parent property is defined in the root node as
"interrupt-parent = <&intc>". This interrupt-parent value becomes
the default for the system, so removed redundant "interrupt-parent"
property from mmc, mac, lcdc and tscadc nodes.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Robert Nelson [Mon, 5 Jun 2017 15:36:21 +0000 (10:36 -0500)]
ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
This adds the serial slave device for the WL1835 Bluetooth interface.
Signed-off-by: Robert Nelson <robertcnelson@gmail.com> CC: Ricardo Salveti <ricardo.salveti@linaro.org> CC: Tony Lindgren <tony@atomide.com> CC: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Keerthy [Fri, 2 Jun 2017 09:24:01 +0000 (14:54 +0530)]
ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
dcdc3 supplies to DDR on AM43x series. When we set both
min and max values to the same value. The regulator framework
sets that particular voltage. This is bad as we are changing
the ddr voltage when executing from ddr. Hence remove the min and
max values. The ddr supply voltage shall be set from bootloader
when not executing from ddr and not while executing from kernel.
Robert Nelson [Tue, 30 May 2017 16:20:23 +0000 (11:20 -0500)]
ARM: dts: Add am335x-boneblue
BeagleBone Blue is robotics-oriented version of the BeagleBone Black (BBB).
This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 4c 41 30 |.U3.A335BNLTBLA2|]
firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address
Signed-off-by: Robert Nelson <robertcnelson@gmail.com> CC: Jason Kridner <jkridner@beagleboard.org> CC: Drew Fustini <drew@beagleboard.org> Acked-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
projects / mirror_ubuntu-bionic-kernel.git / log