]> git.proxmox.com Git - mirror_qemu.git/log
mirror_qemu.git
7 years agochar-win: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 16:32:42 +0000 (19:32 +0300)]
char-win: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-win: do not override chr_free
Marc-André Lureau [Thu, 8 Dec 2016 15:22:04 +0000 (18:22 +0300)]
char-win: do not override chr_free

For some unclear reason to me, char-file does not have chr_free on
win32. Since we want to switch to instance finalizer instead of class
chr_free, we should be able to run the base WinChardev class finalizer
in any case. Use a boolean to skip free to ease the transition to
instance finalizer.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-win-stdio: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 16:29:35 +0000 (19:29 +0300)]
char-win-stdio: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-stdio: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 16:31:45 +0000 (19:31 +0300)]
char-stdio: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-parallel: convert parallel to finalize
Marc-André Lureau [Thu, 8 Dec 2016 14:57:35 +0000 (17:57 +0300)]
char-parallel: convert parallel to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-ringbuf: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 14:47:17 +0000 (17:47 +0300)]
char-ringbuf: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-pty: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:52:38 +0000 (16:52 +0300)]
char-pty: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-socket: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:51:47 +0000 (16:51 +0300)]
char-socket: convert to finalize

Notice that finalize() will be run after a failure to open(), so cleanup
code must be adjusted.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agochar-udp: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:50:26 +0000 (16:50 +0300)]
char-udp: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agomux: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:48:15 +0000 (16:48 +0300)]
mux: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agomsmouse: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:34:44 +0000 (16:34 +0300)]
msmouse: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agobaum: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:34:33 +0000 (16:34 +0300)]
baum: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agospice-qemu-char: convert to finalize
Marc-André Lureau [Thu, 8 Dec 2016 13:34:16 +0000 (16:34 +0300)]
spice-qemu-char: convert to finalize

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
7 years agoMAINTAINERS: add myself to qemu-char.c
Marc-André Lureau [Mon, 30 Jan 2017 13:37:31 +0000 (17:37 +0400)]
MAINTAINERS: add myself to qemu-char.c

I consider to have enough experience with qemu-char to propose myself as
maintainer. This will allow me to send pull request without waiting for
Paolo.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agovnc: fix overflow in vnc_update_stats
Gerd Hoffmann [Tue, 24 Jan 2017 09:00:28 +0000 (10:00 +0100)]
vnc: fix overflow in vnc_update_stats

Commit "bea60dd ui/vnc: fix potential memory corruption issues" is
incomplete.  vnc_update_stats must calculate width and height the same
way vnc_refresh_server_surface does it, to make sure we don't use width
and height values larger than the qemu vnc server can handle.

Commit "e22492d ui/vnc: disable adaptive update calculations if not
needed" masks the issue in the default configuration.  It triggers only
in case the "lossy" option is set to "on" (default is "off").

Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id: 1485248428-575-1-git-send-email-kraxel@redhat.com

7 years agospice: wakeup QXL worker to pick up mouse changes
Marc-André Lureau [Mon, 30 Jan 2017 10:45:40 +0000 (14:45 +0400)]
spice: wakeup QXL worker to pick up mouse changes

Without it, server-mode mouse is "slow" to update position: QXL will
wait until new display commands come. This is very visible with
virtio-gpu.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id: 20170130104540.14660-1-marcandre.lureau@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoui/gtk.c: add ctrl-alt-= support for zoom in acceleration
Ziyue Yang [Tue, 31 Jan 2017 01:32:15 +0000 (09:32 +0800)]
ui/gtk.c: add ctrl-alt-= support for zoom in acceleration

Solving wishlist item at
https://bugs.launchpad.net/qemu/+bug/1656710
by accepting Ctrl-Alt-= as an additional zoom-in acceleration.

Using gtk_accel_group_connect to support multiple accelerations
triggering a single menu item since that gtk_accel_map_add_entry
seems to support only one acceleration. A wrapper function
gd_accel_zoom_in is added to support gtk_accel_group_connect's
callback activities.

Signed-off-by: Ziyue Yang <skiver.cloud.yzy@gmail.com>
Message-id: 1485826335-15686-1-git-send-email-skiver.cloud.yzy@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoui: fix format specfier in vnc to avoid break in build.
Rami Rosen [Tue, 10 Jan 2017 09:19:25 +0000 (11:19 +0200)]
ui: fix format specfier in vnc to avoid break in build.

When building qemu after setting _VNC_DEBUG to 1 (see ui/vnc.h),
we get the following error and the build breaks:
...
ui/vnc.c: In function ‘vnc_client_io_error’:
ui/vnc.c:1262:13: error: format ‘%d’ expects argument of type ‘int’, but
             VNC_DEBUG("Closing down client sock: ret %d (%s)\n",
             ^
cc1: all warnings being treated as errors
make: *** [ui/vnc.o] Error 1
...

This patch solves this issue by fixing the print format specifier
in vnc_client_io_error() to be %zd, which corresponds to the type
of the "ret" variable.

Signed-off-by: Rami Rosen <rami.rosen@intel.com>
Message-id: 1484039965-25907-1-git-send-email-rami.rosen@intel.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoui/gtk: Fix mouse wheel on 3.4.0 or later
OGAWA Hirofumi [Wed, 4 Jan 2017 20:41:16 +0000 (05:41 +0900)]
ui/gtk: Fix mouse wheel on 3.4.0 or later

On 3.4.0 or later, send GDK_SCROLL_SMOOTH event, instead of
GDK_SCROLL_UP/DOWN.

This fixes it by converting any smooth scroll to up/down.
(I.e. without smooth support)

Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agovnc: track LED state separately
Pierre Ossman [Mon, 9 Jan 2017 16:14:02 +0000 (17:14 +0100)]
vnc: track LED state separately

Piggy-backing on the modifier state array made it difficult to send
out updates at the proper times.

Signed-off-by: Pierre Ossman <ossman@cendio.se>
Message-id: 5aa28297d665cee24ddab26bbf4633e4252f97b6.1483978442.git.ossman@cendio.se
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoui: add support for mice with extra/side buttons
Fabian Lesniak [Tue, 6 Dec 2016 19:00:07 +0000 (20:00 +0100)]
ui: add support for mice with extra/side buttons

Adds input event generation for BTN_SIDE and BTN_EXTRA events to gtk and
input-linux methods.

Signed-off-by: Fabian Lesniak <fabian@lesniak-it.de>
Message-id: 20161206190007.7539-4-fabian@lesniak-it.de
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agops2: add support for mice with extra/side buttons
Fabian Lesniak [Tue, 6 Dec 2016 19:00:06 +0000 (20:00 +0100)]
ps2: add support for mice with extra/side buttons

This enables the ps2 controller to process mouse events for buttons 4 and 5.
Additionally, distinct definitions for the ps2 mouse button state are
introduced. The legacy definitions from console.h are not used anymore.

Signed-off-by: Fabian Lesniak <fabian@lesniak-it.de>
Message-id: 20161206190007.7539-3-fabian@lesniak-it.de
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoqapi: add support for mice with extra/side buttons
Fabian Lesniak [Tue, 6 Dec 2016 19:00:05 +0000 (20:00 +0100)]
qapi: add support for mice with extra/side buttons

Adds "side" and "extra" values to enum InputButton. The naming was borrowed
from evdev since it is more descriptive than "button4" and "button5".

Signed-off-by: Fabian Lesniak <fabian@lesniak-it.de>
Message-id: 20161206190007.7539-2-fabian@lesniak-it.de
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoppc: switch to constants within BUILD_BUG_ON
Michael S. Tsirkin [Fri, 27 Jan 2017 16:27:16 +0000 (18:27 +0200)]
ppc: switch to constants within BUILD_BUG_ON

We are switching BUILD_BUG_ON to verify that it's parameter is a
compile-time constant, and it turns out that some gcc versions
(specifically gcc (Ubuntu 5.4.0-6ubuntu1~16.04.4) 5.4.0 20160609) are
not smart enough to figure it out for expressions involving local
variables. This is harmless but means that the check is ineffective for
these platforms.  To fix, replace the variable with macros.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
[dwg: Correct a printf format warning]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget/ppc/cpu-models: Fix/remove bad CPU aliases
Thomas Huth [Tue, 24 Jan 2017 11:48:05 +0000 (12:48 +0100)]
target/ppc/cpu-models: Fix/remove bad CPU aliases

There is no CPU model called "7447_v1.2" in our list, so the
"7447" alias should point to "7447_v1.1" instead. Let's also
remove the "codename" aliases that point to non-implemented
CPU models - they are really of no use here.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget/ppc: Remove unused POWERPC_FAMILY(POWER)
Thomas Huth [Tue, 24 Jan 2017 10:55:07 +0000 (11:55 +0100)]
target/ppc: Remove unused POWERPC_FAMILY(POWER)

We do not support POWER1 CPUs in QEMU, so it does not make sense
to keep this stub around.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agospapr: clock should count only if vm is running
Laurent Vivier [Fri, 27 Jan 2017 12:24:58 +0000 (13:24 +0100)]
spapr: clock should count only if vm is running

This is a port to ppc of the i386 commit:
    00f4d64 kvmclock: clock should count only if vm is running

We remove timebase_post_load function, and use the VM state
change handler to save and restore the guest_timebase (on stop
and continue).

We keep timebase_pre_save to reduce the clock difference on
migration like in:
    6053a86 kvmclock: reduce kvmclock difference on migration

Time base offset has originally been introduced by commit
    98a8b52 spapr: Add support for time base offset migration

So while VM is paused, the time is stopped. This allows to have
the same result with date (based on Time Base Register) and
hwclock (based on "get-time-of-day" RTAS call).

Moreover in TCG mode, the Time Base is always paused, so this
patch also adjust the behavior between TCG and KVM.

VM state field "time_of_the_day_ns" is now useless but we keep
it to be able to migrate to older version of the machine.

As vmstate_ppc_timebase structure (with timebase_pre_save() and
timebase_post_load() functions) was only used by vmstate_spapr,
we register the VM state change handler only in ppc_spapr_init().

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Remove unused function cpu_ppc601_rtc_init()
Thomas Huth [Tue, 17 Jan 2017 13:37:49 +0000 (14:37 +0100)]
ppc: Remove unused function cpu_ppc601_rtc_init()

It is completely unused, thus it can be removed without problems.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget/ppc: Add pcr_supported to POWER9 cpu class definition
Suraj Jitindar Singh [Fri, 13 Jan 2017 06:28:09 +0000 (17:28 +1100)]
target/ppc: Add pcr_supported to POWER9 cpu class definition

pcr_supported is used to define the supported PCR values for a given
processor. A POWER9 processor can support 3.00, 2.07, 2.06 and 2.05
compatibility modes, thus we set this accordingly.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agopowerpc/cpu-models: rename ISAv3.00 logical PVR definition
Suraj Jitindar Singh [Fri, 13 Jan 2017 06:28:07 +0000 (17:28 +1100)]
powerpc/cpu-models: rename ISAv3.00 logical PVR definition

This logical PVR value now corresponds to ISA version 3.00 so rename it
accordingly.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvcv[hpsp, sphp] instructions
Nikunj A Dadhania [Thu, 12 Jan 2017 16:24:09 +0000 (21:54 +0530)]
target-ppc: Add xvcv[hpsp, sphp] instructions

xvcvhpsp: VSX Vector Convert Half Precision to Single Precision
xvcvsphp: VSX Vector Convert Single Precision to Half Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsmulqp instruction
Bharata B Rao [Thu, 12 Jan 2017 16:24:08 +0000 (21:54 +0530)]
target-ppc: Add xsmulqp instruction

xsmulqp: VSX Scalar Multiply Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsdivqp instruction
Bharata B Rao [Thu, 12 Jan 2017 16:24:07 +0000 (21:54 +0530)]
target-ppc: Add xsdivqp instruction

xsdivqp: VSX Scalar Divide Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvsdqp and xscvudqp instructions
Bharata B Rao [Thu, 12 Jan 2017 16:24:06 +0000 (21:54 +0530)]
target-ppc: Add xscvsdqp and xscvudqp instructions

xscvsdqp: VSX Scalar Convert Signed Doubleword format to
          Quad-Precision format
xscvudqp: VSX Scalar Convert Unsigned Doubleword format to
          Quad-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qp
Bharata B Rao [Thu, 12 Jan 2017 16:24:05 +0000 (21:54 +0530)]
target-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qp

xscmpoqp, xscmpuqp & xscmpexpqp were added before f128 field was
introduced in ppc_vsr_t. Now that we have it, use it instead of
generating the 128 bit float using two 64bit fields.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdutrunc. instruction
Jose Ricardo Ziviani [Thu, 12 Jan 2017 20:08:33 +0000 (18:08 -0200)]
ppc: Implement bcdutrunc. instruction

bcdutrunc. Decimal unsigned truncate. Works like bcdtrunc. with
unsigned BCD numbers.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdtrunc. instruction
Jose Ricardo Ziviani [Thu, 12 Jan 2017 20:08:32 +0000 (18:08 -0200)]
ppc: Implement bcdtrunc. instruction

bcdtrunc.: Decimal integer truncate. Given a BCD number in vrb and the
number of bytes to truncate in vra, the return register will have vrb
with such bits truncated.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc/prep: update MAINTAINERS file
Hervé Poussineau [Thu, 12 Jan 2017 08:47:29 +0000 (09:47 +0100)]
ppc/prep: update MAINTAINERS file

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvqps[d,w]z instructions
Bharata B Rao [Tue, 10 Jan 2017 08:50:43 +0000 (14:20 +0530)]
target-ppc: Add xscvqps[d,w]z instructions

xscvqpsdz: VSX Scalar truncate & Convert Quad-Precision format to
           Signed Doubleword format
xscvqpswz: VSX Scalar truncate & Convert Quad-Precision format to
           Signed Word format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxsigdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:42 +0000 (14:20 +0530)]
target-ppc: Add xvxsigdp instruction

xvxsigdp: VSX Vector Extract Significand Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxsigsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:41 +0000 (14:20 +0530)]
target-ppc: Add xvxsigsp instruction

xvxsigsp: VSX Vector Extract Significand Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:40 +0000 (14:20 +0530)]
target-ppc: Add xvxexpdp instruction

xvxexpdp: VSX Vector Extract Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxexpsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:39 +0000 (14:20 +0530)]
target-ppc: Add xvxexpsp instruction

xvxexpsp: VSX Vector Extract Exponent Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xviexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:38 +0000 (14:20 +0530)]
target-ppc: Add xviexpdp instruction

xviexpdp: VSX Vector Insert Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xviexpsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:37 +0000 (14:20 +0530)]
target-ppc: Add xviexpsp instruction

xviexpsp: VSX Vector Insert Exponent Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsiexpqp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:36 +0000 (14:20 +0530)]
target-ppc: Add xsiexpqp instruction

xsiexpqp: VSX Scalar Insert Exponent Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsiexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:35 +0000 (14:20 +0530)]
target-ppc: Add xsiexpdp instruction

xsiexpdp: VSX Scalar Insert Exponent Double Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdsr. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:12 +0000 (00:10 -0200)]
ppc: Implement bcdsr. instruction

bcdsr.: Decimal shift and round. This instruction works like bcds.
however, when performing right shift, 1 will be added to the
result if the last digit was >= 5.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdus. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:11 +0000 (00:10 -0200)]
ppc: Implement bcdus. instruction

bcdus.: Decimal unsigned shift. This instruction works like bcds. but
considers only unsigned BCDs (no sign in least meaning 4 bits).

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcds. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:10 +0000 (00:10 -0200)]
ppc: Implement bcds. instruction

bcds.: Decimal shift. Given two registers vra and vrb, this instruction
shift the vrb value by vra bits into the result register.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohost-utils: Implement unsigned quadword left/right shift and unit tests
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:09 +0000 (00:10 -0200)]
host-utils: Implement unsigned quadword left/right shift and unit tests

Implements 128-bit left shift and right shift as well as their
testcases. By design, shift silently mods by 128, so the caller is
responsible to assert the shift range if necessary.

Left shift sets the overflow flag if any non-zero digit is shifted out.

Examples:
 ulshift(&low, &high, 250, &overflow);
 equivalent: n << 122

 urshift(&low, &high, -2);
 equivalent: n << 126

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
[dwg: Added test-shift128 to .gitignore]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohost-utils: Move 128-bit guard macro to .c file
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:08 +0000 (00:10 -0200)]
host-utils: Move 128-bit guard macro to .c file

It is not possible to implement functions in host-utils.c for
architectures with quadwords because the guard is implemented in the
Makefile. This patch move the guard out of the Makefile to the
implementation file.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agosoftfloat: Fix the default qNAN for target-ppc
Bharata B Rao [Tue, 10 Jan 2017 08:50:34 +0000 (14:20 +0530)]
softfloat: Fix the default qNAN for target-ppc

Currently float128_default_nan() returns 0xFFFF800000000000 in the
higher double word, but it should return 0x7FFF800000000000 which
is the correct higher double word for default qNAN on PowerPC.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: xscvqpdp zero VSR
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:33 +0000 (14:20 +0530)]
target-ppc: xscvqpdp zero VSR

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
Jose Ricardo Ziviani [Wed, 11 Jan 2017 21:11:25 +0000 (19:11 -0200)]
ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro

This commit fixes a warning in the code "(i * 2) ? .. : ..", which
should be better as "i ? .. : ..", and improves the BCD_DIG_BYTE
macro by placing parentheses around its argument to avoid possible
expansion issues like: BCD_DIG_BYTE(i + j).

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Prevent inifnite loop in decrementer auto-reload.
Roman Kapl [Mon, 9 Jan 2017 11:23:38 +0000 (12:23 +0100)]
ppc: Prevent inifnite loop in decrementer auto-reload.

If the DECAR register is set to 0, QEMU tries to reload the decrementer with
zero in an inifinite loop. According to PPC documentation, the decrementer is
triggered on 1->0 transition, so avoid reloading the decrementer if if is
already zero.

The problem does not manifest under Linux, but it is valid to set DECAR to zero
(and may make sense as part of decrementer initialization when interrupts are
disabled).

Signed-off-by: Roman Kapl <rka@sysgo.com>
[dwg: Fixed style nit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvqpdp instruction
Bharata B Rao [Mon, 9 Jan 2017 14:26:15 +0000 (19:56 +0530)]
target-ppc: Add xscvqpdp instruction

xscvqpdp:  VSX Scalar round & Convert Quad-Precision format to
           Double-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvdpqp instruction
Bharata B Rao [Mon, 9 Jan 2017 14:26:14 +0000 (19:56 +0530)]
target-ppc: Add xscvdpqp instruction

xscvdpqp: VSX Scalar Convert Double-Precision format to
          Quad-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsaddqp instructions
Bharata B Rao [Mon, 9 Jan 2017 14:26:13 +0000 (19:56 +0530)]
target-ppc: Add xsaddqp instructions

xsaddqp:  VSX Scalar Add Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Add ppc_set_compat_all()
David Gibson [Thu, 10 Nov 2016 03:37:38 +0000 (14:37 +1100)]
ppc: Add ppc_set_compat_all()

Once a compatiblity mode is negotiated with the guest,
h_client_architecture_support() uses run_on_cpu() to update each CPU to
the new mode.  We're going to want this logic somewhere else shortly,
so make a helper function to do this global update.

We put it in target-ppc/compat.c - it makes as much sense at the CPU level
as it does at the machine level.  We also move the cpu_synchronize_state()
into ppc_set_compat(), since it doesn't really make any sense to call that
without synchronizing state.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agopseries: Rewrite CAS PVR compatibility logic
David Gibson [Wed, 16 Nov 2016 02:54:48 +0000 (13:54 +1100)]
pseries: Rewrite CAS PVR compatibility logic

During boot, PAPR guests negotiate CPU model support with the
ibm,client-architecture-support mechanism.  The logic to implement this in
qemu is very convoluted.  This cleans it up to be cleaner, using the new
ppc_check_compat() call.

The new logic for choosing a compatibility mode is:
    1. Usually, use the most recent compatibility mode that is
            a) supported by the guest
            b) supported by the CPU
        and c) no later than the maximum allowed (if specified)
    2. If no suitable compatibility mode was found, the guest *does*
       support this CPU explicitly, and no maximum compatibility mode is
       specified, then use "raw" mode for the current CPU
    3. Otherwise, fail the boot.

This differs from the results of the old code: the old code preferred using
"raw" mode to a compatibility mode, whereas the new code prefers a
compatibility mode if available.  Using compatibility mode preferentially
means that we're more likely to be able to migrate the guest to a similar
but not identical host.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agopxb: Restrict to x86
David Gibson [Fri, 6 Jan 2017 05:04:09 +0000 (16:04 +1100)]
pxb: Restrict to x86

The PCI Expander Bridge (PXB) device is essentially a hack to allow
different PCIe devices to be assigned to different NUMA nodes on x86.  Each
PXB is sort-of a separate PCI host bridge, except that its config space
is shared with the config space of the main PCI host bridge, rather than
being independent.

This is only necessary if the platform doesn't (easily) allow truly
independent PCI host bridges.  AFAIK that's just x86.

This patch makes it possible to configure PXB out of the build, and adjusts
the default configs so it's only included on x86 targets.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
7 years agotarget-ppc: Add xsxsigqp instructions
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:56 +0000 (11:44 +0530)]
target-ppc: Add xsxsigqp instructions

xsxsigqp: VSX Scalar Extract Significand Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxsigdp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:55 +0000 (11:44 +0530)]
target-ppc: Add xsxsigdp instruction

xsxsigdp: VSX Scalar Extract Significand Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxexpqp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:54 +0000 (11:44 +0530)]
target-ppc: Add xsxexpqp instruction

xsxexpqp: VSX Scalar Extract Exponent Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxexpdp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:53 +0000 (11:44 +0530)]
target-ppc: Add xsxexpdp instruction

xsxexpdp: VSX Scalar Extract Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Use correct precision for FPRF setting
Bharata B Rao [Fri, 6 Jan 2017 06:14:50 +0000 (11:44 +0530)]
target-ppc: Use correct precision for FPRF setting

Use correct FP precision when setting FPRF in FP conversion helpers
instead of always assuming float64 precision.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvdphp, xscvhpdp
Bharata B Rao [Fri, 6 Jan 2017 06:14:49 +0000 (11:44 +0530)]
target-ppc: Add xscvdphp, xscvhpdp

xscvdphp: VSX Scalar round & Convert Double-Precision format to
          Half-Precision format
xscvhpdp: VSX Scalar Convert Half-Precision format to
          Double-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
Bharata B Rao [Fri, 6 Jan 2017 06:14:47 +0000 (11:44 +0530)]
target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64

Since helper_compute_fprf() works on float64 argument, rename it
to helper_compute_fprf_float64(). Also use a macro to generate
helper_compute_fprf_float64() so that float128 version of the same
helper can be introduced easily later.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Replace isden by float64_is_zero_or_denormal
Bharata B Rao [Fri, 6 Jan 2017 06:14:46 +0000 (11:44 +0530)]
target-ppc: Replace isden by float64_is_zero_or_denormal

Replace isden() by float64_is_zero_or_denormal() so that code in
helper_compute_fprf() can be reused to work with float128 argument.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Use float64 arg in helper_compute_fprf()
Bharata B Rao [Fri, 6 Jan 2017 06:14:45 +0000 (11:44 +0530)]
target-ppc: Use float64 arg in helper_compute_fprf()

Use float64 argument instead of unit64_t in helper_compute_fprf()
This allows code in helper_compute_fprf() to be reused later to
work with float128 argument too.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add IBM RS/6000 7020 (40p) machine emulation
Hervé Poussineau [Sat, 7 Jan 2017 15:23:43 +0000 (16:23 +0100)]
prep: add IBM RS/6000 7020 (40p) machine emulation

Machine supports both Open Hack'Ware and OpenBIOS.
Open Hack'Ware is the default because OpenBIOS is currently unable to boot
PReP boot partitions or PReP kernels.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
[dwg: Correct compile failure with KVM located by Thomas Huth]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add IBM RS/6000 7020 (40p) memory controller
Hervé Poussineau [Sat, 7 Jan 2017 15:23:42 +0000 (16:23 +0100)]
prep: add IBM RS/6000 7020 (40p) memory controller

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Added CONFIG_RS6000_MC to ppc64 or it breaks testcases]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add PReP System I/O
Hervé Poussineau [Sat, 7 Jan 2017 15:23:41 +0000 (16:23 +0100)]
prep: add PReP System I/O

This device is a partial duplicate of System I/O device available in hw/ppc/prep.c
This new one doesn't have all the Motorola-specific registers.
The old one should be deprecated and removed with the 'prep' machine.

Partial documentation available at
ftp://ftp.software.ibm.com/rs6000/technology/spec/srp1_1.exe
section 6.1.5 (I/O Device Mapping)

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxinsertw instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:44 +0000 (11:44 +0530)]
target-ppc: Add xxinsertw instruction

xxinsertw: VSX Vector Insert Word

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxextractuw instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:43 +0000 (11:44 +0530)]
target-ppc: Add xxextractuw instruction

xxextractuw: VSX Vector Extract Unsigned Word

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify spapr_vio.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:28 +0000 (08:26 +0800)]
hw/ppc: QOM'ify spapr_vio.c

Drop the old and empty SysBus init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify ppce500_spin.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:27 +0000 (08:26 +0800)]
hw/ppc: QOM'ify ppce500_spin.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify e500.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:26 +0000 (08:26 +0800)]
hw/ppc: QOM'ify e500.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/gpio: QOM'ify mpc8xxx.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:25 +0000 (08:26 +0800)]
hw/gpio: QOM'ify mpc8xxx.c

* Drop the old SysBus init function and use instance_init
* Change mpc8xxx_gpio_reset to a DeviceClass::reset function

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add ivshmem-test for ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:48 +0000 (16:29 +0100)]
qtest: add ivshmem-test for ppc64

The test has been converted to use libqos, we can
now use it on ppc64. We also make the test fail on
all other architectures.
As libqos on ppc64 is not able to manage hotplug
and IRQ/MSI, we disable this part in the test on ppc64.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
[dwg: Make test conditional on CONFIG_EVENTFD]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: convert ivshmem-test to use libqos
Laurent Vivier [Thu, 5 Jan 2017 15:29:47 +0000 (16:29 +0100)]
qtest: convert ivshmem-test to use libqos

This will allow to use it with ppc64.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agolibqos: fix spapr qpci_map()
Laurent Vivier [Thu, 5 Jan 2017 15:29:46 +0000 (16:29 +0100)]
libqos: fix spapr qpci_map()

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add display-vga-test to ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:45 +0000 (16:29 +0100)]
qtest: add display-vga-test to ppc64

Only enable for ppc64 in the Makefile, but added
code in the file to check cirrus card only on architectures
supporting it (alpha, mips, i386, x86_64).

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add netfilter tests for ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:44 +0000 (16:29 +0100)]
qtest: add netfilter tests for ppc64

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Validate compatibility modes when setting
David Gibson [Fri, 28 Oct 2016 11:51:46 +0000 (22:51 +1100)]
ppc: Validate compatibility modes when setting

Current ppc_set_compat() will attempt to set any compatiblity mode
specified, regardless of whether it's available on the CPU.  The caller is
expected to make sure it is setting a possible mode, which is awkwward
because most of the information to make that decision is at the CPU level.

This begins to clean this up by introducing a ppc_check_compat() function
which will determine if a given compatiblity mode is supported on a CPU
(and also whether it lies within specified minimum and maximum compat
levels, which will be useful later).  It also contains an assertion that
the CPU has a "virtual hypervisor"[1], that is, that the guest isn't
permitted to execute hypervisor privilege code.  Without that, the guest
would own the PCR and so could override any mode set here.  Only machine
types which use a virtual hypervisor (i.e. 'pseries') should use
ppc_check_compat().

ppc_set_compat() is modified to validate the compatibility mode it is given
and fail if it's not available on this CPU.

[1] Or user-only mode, which also obviously doesn't allow access to the
hypervisor privileged PCR.  We don't use that now, but could in future.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agoppc: Rewrite ppc_get_compat_smt_threads()
David Gibson [Fri, 28 Oct 2016 11:35:48 +0000 (22:35 +1100)]
ppc: Rewrite ppc_get_compat_smt_threads()

To continue consolidation of compatibility mode information, this rewrites
the ppc_get_compat_smt_threads() function using the table of compatiblity
modes in target-ppc/compat.c.

It's not a direct replacement, the new ppc_compat_max_threads() function
has simpler semantics - it just returns the number of threads the cpu
model has, taking into account any compatiblity mode it is in.

This no longer takes into account kvmppc_smt_threads() as the previous
version did.  That check wasn't useful because we check in
ppc_cpu_realizefn() that CPUs aren't instantiated with more threads
than kvm allows (or if we didn't things will already be broken and
this won't make it any worse).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agoppc: Rewrite ppc_set_compat()
David Gibson [Wed, 4 Jan 2017 05:19:50 +0000 (16:19 +1100)]
ppc: Rewrite ppc_set_compat()

This rewrites the ppc_set_compat() function so that instead of open coding
the various compatibility modes, it reads the relevant data from a table.
This is a first step in consolidating the information on compatibility
modes scattered across the code into a single place.

It also makes one change to the logic.  The old code masked the bits
to be set in the PCR (Processor Compatibility Register) by which bits
are valid on the host CPU.  This made no sense, since it was done
regardless of whether our guest CPU was the same as the host CPU or
not.  Furthermore, the actual PCR bits are only relevant for TCG[1] -
KVM instead uses the compatibility mode we tell it in
kvmppc_set_compat().  When using TCG host cpu information usually
isn't even present.

While we're at it, we put the new implementation in a new file to make the
enormous translate_init.c a little smaller.

[1] Actually it doesn't even do anything in TCG, but it will if / when we
    get to implementing compatibility mode logic at that level.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agopseries: Add pseries-2.9 machine type
David Gibson [Thu, 8 Dec 2016 05:39:18 +0000 (16:39 +1100)]
pseries: Add pseries-2.9 machine type

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
7 years agoprep: do not use global variable to access nvram
Hervé Poussineau [Thu, 29 Dec 2016 22:12:13 +0000 (23:12 +0100)]
prep: do not use global variable to access nvram

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc/spapr: Fix boot path of usb-host storage devices
Thomas Huth [Wed, 14 Dec 2016 21:44:17 +0000 (22:44 +0100)]
hw/ppc/spapr: Fix boot path of usb-host storage devices

When passing through an USB storage device to a pseries guest, it
is currently not possible to automatically boot from the device
if the "bootindex" property has been specified, too (e.g. when using
"-device nec-usb-xhci -device usb-host,hostbus=1,hostaddr=2,bootindex=0"
at the command line). The problem is that QEMU builds a device tree path
like "/pci@800000020000000/usb@0/usb-host@1" and passes it to SLOF
in the /chosen/qemu,boot-list property. SLOF, however, probes the
USB device, recognizes that it is a storage device and thus changes
its name to "storage", and additionally adds a child node for the
SCSI LUN, so the correct boot path in SLOF is something like
"/pci@800000020000000/usb@0/storage@1/disk@101000000000000" instead.
So when we detect an USB mass storage device with SCSI interface,
we've got to adjust the firmware boot-device path properly that
SLOF can automatically boot from the device.

Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1354177
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stxvll instructions
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:23 +0000 (17:47 +0530)]
target-ppc: implement stxvll instructions

stxvll: Store VSX Vector Left-justified with Length

Vector (8-bit elements) in BE/LE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stxvl instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:22 +0000 (17:47 +0530)]
target-ppc: implement stxvl instruction

stxvl: Store VSX Vector with Length

Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxvll instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:21 +0000 (17:47 +0530)]
target-ppc: implement lxvll instruction

lxvll: Load VSX Vector Left-justified with Length

Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Loading 14 bytes to vector (8-bit elements) in BE/LE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxvl instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:20 +0000 (17:47 +0530)]
target-ppc: implement lxvl instruction

lxvl: Load VSX Vector with Length

Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Loading 14 bytes results in:

Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxperm and xxpermr instructions
Bharata B Rao [Wed, 7 Dec 2016 18:25:02 +0000 (23:55 +0530)]
target-ppc: Add xxperm and xxpermr instructions

xxperm:  VSX Vector Permute
xxpermr: VSX Vector Permute Right-indexed

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xscpsgnqp instruction
Nikunj A Dadhania [Wed, 7 Dec 2016 18:25:01 +0000 (23:55 +0530)]
target-ppc: implement xscpsgnqp instruction

xscpsgnqp: VSX Scalar Copy Sign Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xsnegqp instruction
Nikunj A Dadhania [Wed, 7 Dec 2016 18:25:00 +0000 (23:55 +0530)]
target-ppc: implement xsnegqp instruction

xsnegqp: VSX Scalar Negate Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcd_is_valid function
Jose Ricardo Ziviani [Tue, 6 Dec 2016 19:40:04 +0000 (17:40 -0200)]
target-ppc: Implement bcd_is_valid function

A function to check if all digits of a given BCD number is valid is
here presented because more instructions will need to reuse the
same code.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xsabsqp/xsnabsqp instruction
David Gibson [Tue, 6 Dec 2016 03:49:23 +0000 (14:49 +1100)]
target-ppc: implement xsabsqp/xsnabsqp instruction

xsabsqp:  VSX Scalar Absolute Quad-Precision
xsnabsqp: VSX Scalar Negative Absolute Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>