Now that the mtd core supports more then 64 ecc bytes we can use it instead of
some a custom hack in the jz4740 nand driver.
This patch removes the custom {read,write}_page handlers from the jz4740 nand
driver. Thus the driver will now fallback to the default handlers from the nand
core.
Jesper Juhl [Mon, 8 Nov 2010 23:09:02 +0000 (00:09 +0100)]
mtd: remove unnecessary casts of void ptr returning alloc function return values
The [vk][cmz]alloc(_node) family of functions return void pointers which
it's completely unnecessary/pointless to cast to other pointer types since
that happens implicitly.
Vasiliy Kulikov [Sat, 6 Nov 2010 14:41:24 +0000 (17:41 +0300)]
mtd: mtdchar: fix information leak to userland
Structure mtd_info_user is copied to userland with padding byted
between "type" and "flags" fields uninitialized. It leads to leaking
of contents of kernel stack memory.
mtd: onenand: implement cache program feature for 4KiB page onenand
Implement cache program feature for 4KiB page onenand.
This feature improves the write data performance.
The observed 128KiB data program speed change is
from 8827KiB/s to 14156 KiB/s when the feature is enabled.
Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: onenand: add option and variable for cache program feature
A new option is added for cache program feature. A new variable
ongoing is introduced for onenand_chip to handle the multi-command
cache program operation.
Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Kevin Cernekee [Sun, 31 Oct 2010 04:11:02 +0000 (21:11 -0700)]
mtd: m25p80: Reinstate error print on unrecognized flash
Commit b34bc037b26e621e5fc13466767e4da110a7b3d3 removed the
"unrecognized JEDEC id" error message, causing the probe function to
silently abort if the flash ID is unrecognized.
It is desirable to produce diagnostic output in this situation so that
the user has some idea what went wrong.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Grant Likely [Sat, 30 Oct 2010 06:35:02 +0000 (07:35 +0100)]
mtd: Fix MTD_OF_PARTS for all arch and minor tidy of MTD_PARTITIONS
MTD_OF_PARTS should be possible on all architectures, not just
powerpc and microblaze, and it probably should not be a user
selectable option. Neither does it need to be in a separate module.
Also, rework MTD Kconfig to group options dependant on MTD_PARTITIONS
into a if/endif block. Do the same for MTD_REDBOOT_PARTS.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Linus Torvalds [Sat, 30 Oct 2010 15:31:35 +0000 (08:31 -0700)]
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (82 commits)
mtd: fix build error in m25p80.c
mtd: Remove redundant mutex from mtd_blkdevs.c
MTD: Fix wrong check register_blkdev return value
Revert "mtd: cleanup Kconfig dependencies"
mtd: cfi_cmdset_0002: make sector erase command variable
mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips
mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode
mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one
block2mtd: dubious assignment
P4080/mtd: Fix the freescale lbc issue with 36bit mode
P4080/eLBC: Make Freescale elbc interrupt common to elbc devices
mtd: phram: use KBUILD_MODNAME
mtd: OneNAND: S5PC110: Fix double call suspend & resume function
mtd: nand: fix MTD_MODE_RAW writes
jffs2: use kmemdup
mtd: sm_ftl: cosmetic, use bool when possible
mtd: r852: remove useless pci powerup/down from suspend/resume routines
mtd: blktrans: fix a race vs kthread_stop
mtd: blktrans: kill BKL
mtd: allow to unload the mtdtrans module if its block devices aren't open
...
Fix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c
Linus Torvalds [Sat, 30 Oct 2010 15:26:25 +0000 (08:26 -0700)]
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
ARM: memblock: setup lowmem mappings using memblock
ARM: memblock: move meminfo into find_limits directly
ARM: memblock: convert free_highpages() to use memblock
ARM: move freeing of highmem pages out of mem_init()
ARM: memblock: convert memory detail printing to use memblock
ARM: memblock: use memblock to free memory into arm_bootmem_init()
ARM: memblock: use memblock when initializing memory allocators
ARM: ensure membank array is always sorted
ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
ARM: 6464/2: fix spinlock recursion in adjust_pte()
ARM: fix memblock breakage
ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
ARM: 6449/1: Fix for compiler warning of uninitialized variable.
ARM: 6445/1: fixup TCM memory types
ARM: imx: Add wake functionality to GPIO
ARM: mx5: Add gpio-keys to mx51 babbage board
ARM: imx: Add gpio-keys to plat-mxc
mx31_3ds: Fix spi registration
mx31_3ds: Fix the logic for detecting the debug board
...
wu zhangjin [Sat, 30 Oct 2010 15:19:35 +0000 (08:19 -0700)]
fs/compat.c: fix build on MIPS/s390
The definition of PAGE_CACHE_MASK in <linux/pagemap.h> is needed to use
MAX_RW_COUNT, and on x86-64 that gets done indirectly through the
architecture header includes. But on MIPS and s390 that doesn't happen,
and we need to make sure that fs/compat.c includes pagemap.h explicitly.
Introduced in commit 435f49a518c7 ("readv/writev: do the same
MAX_RW_COUNT truncation that read/write does").
Andres Salomon [Sat, 30 Oct 2010 04:04:19 +0000 (21:04 -0700)]
mtd: fix build error in m25p80.c
While building an x86 distro kernel, I hit the following:
Kernel: arch/x86/boot/bzImage is ready (#7)
ERROR: "of_mtd_parse_partitions" [drivers/mtd/devices/m25p80.ko]
undefined!
of_mtd_parse_partitions is defined with MTD_OF_PARTS, and that's only
built on PPC and microblaze. The code in question should be wrapped w/
a stricter #ifdef.
Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Sat, 30 Oct 2010 11:39:21 +0000 (12:39 +0100)]
mtd: Remove redundant mutex from mtd_blkdevs.c
In commit 2a48fc0ab24241755dc93bfd4f01d68efab47f5a ('block: autoconvert
trivial BKL users to private mutex'), Arnd replaced the BKL usage with a
mutex. However, Maxim has already provided a better fix in commit 480792b7bf188c29b8d4b10fee65c3a06ec5dbf7 ('mtd: blktrans: kill BKL'),
which was simply to remove the BKL without replacing it — since he'd
already made it do all necessary locking for itself.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Linus Torvalds [Sat, 30 Oct 2010 01:58:00 +0000 (18:58 -0700)]
Merge branches 'x86-fixes-for-linus' and 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, alternative: Call stop_machine_text_poke() on all cpus
x86-32: Restore irq stacks NUMA-aware allocations
x86, memblock: Fix early_node_mem with big reserved region.
* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, uv: More Westmere support on SGI UV
x86, uv: Enable Westmere support on SGI UV
Linus Torvalds [Fri, 29 Oct 2010 23:49:34 +0000 (16:49 -0700)]
Merge branch 'for-2637/s3c24xx-all' of git://git.fluff.org/bjdooks/linux
* 'for-2637/s3c24xx-all' of git://git.fluff.org/bjdooks/linux:
ARM: h1940: add UDA1380 to i2c devices list
ARM: h1940: Fix backlight and LCD power functions
ARM: S3C2440: fix boot failure introduced by recent changes in gpiolib
ARM: S3C2440: various fixes in Kconfig file
ARM: rx1950: Add UDA1380 to i2c devices list
ARM: rx1950: Add LEDs support
ARM: rx1950: Add battery device
ARM: h1940: Implement mmc_power function
ARM: h1940: Use gpiolib for latch access
Current implementation of LCD and backlight power control functions
is not complete, as result PDA consumes power in suspend.
Fix this issue by managing state of some latch bits, just like
WinMobile does.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Jason Baron [Thu, 28 Oct 2010 15:20:27 +0000 (11:20 -0400)]
x86, alternative: Call stop_machine_text_poke() on all cpus
Currently, text_poke_smp() passes a NULL as the third argument to
__stop_machine(), which will only run stop_machine_text_poke()
on 1 cpu. Change NULL -> cpu_online_mask, as stop_machine_text_poke()
is intended to be run on all cpus.
I actually didn't notice any problems with stop_machine_text_poke()
only being called on 1 cpu, but found this via code inspection.
Signed-off-by: Jason Baron <jbaron@redhat.com>
LKML-Reference: <20101028152026.GB2875@redhat.com> Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
ARM: S3C2440: fix boot failure introduced by recent changes in gpiolib
Recent changes in s3c gpio break mini2440 board and may be others.
The problem is that mach-mini2440.c: mini2440_init()
(where we call s3c_gpio_setpull()) is called before s3c2440.c: s3c2440_init()
(where we initialize s3c24xx_gpiocfg_default.set_pull function pointer).
This causes dereferencing of NULL pointer at boot time and a kernel panic.
* kconfig symbols defined in arch/arm/mach-s3c2440/Kconfig are only available
when ARCH_S3C2410 is selected, so no need to make some of them depend
on ARCH_S3C2410.
* fix CPU_S3C24405B typo in "config S3C2440_DMA".
* mini2440: remove unconditionally select of SND_S3C24XX_SOC_S3C24XX_UDA134X.
Those fixes avoid the following warnings at make time:
scripts/kconfig/qconf arch/arm/Kconfig
warning: (MACH_MINI2440 && ARCH_S3C2410) selects SND_S3C24XX_SOC_S3C24XX_UDA134X
which has unmet direct dependencies (SND_S3C24XX_SOC && ARCH_S3C2410)
warning: (CPU_S3C2440 && ARCH_S3C2410 && S3C2410_DMA) selects S3C2440_DMA which
has unmet direct dependencies (ARCH_S3C2410 && CPU_S3C24405B)
warning: (CPU_S3C2440 && ARCH_S3C2410 || CPU_S3C2442 && ARCH_S3C2410)
selects CPU_S3C244X which has unmet direct dependencies (!ARCH_S3C2410)
Linus Torvalds [Fri, 29 Oct 2010 23:15:57 +0000 (16:15 -0700)]
Merge branch 'for-2637/i2c-all' of git://git.fluff.org/bjdooks/linux
* 'for-2637/i2c-all' of git://git.fluff.org/bjdooks/linux:
i2c-intel-mid: Driver depends on PCI
i2c-intel-mid: support for Moorestown and Medfield platform
i2c-nomadik: fixup bus delays
i2c-nomadik: support smbus emulation
i2c-nomadik: dynamic clocking
i2c-nomadik: documentation fixes
i2c-s3c2410: Enable i2c clock only when doing some transfert
Daniel Walker [Wed, 27 Oct 2010 20:04:58 +0000 (13:04 -0700)]
msm: fix compile failure when no debug uart is selected
If the board has a debug uart the user is given a choice of which
uart to use. The user can also select NONE, which means not to use one.
In most of our header files when NONE is selected nothing is defined
for MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile
failure in debug-macro.S which expect something to be defined there.
Example of the failure,
arch/arm/kernel/built-in.o: In function `hexbuf':
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS'
linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE'
This fixes the compile failure by adding an ifdef to debug-macro.S
that removes all the debug uart code in the case of NONE.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Daniel Walker [Wed, 27 Oct 2010 22:25:59 +0000 (15:25 -0700)]
msm: fix debug-macro.S build failure
Originally there was an ifdef case to handle when no debug uart
was selected. In commit 0ea1293009826da45e1019f45dfde1e557bb30df
that case was removed which causes the following build failure,
linux-2.6/arch/arm/kernel/debug.S: Assembler messages:
linux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2'
linux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3'
linux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3'
linux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2'
This is a partial revert to add back the case which was removed with
two caveats. First the API for the addruart macro was updated, and
the new addruart case now return 0xfff00000 so that a know IO mapping
is created instead of a random one.
Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Jason Wang <jason77.wang@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Randy Dunlap [Fri, 29 Oct 2010 20:37:09 +0000 (13:37 -0700)]
i2c-intel-mid: Driver depends on PCI
i2c-intel-mid driver uses PCI data structs and interfaces,
so it should depend on PCI. Fixes these build errors:
drivers/i2c/busses/i2c-intel-mid.c:977: error: implicit declaration of function 'pci_request_region'
drivers/i2c/busses/i2c-intel-mid.c:1077: error: implicit declaration of function 'pci_release_region'
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Ba Zheng <zheng.ba@intel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Ben Dooks <ben-linux@fluff.org> Cc: linux-i2c@vger.kernel.org Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Linus Torvalds [Fri, 29 Oct 2010 21:43:30 +0000 (14:43 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-kconfig
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-kconfig:
kconfig: Have streamline_config process menuconfigs too
kconfig: Fix streamline_config to read multi line deps in Kconfig files
kconfig: Fix missing declaration of variable $dir in streamline_config.pl
kconfig: Fix variable name typo %prompts in streamline_config.pl
kconfig: Make localmodconfig handle environment variables
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (34 commits)
b43: Fix warning at drivers/mmc/core/core.c:237 in mmc_wait_for_cmd
mac80211: fix failure to check kmalloc return value in key_key_read
libertas: Fix sd8686 firmware reload
ath9k: Fix incorrect access of rate flags in RC
netfilter: xt_socket: Make tproto signed in socket_mt6_v1().
stmmac: enable/disable rx/tx in the core with a single write.
net: atarilance - flags should be unsigned long
netxen: fix kdump
pktgen: Limit how much data we copy onto the stack.
net: Limit socket I/O iovec total length to INT_MAX.
USB: gadget: fix ethernet gadget crash in gether_setup
fib: Fix fib zone and its hash leak on namespace stop
cxgb3: Fix panic in free_tx_desc()
cxgb3: fix crash due to manipulating queues before registration
8390: Don't oops on starting dev queue
dccp ccid-2: Stop polling
dccp: Refine the wait-for-ccid mechanism
dccp: Extend CCID packet dequeueing interface
dccp: Return-value convention of hc_tx_send_packet()
igbvf: fix panic on load
...
Linus Torvalds [Fri, 29 Oct 2010 21:15:12 +0000 (14:15 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ecryptfs/ecryptfs-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ecryptfs/ecryptfs-2.6:
eCryptfs: Print mount_auth_tok_only param in ecryptfs_show_options
ecryptfs: added ecryptfs_mount_auth_tok_only mount parameter
ecryptfs: checking return code of ecryptfs_find_auth_tok_for_sig()
ecryptfs: release keys loaded in ecryptfs_keyring_auth_tok_for_sig()
eCryptfs: Clear LOOKUP_OPEN flag when creating lower file
ecryptfs: call vfs_setxattr() in ecryptfs_setxattr()
Jesper Juhl [Fri, 29 Oct 2010 14:10:26 +0000 (16:10 +0200)]
mac80211: fix failure to check kmalloc return value in key_key_read
I noticed two small issues in mac80211/debugfs_key.c::key_key_read while
reading through the code. Patch below.
The key_key_read() function returns ssize_t and the value that's actually
returned is the return value of simple_read_from_buffer() which also
returns ssize_t, so let's hold the return value in a ssize_t local
variable rather than a int one.
Also, memory is allocated dynamically with kmalloc() which can fail, but
the return value of kmalloc() is not checked, so we may end up operating
on a null pointer further on. So check for a NULL return and bail out with
-ENOMEM in that case.
Signed-off-by: Jesper Juhl <jj@chaosbits.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Paul Fox [Fri, 29 Oct 2010 13:57:28 +0000 (14:57 +0100)]
libertas: Fix sd8686 firmware reload
For the SD8686, we cannot rely on the scratch register to read the firmware
load status, because the same register is used for storing RX packet length.
Broaden the check to account for this.
The module can now be unloaded/reloaded successfully.
Based on the implementation from libertas_tf.
Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: Steve deRosier <steve@cozybit.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
The index variable to access the rate flags should be obtained from the
inner loop counter which corresponds to the rate table structure.This
fixes the invalid rate selection i.e when the supported basic rate is
invalid on a particular band and also the following warning message.
Thanks to Raj for finding this out.
Dongdong Deng [Thu, 28 Oct 2010 02:47:00 +0000 (21:47 -0500)]
kgdb,ppc: Individual register get/set for ppc
commit 534af1082329392bc29f6badf815e69ae2ae0f4c(kgdb,kdb: individual
register set and and get API) introduce dbg_get_reg/dbg_set_reg API
for individual register get and set.
This patch implement those APIs for ppc.
Signed-off-by: Dongdong Deng <dongdong.deng@windriver.com> Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Dongdong Deng [Tue, 31 Aug 2010 02:06:00 +0000 (21:06 -0500)]
kgdbts: prevent re-entry to kgdbts before it unregisters
The "kgdb_connected" variable of debug_core just indicates whether or
not kgdbts is connected to the debug_core. It does not completely
prevent a script from trying invoke kgdbts again and possibly crashing
the system (see Call Trace below).
The configured variable in kgtbts can be used instead of
kgdb_connected instead of kgdb_connected. The cleanup_kgdbts() can
also be removed because there is no possible way to build kgdbts as a
kernel module that you could unload with rmmod.
Dongdong Deng [Wed, 18 Aug 2010 11:02:00 +0000 (06:02 -0500)]
debug_core,x86,blackfin: Clean up hw debug disable API
The kgdb_disable_hw_debug() was an architecture specific function for
disabling all hardware breakpoints on a per cpu basis when entering
the debug core.
This patch will remove the weak function kdbg_disable_hw_debug() and
change it into a call back which lives with the rest of hw breakpoint
call backs in struct kgdb_arch.
Signed-off-by: Dongdong Deng <dongdong.deng@windriver.com> Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Rabin Vincent [Tue, 26 Oct 2010 17:49:00 +0000 (12:49 -0500)]
kgdb,arm: fix register dump
DBG_MAX_REG_NUM incorrectly had the number of indices in the GDB regs
array rather than the number of registers, leading to an oops when the
"rd" command is used in KDB.
Cc: stable@kernel.org Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Jason Wessel [Fri, 29 Oct 2010 13:04:16 +0000 (08:04 -0500)]
kdb: fix per_cpu command to remove supress mask
Rusty pointed out that the per_cpu command uses up lots of space on
the stack and the cpu supress mask is probably not needed.
This patch removes the need for the supress mask as well as fixing up
the following problems with the kdb per_cpu command:
* The per_cpu command should allow an address as an argument
* When you have more data than can be displayed on one screen allow
the user to break out of the print loop.
Reported-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Linus Torvalds [Fri, 29 Oct 2010 18:13:10 +0000 (11:13 -0700)]
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (46 commits)
ftrace/MIPS: Enable C Version of recordmcount
ftrace/MIPS: Add module support for C version of recordmcount
ftrace/MIPS: Add MIPS64 support for C version of recordmcount
MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.
MIPS: Allow UserLocal on MIPS_R1 processors
MIPS: Honor L2 bypass bit
MIPS: Add BMIPS CP0 register definitions
MIPS: Add BMIPS processor types to Kconfig
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
MIPS: Add support for hardware performance events (mipsxx)
MIPS: Perf-events: Add callchain support
MIPS: add support for hardware performance events (skeleton)
MIPS: add support for software performance events
MIPS: define local_xchg from xchg_local to atomic_long_xchg
MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant
MIPS: AR7: Initialize GPIO earlier
MIPS: Add platform device and Kconfig for Octeon USB EHCI / OHCI
USB: Add EHCI and OHCH glue for OCTEON II SOCs.
MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.
MIPS: Octeon: Apply CN63XXP1 errata workarounds.
...
Wu Zhangjin [Wed, 27 Oct 2010 10:59:08 +0000 (18:59 +0800)]
ftrace/MIPS: Add module support for C version of recordmcount
Since MIPS modules' address space differs from the core kernel space, to access
the _mcount in the core kernel, the kernel functions in modules must use long
call (-mlong-calls): load the _mcount address into one register and jump to the
address stored by the register:
In the old Perl version of recordmcount, we only need to record the position of
the 1st R_MIPS_HI16 type of _mcount, and later, in ftrace_make_nop(), replace
the instruction in this position by a "b label" and in ftrace_make_call(),
replace it back.
But, the default C version of recordmcount records all of the _mcount symbols,
so, we must filter the 2nd _mcount like the Perl version of recordmcount does.
The C version of recordmcount copes with the symbols before they are linked, So
It doesn't know the type of the symbols and therefore can not filter the
symbols as the Perl version of recordmcount does. But as we can see above, the
2nd _mcount symbols of the long call alawys follows the 1st _mcount symbol of
the same long call, which means the offset from the 1st to the 2nd is fixed, it
is 0x10-0xc = 4 here, 4 is the length of the 1st load instruciton, for MIPS has
fixed length of instructions, this offset is always 4.
And as we know, the _mcount is inserted into the entry of every kernel
function, the offset between the other _mcount's is expected to be always
bigger than 4. So, to filter the 2ns _mcount symbol of the long call, we can
simply check the offset between two _mcount symbols, If it is 4, then, filter
the 2nd _mcount symbol.
To avoid touching too much code, an 'empty' function fn_is_fake_mcount() is
added for all of the archs, and the specific archs can override it via chaning
the function pointer: is_fake_mcount in do_file() with the e_machine. e.g. This
patch adds MIPS_is_fake_mcount() to override the default fn_is_fake_mcount()
pointed by is_fake_mcount.
This fn_is_fake_mcount() checks if the _mcount symbol is fake, e.g. the 2nd
_mcount symbol of the long call is fake, for there are 2 _mcount symbols mapped
to one real mcount call, so, one of them is fake and must be filtered.
This fn_is_fake_mcount() is called in sift_rel_mcount() after finding the
_mcount symbols and before adding the _mcount symbol into mrelp, so, it can
prevent the fake mcount symbol going into the last __mcount_loc table.
John Reiser [Wed, 27 Oct 2010 10:59:07 +0000 (18:59 +0800)]
ftrace/MIPS: Add MIPS64 support for C version of recordmcount
MIPS64 has 'weird' Elf64_Rel.r_info[1,2], which must be used instead of
the generic Elf64_Rel.r_info, otherwise, the C version of recordmcount
will not work for "segmentation fault".
Usage of "union mips_r_info" and the functions MIPS64_r_sym() and
MIPS64_r_info() written by Maciej W. Rozycki <macro@linux-mips.org>
David Daney [Thu, 14 Oct 2010 18:32:33 +0000 (11:32 -0700)]
MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.
The TASK_SIZE macro should reflect the size of a user process virtual
address space. Previously for 64-bit kernels, this was not the case.
The immediate cause of pain was in
hugetlbfs/inode.c:hugetlb_get_unmapped_area() where 32-bit processes
trying to mmap a huge page would be served a page with an address
outside of the 32-bit address range. But there are other uses of
TASK_SIZE in the kernel as well that would like an accurate value.
The new definition is nice because it now makes TASK_SIZE and
TASK_SIZE_OF() yield the same value for any given process.
For 32-bit kernels there should be no change, although I did factor
out some code in asm/processor.h that became identical for the 32-bit and
64-bit cases.
__UA_LIMIT is now set to ~((1 << SEGBITS) - 1) for 64-bit kernels.
This should eliminate the possibility of getting a
AddressErrorException in the kernel for addresses that pass the
access_ok() test.
With the patch applied, I can still run o32, n32 and n64 processes,
and have an o32 shell fork/exec both n32 and n64 processes.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1701/
Kevin Cernekee [Sat, 16 Oct 2010 21:22:38 +0000 (14:22 -0700)]
MIPS: Allow UserLocal on MIPS_R1 processors
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
Kevin Cernekee [Thu, 21 Oct 2010 03:05:42 +0000 (20:05 -0700)]
MIPS: Honor L2 bypass bit
On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates
that the L2 cache is disabled and therefore Linux should not attempt
to use it.
[Ralf: Moved the code added by Kevin's original patch into a separate
function that can easily be replaced for platforms that need more a
different probe.]
Kevin Cernekee [Sat, 16 Oct 2010 21:22:30 +0000 (14:22 -0700)]
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
BMIPS processor cores are used in 50+ different chipsets spread across
5+ product lines. In many cases the chipsets do not share the same
peripheral register layouts, the same register blocks, the same
interrupt controllers, the same memory maps, or much of anything else.
But, across radically different SoCs that share nothing more than the
same BMIPS CPU, a few things are still mostly constant:
SMP operations
Access to performance counters
DMA cache coherency quirks
Cache and memory bus configuration
So, it makes sense to treat each BMIPS processor type as a generic
"building block," rather than tying it to a specific SoC. This makes it
easier to support a large number of BMIPS-based chipsets without
unnecessary duplication of code, and provides the infrastructure needed
to support BMIPS-proprietary features.
Deng-Cheng Zhu [Tue, 12 Oct 2010 11:37:24 +0000 (19:37 +0800)]
MIPS: Add support for hardware performance events (mipsxx)
This patch adds the mipsxx Perf-events support based on the skeleton.
Generic hardware events and cache events are now fully implemented for
the 24K/34K/74K/1004K cores. To support other cores in mipsxx (such as
R10000/SB1), the generic hardware event tables and cache event tables
need to be filled out. To support other CPUs which have different PMU
than mipsxx, such as RM9000 and LOONGSON2, the additional files
perf_event_$cpu.c need to be created.
Raw event is an important part of Perf-events. It helps the user collect
performance data for events that are not listed as the generic hardware
events and cache events but ARE supported by the CPU's PMU.
This patch also adds this feature for mipsxx 24K/34K/74K/1004K. For how to
use it, please refer to processor core software user's manual and the
comments for mipsxx_pmu_map_raw_event() for more details.
Please note that this is a "precise" implementation, which means the
kernel will check whether the requested raw events are supported by this
CPU and which hardware counters can be assigned for them.
To test the functionality of Perf-event, you may want to compile the tool
"perf" for your MIPS platform. You can refer to the following URL:
http://www.linux-mips.org/archives/linux-mips/2010-10/msg00126.html
You also need to customize the CFLAGS and LDFLAGS in tools/perf/Makefile
for your libs, includes, etc.
In case you encounter the boot failure in SMVP kernel on multi-threading
CPUs, you may take a look at:
http://www.linux-mips.org/git?p=linux-mti.git;a=commitdiff;h=5460815027d802697b879644c74f0e8365254020
Deng-Cheng Zhu [Tue, 12 Oct 2010 11:37:23 +0000 (19:37 +0800)]
MIPS: Perf-events: Add callchain support
Adds callchain support for MIPS Perf-events. For more info on this feature,
please refer to tools/perf/Documentation/perf-report.txt and
tools/perf/design.txt.
Currently userspace callchain data is not recorded, because we do not have
a safe way to do this.
Deng-Cheng Zhu [Tue, 12 Oct 2010 11:37:22 +0000 (19:37 +0800)]
MIPS: add support for hardware performance events (skeleton)
This patch provides the skeleton of the HW perf event support. To enable
this feature, we can not choose the SMTC kernel; Oprofile should be
disabled; kernel performance events be selected. Then we can enable it in
Kernel type menu.
Oprofile for MIPS platforms initializes irq at arch init time. Currently
we do not change this logic to allow PMU reservation.
If a platform has EIC, we can use the irq base and perf counter irq offset
defines for the interrupt controller in specific init_hw_perf_events().
Based on this skeleton patch, the 3 different kinds of MIPS PMU, namely,
mipsxx/loongson2/rm9000, can be supported by adding corresponding lower
level C files at the bottom. The suggested names of these files are
perf_event_mipsxx.c/perf_event_loongson2.c/perf_event_rm9000.c. So, for
example, we can do this by adding "#include perf_event_mipsxx.c" at the
bottom of perf_event.c.
In addition, PMUs with 64bit counters are also considered in this patch.
Deng-Cheng Zhu [Tue, 12 Oct 2010 11:37:21 +0000 (19:37 +0800)]
MIPS: add support for software performance events
Software events are required as part of the measurable stuff by the
Linux performance counter subsystem. Here is the list of events added by
this patch:
PERF_COUNT_SW_PAGE_FAULTS
PERF_COUNT_SW_PAGE_FAULTS_MIN
PERF_COUNT_SW_PAGE_FAULTS_MAJ
PERF_COUNT_SW_ALIGNMENT_FAULTS
PERF_COUNT_SW_EMULATION_FAULTS
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@elte.hu Cc: acme@redhat.com Cc: jamie.iles@picochip.com Acked-by: David Daney <ddaney@caviumnetworks.com> Reviewed-by: Matt Fleming <matt@console-pimps.org>
Patchwork: https://patchwork.linux-mips.org/patch/1686/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Deng-Cheng Zhu [Tue, 12 Oct 2010 11:37:20 +0000 (19:37 +0800)]
MIPS: define local_xchg from xchg_local to atomic_long_xchg
Perf-events is now using local_t helper functions internally. There is a
use of local_xchg(). On MIPS, this is defined to xchg_local() which is
missing in asm/system.h. This patch re-defines local_xchg() in asm/local.h
to atomic_long_xchg(). Then Perf-events can pass the build.
Florian Fainelli [Sun, 29 Aug 2010 15:08:44 +0000 (17:08 +0200)]
MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant
Add support for Titan TNETV1050,1055,1056,1060 variants. This SoC is almost
completely identical to AR7 except on a few points:
- a second bank of gpios is available
- vlynq0 on titan is vlynq1 on ar7
- different PHY addresses for cpmac0
This SoC can be found on commercial products like the Linksys WRTP54G
Original patch by Xin with improvments by Florian.
David Daney [Fri, 8 Oct 2010 21:47:52 +0000 (14:47 -0700)]
USB: Add EHCI and OHCH glue for OCTEON II SOCs.
The OCTEON II SOC has USB EHCI and OHCI controllers connected directly
to the internal I/O bus. This patch adds the necessary 'glue' logic
to allow ehci-hcd and ohci-hcd drivers to work on OCTEON II.
The OCTEON normally runs big-endian, and the ehci/ohci internal
registers have host endianness, so we need to select
USB_EHCI_BIG_ENDIAN_MMIO.
The ehci and ohci blocks share a common clocking and PHY
infrastructure. Initialization of the host controller and PHY clocks
is common between the two and is factored out into the
octeon2-common.c file.
Setting of USB_ARCH_HAS_OHCI and USB_ARCH_HAS_EHCI is done in
arch/mips/Kconfig in a following patch.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-usb@vger.kernel.org
To: dbrownell@users.sourceforge.net
Patchwork: http://patchwork.linux-mips.org/patch/1675/ Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney [Thu, 7 Oct 2010 23:03:53 +0000 (16:03 -0700)]
MIPS: Octeon: Apply CN63XXP1 errata workarounds.
The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.
All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.
The write buffer threshold is reduced to 4.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney [Thu, 7 Oct 2010 23:03:52 +0000 (16:03 -0700)]
WATCHDOG: octeon-wdt: Use I/O clock rate for timing calculations.
The creation of the I/O clock domain requires some adjustments. Since
the watchdog counters are clocked by the I/O clock, use its rate for
timing calculations.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-watchdog@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1659/ Acked-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney [Thu, 7 Oct 2010 23:03:51 +0000 (16:03 -0700)]
ATA: pata_octeon_cf: Use I/O clock rate for timing calculations.
The creation of the I/O clock domain requires some adjustments. Since the
CF bus timing logic is clocked by the I/O clock, use its rate for delay
calculations.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Jeff Garzik <jgarzik@pobox.com> Cc: linux-ide@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1660/ Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney [Thu, 7 Oct 2010 23:03:49 +0000 (16:03 -0700)]
MIPS: Octeon: Add octeon_get_io_clock_rate() for cn63xx
Starting with cn63xx Octeon I/O blocks are clocked at a different rate
than the CPU. Add a new function octeon_get_io_clock_rate() that
yields the I/O clock rate.
Also rearrange octeon_get_clock_rate() to get the value from the saved
sysinfo structure.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1671/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney [Fri, 1 Oct 2010 20:27:34 +0000 (13:27 -0700)]
MIPS: Octeon: Rewrite DMA mapping functions.
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon
PCI is setup, even some configurations with less than 4GB of RAM will have
portions that are not accessible from 32-bit devices.
Enable the swiotlb code to handle the cases where a device cannot directly
do DMA. This is a complete rewrite of the Octeon DMA mapping code.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1639/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>