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8 years agodrm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule.
Rex Zhu [Wed, 21 Oct 2015 02:30:02 +0000 (10:30 +0800)]
drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule.

Redefine interrupt callback function in accordance with cgs.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control
Rex Zhu [Fri, 16 Oct 2015 03:46:51 +0000 (11:46 +0800)]
drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control

Add the interface for fan and thermal control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: Add CG and PG support for tonga
Rex Zhu [Thu, 15 Oct 2015 13:12:58 +0000 (21:12 +0800)]
drm/amd/powerplay: Add CG and PG support for tonga

Implement clock and power gating support for tonga.  On Tonga
this is handles by the SMU rather than direct register settings
in the driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add new function point in hwmgr_func for CG/PG.
Rex Zhu [Wed, 30 Sep 2015 05:28:49 +0000 (13:28 +0800)]
drm/amd/powerplay: add new function point in hwmgr_func for CG/PG.

Add callbacks interface for clock and powergating.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: add some definition for other ip block to update cg pg.
Rex Zhu [Fri, 9 Oct 2015 10:43:28 +0000 (18:43 +0800)]
drm/amdgpu/powerplay: add some definition for other ip block to update cg pg.

Interface for clock and power gating handling.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable powerplay module by default for fiji.
Rex Zhu [Tue, 20 Oct 2015 03:05:45 +0000 (11:05 +0800)]
drm/amdgpu: enable powerplay module by default for fiji.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable powerplay module by default for tonga.
Rex Zhu [Sat, 17 Oct 2015 09:57:58 +0000 (17:57 +0800)]
drm/amdgpu: enable powerplay module by default for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: program display gap for tonga.
Rex Zhu [Fri, 16 Oct 2015 07:02:04 +0000 (15:02 +0800)]
drm/amdgpu/powerplay: program display gap for tonga.

Implement displaygap programming for tonga.  This is
required for properly mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: implement pem_task for display_configuration_change
Rex Zhu [Fri, 16 Oct 2015 06:59:17 +0000 (14:59 +0800)]
drm/amdgpu/powerplay: implement pem_task for display_configuration_change

Add support for display configuration changes to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/poweprlay: export program display gap function to eventmgr
Rex Zhu [Fri, 16 Oct 2015 06:55:03 +0000 (14:55 +0800)]
drm/amdgpu/poweprlay: export program display gap function to eventmgr

This allows the eventmgr to properly update the displaygap on
certain power events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap
Rex Zhu [Fri, 16 Oct 2015 06:51:09 +0000 (14:51 +0800)]
drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap

Displaygap support is required for proper mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.
Eric Huang [Tue, 29 Sep 2015 18:58:53 +0000 (14:58 -0400)]
drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.

Switch over to handling in the powerplay module.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amdgpu: add amdgpu.powerplay module option
Jammy Zhou [Tue, 21 Jul 2015 06:01:50 +0000 (14:01 +0800)]
drm/amdgpu: add amdgpu.powerplay module option

This option can be used to enable the new powerplay implementation,
and it is disabled by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add Fiji DPM support.
Eric Huang [Wed, 26 Aug 2015 20:52:28 +0000 (16:52 -0400)]
drm/amd/powerplay: add Fiji DPM support.

This enabled DPM support for Fiji.  DPM is dynamic
clock and voltage scaling.

v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init
v3: (agd) fold in endian fix, additional function addition

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amd/powerplay: add Fiji SMU support.
Eric Huang [Wed, 26 Aug 2015 20:50:59 +0000 (16:50 -0400)]
drm/amd/powerplay: add Fiji SMU support.

Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amd/powerplay: update atomctrl for fiji
Eric Huang [Mon, 9 Nov 2015 22:35:45 +0000 (17:35 -0500)]
drm/amd/powerplay: update atomctrl for fiji

Add some new functions to support Fiji.  Split out
from the previous patch.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amd/powerplay: add/update headers for Fiji SMU and DPM
Eric Huang [Mon, 9 Nov 2015 22:34:31 +0000 (17:34 -0500)]
drm/amd/powerplay: add/update headers for Fiji SMU and DPM

New headers for Fiji.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amd/powerplay: add Tonga dpm support (v3)
yanyang1 [Tue, 18 Aug 2015 07:28:32 +0000 (15:28 +0800)]
drm/amd/powerplay: add Tonga dpm support (v3)

This implements DPM for tonga.  DPM handles dynamic
clock and voltage scaling.

v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
8 years agodrm/amd/powerplay: Add Tonga SMU support
Jammy Zhou [Wed, 22 Jul 2015 03:29:58 +0000 (11:29 +0800)]
drm/amd/powerplay: Add Tonga SMU support

The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.).  This implements it for Tonga.

v3: delete peci sub-module
v2: use cgs interface directly

Signed-off-by: Young Yang <Young.Yang@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add header file for tonga smu and dpm
yanyang1 [Mon, 17 Aug 2015 06:15:20 +0000 (14:15 +0800)]
drm/amd/powerplay: add header file for tonga smu and dpm

These headers provide the SMU interface used by the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
8 years agodrm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.
yanyang1 [Wed, 19 Aug 2015 04:22:34 +0000 (12:22 +0800)]
drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.

Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
8 years agodrm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h
yanyang1 [Mon, 17 Aug 2015 06:15:20 +0000 (14:15 +0800)]
drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h

Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
8 years agodrm/amd/powerplay: implement functions of amd_powerplay_func
Rex Zhu [Fri, 28 Aug 2015 04:56:43 +0000 (12:56 +0800)]
drm/amd/powerplay: implement functions of amd_powerplay_func

This is the common interface for interacting with the powerplay
module.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add event manager sub-component
Rex Zhu [Wed, 23 Sep 2015 07:14:54 +0000 (15:14 +0800)]
drm/amd/powerplay: add event manager sub-component

The event manager handles power related driver events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add CG and PG support for carrizo
Rex Zhu [Wed, 23 Sep 2015 07:14:38 +0000 (15:14 +0800)]
drm/amd/powerplay: add CG and PG support for carrizo

This adds clock and powergating support for CZ.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add Carrizo dpm support
Jammy Zhou [Wed, 22 Jul 2015 02:41:30 +0000 (10:41 +0800)]
drm/amd/powerplay: add Carrizo dpm support

This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.

v3: delete peci sub-module
v2: use cgs interface directly
    correct define SMU_EnabledFeatureScoreboard_SclkDpmOn

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add Carrizo smu support
Jammy Zhou [Wed, 22 Jul 2015 01:54:16 +0000 (09:54 +0800)]
drm/amd/powerplay: add Carrizo smu support

This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.

v3: delete peci sub-module.
v2: use cgs interface directly
    add load_mec_firmware function

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add hardware manager sub-component
Jammy Zhou [Tue, 21 Jul 2015 13:18:15 +0000 (21:18 +0800)]
drm/amd/powerplay: add hardware manager sub-component

The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.

v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly in hwmgr sub-module

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add SMU manager sub-component
Jammy Zhou [Tue, 21 Jul 2015 09:43:02 +0000 (17:43 +0800)]
drm/amd/powerplay: add SMU manager sub-component

The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts.  The adds the core powerplay infrastructure to handle that.

v3: direct use printk in powerplay module.
v2: direct use cgs_read/write_register functions in smu-modules

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Rex Zhu [Tue, 10 Nov 2015 23:25:24 +0000 (18:25 -0500)]
drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block

Update amdgpu to deal with the new powerplay module properly.

v2: squash in fixes
v3: squash in Rex's power state reporting fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: disable legacy path of firmware check if powerplay is enabled
Rex Zhu [Sat, 7 Nov 2015 01:33:24 +0000 (20:33 -0500)]
drm/amdgpu: disable legacy path of firmware check if powerplay is enabled

Powerplay will use a different interface once it's integrated.  These
legacy pathes will be removed once powerplay is enabled by default.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add basic powerplay framework
Alex Deucher [Wed, 2 Dec 2015 22:46:21 +0000 (17:46 -0500)]
drm/amd/powerplay: add basic powerplay framework

amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.

CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.

v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add new cgs interface to get display info (v2)
Rex Zhu [Thu, 17 Sep 2015 08:34:14 +0000 (16:34 +0800)]
drm/amdgpu: add new cgs interface to get display info (v2)

Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement cgs interface to query system info
Rex Zhu [Wed, 23 Sep 2015 12:11:54 +0000 (20:11 +0800)]
drm/amdgpu: implement cgs interface to query system info

Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
8 years agodrm/amdgpu: implement new cgs interface for acpi function
Rex Zhu [Tue, 15 Sep 2015 06:44:44 +0000 (14:44 +0800)]
drm/amdgpu: implement new cgs interface for acpi function

Add a new driver internal interface for accessing ACPI
methods.  These will be used by various new components
including powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h
Rex Zhu [Fri, 18 Sep 2015 08:35:17 +0000 (16:35 +0800)]
drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h

This will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h
Rex Zhu [Mon, 21 Sep 2015 06:29:10 +0000 (14:29 +0800)]
drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h

These will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
Rex Zhu [Tue, 25 Aug 2015 07:57:43 +0000 (15:57 +0800)]
drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module

rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: clean up fujitsu quirks
Alex Deucher [Thu, 17 Dec 2015 17:52:17 +0000 (12:52 -0500)]
drm/radeon: clean up fujitsu quirks

Combine the two quirks.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=109481

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map
Felix Kuehling [Mon, 23 Nov 2015 22:43:48 +0000 (17:43 -0500)]
drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map

eaddr is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/radeon: Fix off-by-one errors in radeon_vm_bo_set_addr
Felix Kuehling [Mon, 23 Nov 2015 22:39:11 +0000 (17:39 -0500)]
drm/radeon: Fix off-by-one errors in radeon_vm_bo_set_addr

eoffset is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range. Also fixed related errors when checking the VA limit and in
radeon_vm_fence_pts.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/radeon: fix dp link rate selection (v2)
Alex Deucher [Thu, 17 Dec 2015 15:23:34 +0000 (10:23 -0500)]
drm/radeon: fix dp link rate selection (v2)

Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix dp link rate selection (v2)
Alex Deucher [Thu, 17 Dec 2015 14:57:49 +0000 (09:57 -0500)]
drm/amdgpu: fix dp link rate selection (v2)

Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: only increment sync_seq when a fence is really emitted
Nicolai Hähnle [Sat, 12 Dec 2015 16:42:25 +0000 (11:42 -0500)]
drm/radeon: only increment sync_seq when a fence is really emitted

In the rare situation where the kmalloc fails we're probably screwed anyway,
but let's try to be more robust about it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: fix typo in cik_ring_ib_execute documentation (v2)
Nicolai Hähnle [Sat, 12 Dec 2015 16:42:24 +0000 (11:42 -0500)]
drm/radeon: fix typo in cik_ring_ib_execute documentation (v2)

v2: agd: clarify commit message, fix "an" as spotted by Michel.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: fix documentation of ttm_bo_reserve
Nicolai Hähnle [Sat, 12 Dec 2015 16:42:23 +0000 (11:42 -0500)]
drm/ttm: fix documentation of ttm_bo_reserve

Previously, the comment was inconsistent. EDEADLK is what the ww_mutex
mechanism really returns.

Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Update radeon_get_vblank_counter_kms()
Thierry Reding [Wed, 16 Dec 2015 14:31:47 +0000 (15:31 +0100)]
drm/radeon: Update radeon_get_vblank_counter_kms()

Commit 88e72717c2de ("drm/irq: Use unsigned int pipe in public API")
updated the prototype of this function but not the implementation. This
wasn't noticed even through compile tests because the prototype is part
of the source file that uses it and hence the compiler won't know the
prototype when it compiles the implementation.

The right thing would've been to move the prototype to a header that's
included in radeon_kms.c so that the implementation signature could be
checked against it, but the closest thing would've been radeon_drv.h
and including that results in a lot of build errors, so we'll leave it
as is for now.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2)
Mario Kleiner [Wed, 25 Nov 2015 19:14:31 +0000 (20:14 +0100)]
drm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2)

commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
more fragile to drivers which don't update hw vblank counters and
vblank timestamps in sync with firing of the vblank irq and
essentially at leading edge of vblank.

This exposed a problem with radeon-kms/amdgpu-kms which do not
satisfy above requirements:

The vblank irq fires a few scanlines before start of vblank, but
programmed pageflips complete at start of vblank and
vblank timestamps update at start of vblank, whereas the
hw vblank counter increments only later, at start of vsync.

This leads to problems like off by one errors for vblank counter
updates, vblank counters apparently going backwards or vblank
timestamps apparently having time going backwards. The net result
is stuttering of graphics in games, or little hangs, as well as
total failure of timing sensitive applications.

See bug #93147 for an example of the regression on Linux 4.4-rc:

https://bugs.freedesktop.org/show_bug.cgi?id=93147

This patch tries to align all above events better from the
viewpoint of the drm core / of external callers to fix the problem:

1. The apparent start of vblank is shifted a few scanlines earlier,
so the vblank irq now always happens after start of this extended
vblank interval and thereby drm_update_vblank_count() always samples
the updated vblank count and timestamp of the new vblank interval.

To achieve this, the reporting of scanout positions by
radeon_get_crtc_scanoutpos() now operates as if the vblank starts
radeon_crtc->lb_vblank_lead_lines before the real start of the hw
vblank interval. This means that the vblank timestamps which are based
on these scanout positions will now update at this earlier start of
vblank.

2. The driver->get_vblank_counter() function will bump the returned
vblank count as read from the hw by +1 if the query happens after
the shifted earlier start of the vblank, but before the real hw increment
at start of vsync, so the counter appears to increment at start of vblank
in sync with the timestamp update.

3. Calls from vblank irq-context and regular non-irq calls are now
treated identical, always simulating the shifted vblank start, to
avoid inconsistent results for queries happening from vblank irq vs.
happening from drm_vblank_enable() or vblank_disable_fn().

4. The radeon_flip_work_func will delay mmio programming a pageflip until
the start of the real vblank iff it happens to execute inside the shifted
earlier start of the vblank, so pageflips now also appear to execute at
start of the shifted vblank, in sync with vblank counter and timestamp
updates. This to avoid some races between updates of vblank count and
timestamps that are used for swap scheduling and pageflip execution which
could cause pageflips to execute before the scheduled target vblank.

The lb_vblank_lead_lines "fudge" value is calculated as the size of
the display controllers line buffer in scanlines for the given video
mode: Vblank irq's are triggered by the line buffer logic when the line
buffer refill for a video frame ends, ie. when the line buffer source read
position enters the hw vblank. This means that a vblank irq could fire at
most as many scanlines before the current reported scanout position of the
crtc timing generator as the number of scanlines the line buffer can
maximally hold for a given video mode.

This patch has been successfully tested on a RV730 card with DCE-3 display
engine and on a evergreen card with DCE-4 display engine, in single-display
and dual-display configuration, with different video modes.

A similar patch is needed for amdgpu-kms to fix the same problem.

Limitations:

- Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
  i just guessed to be high enough to work ok, lacking info on the true
  sizes atm.

Fixes: fdo#93147
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
(v1) Tested-by: Dave Witbrodt <dawitbro@sbcglobal.net>

(v2) Refine radeon_flip_work_func() for better efficiency:

     In radeon_flip_work_func, replace the busy waiting udelay(5)
     with event lock held by a more performance and energy efficient
     usleep_range() until at least predicted true start of hw vblank,
     with some slack for scheduler happiness. Release the event lock
     during waits to not delay other outputs in doing their stuff, as
     the waiting can last up to 200 usecs in some cases.

     Retested on DCE-3 and DCE-4 to verify it still works nicely.

(v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Fix "slow" audio over DP on DCE8+
Slava Grigorev [Thu, 17 Dec 2015 16:09:58 +0000 (11:09 -0500)]
drm/radeon: Fix "slow" audio over DP on DCE8+

DP audio is derived from the dfs clock.

Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/amdgpu: keep the PTs validation list in the VM v2
Christian König [Fri, 11 Dec 2015 20:01:23 +0000 (21:01 +0100)]
drm/amdgpu: keep the PTs validation list in the VM v2

This avoids allocating it on the fly.

v2: fix grammar in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
8 years agodrm/amdgpu: split VM PD and PT handling during CS
Christian König [Fri, 11 Dec 2015 14:16:32 +0000 (15:16 +0100)]
drm/amdgpu: split VM PD and PT handling during CS

This way we avoid the extra allocation for the page directory entry.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
8 years agodrm/amdgpu: put VM page tables directly into duplicates list
Christian König [Fri, 11 Dec 2015 13:39:05 +0000 (14:39 +0100)]
drm/amdgpu: put VM page tables directly into duplicates list

They share the reservation object with the page directory anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
8 years agodrm/amdgpu: restrict the sched jobs number to power of two
Chunming Zhou [Thu, 10 Dec 2015 09:34:33 +0000 (17:34 +0800)]
drm/amdgpu: restrict the sched jobs number to power of two

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
8 years agodrm/amdgpu: limit visible vram if it's smaller than the BAR
Alex Deucher [Wed, 9 Dec 2015 20:36:40 +0000 (15:36 -0500)]
drm/amdgpu: limit visible vram if it's smaller than the BAR

In some cases the amount of vram may be less than the BAR size,
if so, limit visible vram to the amount of actual vram, not the
BAR size.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: change default sched jobs to 32
Chunming Zhou [Thu, 10 Dec 2015 07:46:50 +0000 (15:46 +0800)]
drm/amdgpu: change default sched jobs to 32

Change the default scheduler queue size from 16 to 32.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobs
Chunming Zhou [Thu, 10 Dec 2015 07:45:11 +0000 (15:45 +0800)]
drm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobs

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: handle error case for ctx
Chunming Zhou [Thu, 10 Dec 2015 07:50:02 +0000 (15:50 +0800)]
drm/amdgpu: handle error case for ctx

Properly handle ctx init failure.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add entity only when first job come
Chunming Zhou [Fri, 11 Dec 2015 10:22:52 +0000 (18:22 +0800)]
drm/amdgpu: add entity only when first job come

umd somtimes will create a context for every ring,
that means some entities wouldn't be used at all.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add more debugging output for driver failures
Alex Deucher [Mon, 7 Dec 2015 22:02:53 +0000 (17:02 -0500)]
drm/amdgpu: add more debugging output for driver failures

Add more fine grained debugging output for init/fini/suspend/
resume failures.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update rev id register for VI
Flora Cui [Fri, 20 Nov 2015 03:40:53 +0000 (11:40 +0800)]
drm/amdgpu: update rev id register for VI

Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP only
Flora Cui [Tue, 8 Dec 2015 03:23:29 +0000 (11:23 +0800)]
drm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP only

Use default value as a base.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
8 years agodrm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3
Flora Cui [Wed, 2 Dec 2015 01:56:06 +0000 (09:56 +0800)]
drm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3

Otherwise FW cannot see the RLC ACK for the memory clean request
It's for Stoney.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
8 years agodrm/amdgpu: add spin lock to protect freed list in vm (v2)
jimqu [Fri, 4 Dec 2015 09:17:00 +0000 (17:17 +0800)]
drm/amdgpu: add spin lock to protect freed list in vm (v2)

there is a protection fault about freed list when OCL test.
add a spin lock to protect it.

v2: drop changes in vm_fini

Signed-off-by: JimQu <jim.qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
8 years agoamdgpu/gfxv8: Remove magic numbers from function gfx_v8_0_tiling_mode_table_init()
Tom St Denis [Thu, 3 Dec 2015 17:23:28 +0000 (12:23 -0500)]
amdgpu/gfxv8: Remove magic numbers from function gfx_v8_0_tiling_mode_table_init()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix race condition in amd_sched_entity_push_job
Nicolai Hähnle [Wed, 2 Dec 2015 16:35:12 +0000 (17:35 +0100)]
drm/amdgpu: fix race condition in amd_sched_entity_push_job

As soon as we leave the spinlock after the job has been added to the job
queue, we can no longer rely on the job's data to be available.

I have seen a null-pointer dereference due to sched == NULL in
amd_sched_wakeup via amd_sched_entity_push_job and
amd_sched_ib_submit_kernel_helper. Since the latter initializes
sched_job->sched with the address of the ring scheduler, which is
guaranteed to be non-NULL, this race appears to be a likely culprit.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079
Reviewed-by: Christian König <christian.koenig@amd.com>
8 years agodrm/amdgpu: add err check for pin userptr
Chunming Zhou [Thu, 26 Nov 2015 08:33:58 +0000 (16:33 +0800)]
drm/amdgpu: add err check for pin userptr

Missing error check if the operation failed.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
8 years agoamdgpu/gfxv8: Simplification in gfx_v8_0_enable_gui_idle_interrupt()
Tom St Denis [Tue, 1 Dec 2015 15:42:28 +0000 (10:42 -0500)]
amdgpu/gfxv8: Simplification in gfx_v8_0_enable_gui_idle_interrupt()

Simplified the function by folding the two paths into one.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoamdgpu/gfxv8: Simplification of gfx_v8_0_create_bitmask()
Tom St Denis [Tue, 1 Dec 2015 16:48:32 +0000 (11:48 -0500)]
amdgpu/gfxv8: Simplification of gfx_v8_0_create_bitmask()

Simplification of the function gfx_v8_0_create_bitmask().

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoamdgpu/gfxv8: Cleanup of gfx_v8_0_tiling_mode_table_init() (v2)
Tom St Denis [Tue, 1 Dec 2015 16:47:21 +0000 (11:47 -0500)]
amdgpu/gfxv8: Cleanup of gfx_v8_0_tiling_mode_table_init() (v2)

Simplification and LOC reduction of function gfx_v8_0_tiling_mode_table_init()

v2: remove spurious break
bug: https://bugs.freedesktop.org/show_bug.cgi?id=93236

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoamdgpu/gfxv8: Add missing break to switch statement from states init code
Tom St Denis [Mon, 30 Nov 2015 19:13:11 +0000 (14:13 -0500)]
amdgpu/gfxv8: Add missing break to switch statement from states init code

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
8 years agodrm/amd: abstract kernel rq and normal rq to priority of run queue
Chunming Zhou [Thu, 5 Nov 2015 07:23:09 +0000 (15:23 +0800)]
drm/amd: abstract kernel rq and normal rq to priority of run queue

Allows us to set priorities in the scheduler.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
8 years agodrm/amdgpu: add EDC support for CZ (v3)
Alex Deucher [Tue, 24 Nov 2015 22:43:42 +0000 (17:43 -0500)]
drm/amdgpu: add EDC support for CZ (v3)

This adds EDC support for CZ.
EDC = Error Correction and Detection
This code properly initializes the EDC hardware and
resets the error counts.  This is done in late_init
since it requires the IB pool which is not initialized
during hw_init.

v2: fix the IB size as noted by Felix, fix shader pgm
register programming
v3: use the IB for the shaders as suggested by Christian

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd: add new gfx8 register definitions for EDC
Alex Deucher [Tue, 24 Nov 2015 22:42:02 +0000 (17:42 -0500)]
drm/amd: add new gfx8 register definitions for EDC

EDC is a RAS feature for on chip memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Use unlocked gem unreferencing
Daniel Vetter [Mon, 23 Nov 2015 09:32:38 +0000 (10:32 +0100)]
drm/radeon: Use unlocked gem unreferencing

For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with

commit ef4c6270bf2867e2f8032e9614d1a8cfc6c71663
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 15 09:36:25 2015 +0200

    drm/gem: Check locking in drm_gem_object_unreference

Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Use unlocked gem unreferencing
Daniel Vetter [Mon, 23 Nov 2015 09:32:37 +0000 (10:32 +0100)]
drm/amdgpu: Use unlocked gem unreferencing

For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with

commit ef4c6270bf2867e2f8032e9614d1a8cfc6c71663
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 15 09:36:25 2015 +0200

    drm/gem: Check locking in drm_gem_object_unreference

Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Use new read bios from rom callback
monk.liu [Thu, 29 Oct 2015 07:33:06 +0000 (15:33 +0800)]
drm/amdgpu: Use new read bios from rom callback

Read the vbios directly from the rom.  In some cases,
e.g., virtualization, the rom is not available via
the BAR or other means.  Access it directly.

This is an updated version of Monks original patch which
uses family specific callbacks and unifies some of the
validation checking.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add read_bios_from_rom callback for VI parts
Alex Deucher [Tue, 24 Nov 2015 15:37:54 +0000 (10:37 -0500)]
drm/amdgpu: add read_bios_from_rom callback for VI parts

Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add read_bios_from_rom callback for CI parts
Alex Deucher [Tue, 24 Nov 2015 15:34:45 +0000 (10:34 -0500)]
drm/amdgpu: add read_bios_from_rom callback for CI parts

Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add a callback for reading the bios from the rom directly
Alex Deucher [Tue, 24 Nov 2015 15:14:28 +0000 (10:14 -0500)]
drm/amdgpu: add a callback for reading the bios from the rom directly

This is necessary when the vbios image is not directly accessible via
the rom BAR or legacy vga location.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: constify radeon_asic_ring structures
Julia Lawall [Sun, 29 Nov 2015 16:12:41 +0000 (17:12 +0100)]
drm/radeon: constify radeon_asic_ring structures

The radeon_asic_ring structures are never modified, so declare them as
const.

Done with the help of Coccinelle.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use $(src) in Makefile (v2)
Jammy Zhou [Tue, 24 Nov 2015 08:55:20 +0000 (16:55 +0800)]
drm/amdgpu: use $(src) in Makefile (v2)

This can solve the path problem when compile amdgpu with DKMS.

v2: agd: rebase on current drm-next

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: call hpd_irq_event on resume
Alex Deucher [Tue, 24 Nov 2015 19:32:44 +0000 (14:32 -0500)]
drm/radeon: call hpd_irq_event on resume

Need to call this on resume if displays changes during
suspend in order to properly be notified of changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/amdgpu: call hpd_irq_event on resume
Alex Deucher [Tue, 24 Nov 2015 19:30:56 +0000 (14:30 -0500)]
drm/amdgpu: call hpd_irq_event on resume

Need to call this on resume if displays changes during
suspend in order to properly be notified of changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/radeon: remove UMS support
Alex Deucher [Mon, 23 Nov 2015 18:13:45 +0000 (13:13 -0500)]
drm/radeon: remove UMS support

It's been deprecated behind a kconfig option for almost
two years and hasn't really been supported for years before
that.  DDX support was dropped more than three years ago.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
9 years agoMerge tag 'drm-intel-next-2015-11-20-merged' of git://anongit.freedesktop.org/drm...
Dave Airlie [Mon, 30 Nov 2015 22:01:53 +0000 (08:01 +1000)]
Merge tag 'drm-intel-next-2015-11-20-merged' of git://anongit.freedesktop.org/drm-intel into drm-next

drm-intel-next-2015-11-20-rebased:
4 weeks because of my vacation, so a bit more:
- final bits of the typesafe register mmio functions (Ville)
- power domain fix for hdmi detection (Imre)
- tons of fixes and improvements to the psr code (Rodrigo)
- refactoring of the dp detection code (Ander)
- complete rework of the dmc loader and dc5/dc6 handling (Imre, Patrik and
  others)
- dp compliance improvements from Shubhangi Shrivastava
- stop_machine hack from Chris to fix corruptions when updating GTT ptes on bsw
- lots of fifo underrun fixes from Ville
- big pile of fbc fixes and improvements from Paulo
- fix fbdev failures paths (Tvrtko and Lukas Wunner)
- dp link training refactoring (Ander)
- interruptible prepare_plane for atomic (Maarten)
- basic kabylake support (Deepak&Rodrigo)
- don't leak ringspace on resets (Chris)
drm-intel-next-2015-10-23:
- 2nd attempt at atomic watermarks from Matt, but just prep for now
- fixes all over

* tag 'drm-intel-next-2015-11-20-merged' of git://anongit.freedesktop.org/drm-intel: (209 commits)
  drm/i915: Update DRIVER_DATE to 20151120
  drm/i915: take a power domain reference while checking the HDMI live status
  drm/i915: take a power domain ref only when needed during HDMI detect
  drm/i915: Tear down fbdev if initialization fails
  async: export current_is_async()
  Revert "drm/i915: Initialize HWS page address after GPU reset"
  drm/i915: Fix oops caused by fbdev initialization failure
  drm/i915: Fix i915_ggtt_view_equal to handle rotation correctly
  drm/i915: Stuff rotation params into view union
  drm/i915: Drop return value from intel_fill_fb_ggtt_view
  drm/i915 : Fix to remove unnecsessary checks in postclose function.
  drm/i915: add MISSING_CASE to a few port/aux power domain helpers
  drm/i915/ddi: fix intel_display_port_aux_power_domain() after HDMI detect
  drm/i915: Remove platform specific *_dp_detect() functions
  drm/i915: Don't do edp panel detection in g4x_dp_detect()
  drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT.
  drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT.
  drm/i915: Reduce PSR re-activation time for VLV/CHV.
  drm/i915: Delay first PSR activation.
  drm/i915: Type safe register read/write
  ...

9 years agoMerge tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Mon, 30 Nov 2015 22:01:18 +0000 (08:01 +1000)]
Merge tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel into drm-next

Here's the first drm-misc pull, with really mostly misc stuff all over.
Somewhat invasive is only Ville's change to mark the arg struct for
fb_create const - that might conflict with a new driver pull. So better to
get in fast.

* tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel:
  drm/mm: use list_next_entry
  drm/i915: fix potential dangling else problems in for_each_ macros
  drm: fix potential dangling else problems in for_each_ macros
  drm/sysfs: Send out uevent when connector->force changes
  drm/atomic: Small documentation fix.
  drm/mm: rewrite drm_mm_for_each_hole
  drm/sysfs: Grab lock for edid/modes_show
  drm: Print the src/dst/clip rectangles in error in drm_plane_helper
  drm: Add "prefix" parameter to drm_rect_debug_print()
  drm: Keep coordinates in the typical x, y, w, h order instead of x, y, h, w
  drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
  drm: modes: replace simple_strtoul by kstrtouint
  drm: Describe the Rotation property bits.
  drm: Remove unused fbdev_list members
  GPU-DRM: Delete unnecessary checks before drm_property_unreference_blob()
  drm/dp: add eDP DPCD backlight control bit definitions
  drm/tegra: Remove local fbdev emulation Kconfig option
  drm/imx: Remove local fbdev emulation Kconfig option
  drm/gem: Update/Polish docs
  drm: Update GEM refcounting docs

9 years agoLinux 4.4-rc3
Linus Torvalds [Mon, 30 Nov 2015 02:58:26 +0000 (18:58 -0800)]
Linux 4.4-rc3

9 years agoMerge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Linus Torvalds [Mon, 30 Nov 2015 01:38:08 +0000 (17:38 -0800)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull nouveau and radeon fixes from Dave Airlie:
 "Just some nouveau and radeon/amdgpu fixes.

  The nouveau fixes look large as the firmware context files are
  regenerated, but the actual change is quite small"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon: make some dpm errors debug only
  drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set
  drm/nouveau/nvif: allow userspace access to its own client object
  drm/nouveau/gr/gf100-: fix oops when calling zbc methods
  drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
  drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC
  drm/nouveau/gr/gf100-: split out per-gpc address calculation macro
  drm/nouveau/bios: return actual size of the buffer retrieved via _ROM
  drm/nouveau/instmem: protect instobj list with a spinlock
  drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop
  drm/nouveau/pci: enable c800 magic for Clevo P157SM
  drm/radeon: make rv770_set_sw_state failures non-fatal
  drm/amdgpu: move dependency handling out of atomic section v2
  drm/amdgpu: optimize scheduler fence handling
  drm/amdgpu: remove vm->mutex
  drm/amdgpu: add mutex for ba_va->valids/invalids
  drm/amdgpu: adapt vce session create interface changes
  drm/amdgpu: vce use multiple cache surface starting from stoney
  drm/amdgpu: reset vce trap interrupt flag

9 years agoMerge tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Linus Torvalds [Mon, 30 Nov 2015 01:30:41 +0000 (17:30 -0800)]
Merge tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC fixes from Alexandre Belloni:
 "Two fixes for the ds1307 alarm and wakeup"

* tag 'rtc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  rtc: ds1307: fix alarm reading at probe time
  rtc: ds1307: fix kernel splat due to wakeup irq handling

9 years agoMerge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Linus Torvalds [Mon, 30 Nov 2015 01:24:35 +0000 (17:24 -0800)]
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS fix from Ralf Baechle:
 "Just a fix for empty loops that may be removed by non-antique GCC"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: Fix delay loops which may be removed by GCC.

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux...
Linus Torvalds [Mon, 30 Nov 2015 01:18:41 +0000 (17:18 -0800)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k

Pull m68k fixes from Geert Uytterhoeven:
 "Summary:

   - Add missing initialization of max_pfn, which is needed to make
     selftests/vm/mlock2-tests succeed,

   - Wire up new mlock2 syscall"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Wire up mlock2
  m68knommu: Add missing initialization of max_pfn and {min,max}_low_pfn
  m68k/mm: sun3 - Add missing initialization of max_pfn and {min,max}_low_pfn
  m68k/mm: m54xx - Add missing initialization of max_pfn
  m68k/mm: motorola - Add missing initialization of max_pfn

9 years agoMerge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Linus Torvalds [Mon, 30 Nov 2015 01:13:07 +0000 (17:13 -0800)]
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "Just two changes this time around:

   - wire up the new mlock2 syscall added during the last merge window

   - fix a build problem with certain configurations provoked by making
     CONFIG_OF user selectable"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8454/1: OF implies OF_FLATTREE
  ARM: wire up mlock2 syscall

9 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending
Linus Torvalds [Sun, 29 Nov 2015 17:03:57 +0000 (09:03 -0800)]
Merge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending

Pull SCSI target fixes from Nicholas Bellinger:
 - fix tcm-user backend driver expired cmd time processing (agrover)
 - eliminate kref_put_spinlock_irqsave() for I/O completion (bart)
 - fix iscsi login kthread failure case hung task regression (nab)
 - fix COMPARE_AND_WRITE completion use-after-free race (nab)
 - fix COMPARE_AND_WRITE with SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC non zero
   SGL offset data corruption.  (Jan + Doug)
 - fix >= v4.4-rc1 regression for tcm_qla2xxx enable configfs attribute
   (Himanshu + HCH)

* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
  target/stat: print full t10_wwn.model buffer
  target: fix COMPARE_AND_WRITE non zero SGL offset data corruption
  qla2xxx: Fix regression introduced by target configFS changes
  kref: Remove kref_put_spinlock_irqsave()
  target: Invoke release_cmd() callback without holding a spinlock
  target: Fix race for SCF_COMPARE_AND_WRITE_POST checking
  iscsi-target: Fix rx_login_comp hang after login failure
  iscsi-target: return -ENOMEM instead of -1 in case of failed kmalloc()
  target/user: Do not set unused fields in tcmu_ops
  target/user: Fix time calc in expired cmd processing

9 years agoMerge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Linus Torvalds [Sun, 29 Nov 2015 16:58:48 +0000 (08:58 -0800)]
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux

Pull thermal management fixes from Zhang Rui:
 "Specifics:

 - several fixes and cleanups on Rockchip thermal drivers.

 - add the missing support of RK3368 SoCs in Rockchip driver.

 - small fixes on of-thermal, power_allocator, rcar driver, IMX, and
   QCOM drivers, and also compilation fixes, on thermal.h, when thermal
   is not selected"

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux:
  imx: thermal: use CPU temperature grade info for thresholds
  thermal: fix thermal_zone_bind_cooling_device prototype
  Revert "thermal: qcom_spmi: allow compile test"
  thermal: rcar_thermal: remove redundant operation
  thermal: of-thermal: Reduce log level for message when can't fine thermal zone
  thermal: power_allocator: Use temperature reading from tz
  thermal: rockchip: Support the RK3368 SoCs in thermal driver
  thermal: rockchip: consistently use int for temperatures
  thermal: rockchip: Add the sort mode for adc value increment or decrement
  thermal: rockchip: improve the conversion function
  thermal: rockchip: trivial: fix typo in commit
  thermal: rockchip: better to compatible the driver for different SoCs
  dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

9 years agotarget/stat: print full t10_wwn.model buffer
David Disseldorp [Fri, 27 Nov 2015 17:37:47 +0000 (18:37 +0100)]
target/stat: print full t10_wwn.model buffer

Cut 'n paste error saw it only process sizeof(t10_wwn.vendor) characters.

Signed-off-by: David Disseldorp <ddiss@suse.de>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
9 years agotarget: fix COMPARE_AND_WRITE non zero SGL offset data corruption
Jan Engelhardt [Mon, 23 Nov 2015 16:46:32 +0000 (17:46 +0100)]
target: fix COMPARE_AND_WRITE non zero SGL offset data corruption

target_core_sbc's compare_and_write functionality suffers from taking
data at the wrong memory location when writing a CAW request to disk
when a SGL offset is non-zero.

This can happen with loopback and vhost-scsi fabric drivers when
SCF_PASSTHROUGH_SG_TO_MEM_NOALLOC is used to map existing user-space
SGL memory into COMPARE_AND_WRITE READ/WRITE payload buffers.

Given the following sample LIO subtopology,

% targetcli ls /loopback/
o- loopback ................................. [1 Target]
  o- naa.6001405ebb8df14a ....... [naa.60014059143ed2b3]
    o- luns ................................... [2 LUNs]
      o- lun0 ................ [iblock/ram0 (/dev/ram0)]
      o- lun1 ................ [iblock/ram1 (/dev/ram1)]
% lsscsi -g
[3:0:1:0]    disk    LIO-ORG  IBLOCK           4.0   /dev/sdc   /dev/sg3
[3:0:1:1]    disk    LIO-ORG  IBLOCK           4.0   /dev/sdd   /dev/sg4

the following bug can be observed in Linux 4.3 and 4.4~rc1:

% perl -e 'print chr$_ for 0..255,reverse 0..255' >rand
% perl -e 'print "\0" x 512' >zero
% cat rand >/dev/sdd
% sg_compare_and_write -i rand -D zero --lba 0 /dev/sdd
% sg_compare_and_write -i zero -D rand --lba 0 /dev/sdd
Miscompare reported
% hexdump -Cn 512 /dev/sdd
00000000  0f 0e 0d 0c 0b 0a 09 08  07 06 05 04 03 02 01 00
00000010  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
*
00000200

Rather than writing all-zeroes as instructed with the -D file, it
corrupts the data in the sector by splicing some of the original
bytes in. The page of the first entry of cmd->t_data_sg includes the
CDB, and sg->offset is set to a position past the CDB. I presume that
sg->offset is also the right choice to use for subsequent sglist
members.

Signed-off-by: Jan Engelhardt <jengelh@netitwork.de>
Tested-by: Douglas Gilbert <dgilbert@interlog.com>
Cc: <stable@vger.kernel.org> # v3.12+
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
9 years agoqla2xxx: Fix regression introduced by target configFS changes
Himanshu Madhani [Tue, 24 Nov 2015 17:20:15 +0000 (12:20 -0500)]
qla2xxx: Fix regression introduced by target configFS changes

this patch fixes following regression

 # targetcli
 [Errno 13] Permission denied: '/sys/kernel/config/target/qla2xxx/21:00:00:0e:1e:08:c7:20/tpgt_1/enable'

Fixes: 2eafd72939fd ("target: use per-attribute show and store methods")
Signed-off-by: Himanshu Madhani <himanshu.madhani@qlogic.com>
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
9 years agokref: Remove kref_put_spinlock_irqsave()
Bart Van Assche [Thu, 22 Oct 2015 23:02:14 +0000 (16:02 -0700)]
kref: Remove kref_put_spinlock_irqsave()

The last user is gone. Hence remove this function.

Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Joern Engel <joern@logfs.org>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
9 years agotarget: Invoke release_cmd() callback without holding a spinlock
Bart Van Assche [Thu, 22 Oct 2015 22:57:04 +0000 (15:57 -0700)]
target: Invoke release_cmd() callback without holding a spinlock

This patch fixes the following kernel warning because it avoids that
IRQs are disabled while ft_release_cmd() is invoked (fc_seq_set_resp()
invokes spin_unlock_bh()):

WARNING: CPU: 3 PID: 117 at kernel/softirq.c:150 __local_bh_enable_ip+0xaa/0x110()
Call Trace:
 [<ffffffff814f71eb>] dump_stack+0x4f/0x7b
 [<ffffffff8105e56a>] warn_slowpath_common+0x8a/0xc0
 [<ffffffff8105e65a>] warn_slowpath_null+0x1a/0x20
 [<ffffffff81062b2a>] __local_bh_enable_ip+0xaa/0x110
 [<ffffffff814ff229>] _raw_spin_unlock_bh+0x39/0x40
 [<ffffffffa03a7f94>] fc_seq_set_resp+0xe4/0x100 [libfc]
 [<ffffffffa02e604a>] ft_free_cmd+0x4a/0x90 [tcm_fc]
 [<ffffffffa02e6972>] ft_release_cmd+0x12/0x20 [tcm_fc]
 [<ffffffffa042bd66>] target_release_cmd_kref+0x56/0x90 [target_core_mod]
 [<ffffffffa042caf0>] target_put_sess_cmd+0xc0/0x110 [target_core_mod]
 [<ffffffffa042cb81>] transport_release_cmd+0x41/0x70 [target_core_mod]
 [<ffffffffa042d975>] transport_generic_free_cmd+0x35/0x420 [target_core_mod]

Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Acked-by: Joern Engel <joern@logfs.org>
Reviewed-by: Andy Grover <agrover@redhat.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
9 years agotarget: Fix race for SCF_COMPARE_AND_WRITE_POST checking
Nicholas Bellinger [Fri, 6 Nov 2015 07:37:59 +0000 (23:37 -0800)]
target: Fix race for SCF_COMPARE_AND_WRITE_POST checking

This patch addresses a race + use after free where the first
stage of COMPARE_AND_WRITE in compare_and_write_callback()
is rescheduled after the backend sends the secondary WRITE,
resulting in second stage compare_and_write_post() callback
completing in target_complete_ok_work() before the first
can return.

Because current code depends on checking se_cmd->se_cmd_flags
after return from se_cmd->transport_complete_callback(),
this results in first stage having SCF_COMPARE_AND_WRITE_POST
set, which incorrectly falls through into second stage CAW
processing code, eventually triggering a NULL pointer
dereference due to use after free.

To address this bug, pass in a new *post_ret parameter into
se_cmd->transport_complete_callback(), and depend upon this
value instead of ->se_cmd_flags to determine when to return
or fall through into ->queue_status() code for CAW.

Cc: Sagi Grimberg <sagig@mellanox.com>
Cc: <stable@vger.kernel.org> # v3.12+
Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>