Dave Stevenson [Tue, 14 Mar 2017 14:23:06 +0000 (14:23 +0000)]
bcm2835-gpio-exp: Copy/paste error adding base twice
brcmexp_gpio_set was adding gpio->gc.base to the offset
twice, so passing an invalid number to the mailbox service.
The firmware treated it modulo-8 anyway, but was logging an
assert every time.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Tue, 7 Mar 2017 12:18:20 +0000 (12:18 +0000)]
BCM270X_DT: Invert Pi3 power LED to match fw change
Firmware expgpio driver reworked due to complaint over
hotplug detect.
Requires power LED to change sense as firmware is no longer
inverting the read value.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Mon, 13 Mar 2017 12:30:37 +0000 (12:30 +0000)]
thermal: Compatible strings for bcm2836, bcm2837
The upstream dt-bindings documentation for bcm2835-thermal (which
exists even though the driver isn't upstreamed) says to use
dedicated compatible strings on bcm2836 and bcm2837, even though
the downstream driver doesn't support them. The Pi2 DTB uses
"brcm,bcm2836-thermal", so the driver doesn't load. The Pi3 DTB
doesn't override the base value, but the arm64 Pi3 support uses "brcm,bcm2837-thermal".
Solve the documentation problem by adding "brcm,bcm2836-thermal" and
"brcm,bcm2837-thermal" as alternative compatible strings for the
bcm2835-thermal driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Mon, 6 Mar 2017 20:17:16 +0000 (12:17 -0800)]
panel-raspberrypi-touchscreen: Round up clk rate to fix DSI panel.
Commit 488f9bc8e3def93e0baef53cee2026c2cb0d8956 slightly increased the
reported rate of PLLD, so the clk driver decided that PLLD/3/8 was now
higher than our requested pixel clock rate and rejected it in favor of
PLLD/4/8, which then ran the pixel clock way out of spec.
By bumping the requested clock rate just slightly, we get back to
PLLD/3/8 like we wanted and the panel displays content again.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Michael Zoran [Fri, 24 Feb 2017 01:54:31 +0000 (17:54 -0800)]
drm/vc4: Don't wait for vblank when updating the cursor
Commonly used desktop environments such as xfce4 and gnome
on debian sid can flood the graphics drivers with cursor
updates. Because the current implementation is waiting
for a vblank between cursor updates, this will cause the
display to hang for a long time since a typical refresh
rate is only 60Hz.
This is unnecessary and unexpected by user mode software,
so simply swap out the cursor frame buffer without waiting.
Signed-off-by: Michael Zoran <mzoran@crowfest.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 9 Feb 2017 17:23:34 +0000 (09:23 -0800)]
drm/vc4: Fix OOPSes from trying to cache a partially constructed BO.
If a CMA allocation failed, the partially constructed BO would be
unreferenced through the normal path, and we might choose to put it in
the BO cache. If we then reused it before it expired from the cache,
the kernel would OOPS.
Signed-off-by: Eric Anholt <eric@anholt.net> Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Wed, 8 Feb 2017 23:00:54 +0000 (15:00 -0800)]
drm/vc4: Fulfill user BO creation requests from the kernel BO cache.
The from_cache flag was actually "the BO is invisible to userspace",
so we can repurpose to just zero out a cached BO and return it to
userspace.
Improves wall time for a loop of 5 glsl-algebraic-add-add-1 by
-1.44989% +/- 0.862891% (n=28, 1 outlier removed from each that
appeared to be other system noise)
Note that there's an intel-gpu-tools test to check for the proper
zeroing behavior here, which we continue to pass.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 2 Feb 2017 17:42:18 +0000 (09:42 -0800)]
drm/vc4: Fix sending of page flip completion events in FKMS mode.
In the rewrite of vc4_crtc.c for fkms, I dropped the part of the
CRTC's atomic flush handler that moved the completion event from the
proposed atomic state change to the CRTC's current state. That meant
that when full screen pageflipping happened (glxgears -fullscreen in
X, compton, por weston), the app would end up blocked firever waiting
to draw its next frame.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Boris Brezillon [Fri, 2 Dec 2016 13:48:13 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 5ab1a37c6027c114a87a1ae32cfc5ef303d643c5) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Boris Brezillon [Fri, 2 Dec 2016 13:48:12 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit b899c45208d6f204a6da9a1132577993eeecf0fb) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Wed, 10 Feb 2016 19:42:32 +0000 (11:42 -0800)]
drm/vc4: Add DSI driver
The DSI0 and DSI1 blocks on the 2835 are related hardware blocks.
Some registers move around, and the featureset is slightly different,
as DSI1 (the 4-lane DSI) is a later version of the hardware block.
This driver doesn't yet enable DSI0, since we don't have any hardware
to test against, but it does put a lot of the register definitions and
code in place.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 11 Feb 2016 00:17:29 +0000 (16:17 -0800)]
drm/vc4: Add support for feeding DSI encoders from the pixel valve.
We have to set a different pixel format, which tells the hardware to
use the pix_width field that's fed in sideband from the DSI encoder to
divide the "pixel" clock.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Thu, 15 Sep 2016 14:25:23 +0000 (15:25 +0100)]
drm/vc4: Set up SCALER_DISPCTRL at boot.
We want the HVS on, obviously, and we also want DSP3 (PV1's source) to
be muxed from HVS channel 2 like we expect in vc4_crtc.c. The
firmware wasn't setting the DSP3 mux up when both the LCD and HDMI
were disabled.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
This means that the firmware won't power on the panel at boot time (no
rainbow) and the touchscreen input won't work. The native input
driver for the touchscreen still needs to be written.
v2: Set the same default orientation as the closed source firmware
used, which is the best for viewing angle.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:57 +0000 (07:31 +1100)]
clk: bcm2835: Add leaf clock measurement support, disabled by default
This proved incredibly useful during debugging of the DSI driver, to
see if our clocks were running at rate we requested. Let's leave it
here for the next person interacting with clocks on the platform (and
so that hopefully we can just hook it up to debugfs some day).
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 3f9195811d8d829556c4cd88d3f9e56a80d5ba60) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:56 +0000 (07:31 +1100)]
clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver. In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 8a39e9fa578229fd4604266c6ebb1a3a77d7994c) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 17 Jan 2017 20:31:55 +0000 (07:31 +1100)]
clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.
Our core PLLs are intended to be configured once and left alone. With
the SET_RATE_PARENT, asking to set the PLLD_DSI1 clock rate would
change PLLD just to get closer to the requested DSI clock, thus
changing PLLD_PER, the UART and ethernet PHY clock rates downstream of
it, and breaking ethernet.
We *do* want PLLH to change so that PLLH_AUX can be exactly the value
we want, though. Thus, we need to have a per-divider policy of
whether to pass rate changes up.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 55486091bd1e1c5ed28c43c0d6b3392468a9adb5) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Eric Anholt [Tue, 10 May 2016 00:28:18 +0000 (17:28 -0700)]
clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
These divide off of PLLD_PER and are used for the ethernet and wifi
PHYs source PLLs. Neither of them is currently represented by a phy
device that would grab the clock for us.
This keeps other drivers from killing the networking PHYs when they
disable their own clocks and trigger PLLD_PER's refcount going to 0.
v2: Skip marking as critical if they aren't on at boot.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 24 Feb 2015 13:40:50 +0000 (13:40 +0000)]
pinctrl-bcm2835: Fix interrupt handling for GPIOs 28-31 and 46-53
Contrary to the documentation, the BCM2835 GPIO controller actually has
four interrupt lines - one each for the three IRQ groups and one common. Rather
confusingly, the GPIO interrupt groups don't correspond directly with the GPIO
control banks. Instead, GPIOs 0-27 generate IRQ GPIO0, 28-45 GPIO1 and
46-53 GPIO2.
Awkwardly, the GPIOS for IRQ GPIO1 straddle two 32-entry GPIO banks, so it is
cleaner to split out a function to process the interrupts for a single GPIO
bank.
This bug has only just been observed because GPIOs above 27 can only be
accessed on an old Raspberry Pi with the optional P5 header fitted, where
the pins are often used for I2S instead.
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Fri, 10 Mar 2017 14:43:15 +0000 (14:43 +0000)]
bcm2835-v4l2: Fix buffer overflow problem
https://github.com/raspberrypi/linux/issues/1447
port_parameter_get() failed to account for the header
(u32 id and u32 size) in the size before memcpying
the response into the response buffer, so overrunning
the provided buffer by 8 bytes.
Account for those bytes, and also a belt-and-braces
check to ensure we never copy more than *value_size
bytes into value.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Tue, 7 Mar 2017 19:48:23 +0000 (19:48 +0000)]
config: Add CONFIG_CRYPTO_LZ4
Enabling this options allows LZ4 memory compression.
Fixes: https://github.com/raspberrypi/linux/issues/1875 Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Phil Elwell [Mon, 6 Mar 2017 09:06:18 +0000 (09:06 +0000)]
clk-bcm2835: Read max core clock from firmware
The VPU is responsible for managing the core clock, usually under
direction from the bcm2835-cpufreq driver but not via the clk-bcm2835
driver. Since the core frequency can change without warning, it is
safer to report the maximum clock rate to users of the core clock -
I2C, SPI and the mini UART - to err on the safe side when calculating
clock divisors.
If the DT node for the clock driver includes a reference to the
firmware node, use the firmware API to query the maximum core clock
instead of reading the divider registers.
Prior to this patch, a "100KHz" I2C bus was sometimes clocked at about
160KHz. In particular, switching to the 4.9 kernel was likely to break
SenseHAT usage on a Pi3.
Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Dave Stevenson [Mon, 20 Feb 2017 17:01:21 +0000 (17:01 +0000)]
bcm2835-gpio-exp: Driver for GPIO expander via mailbox service
Pi3 and Compute Module 3 have a GPIO expander that the
VPU communicates with.
There is a mailbox service that now allows control of this
expander, so add a kernel driver that can make use of it.
Pwr_led node added to device-tree for Pi3.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Dave Stevenson [Mon, 13 Feb 2017 11:10:50 +0000 (11:10 +0000)]
BCM2835-V4L2: Ensure H264 header bytes get a sensible timestamp
H264 header come off VC with 0 timestamps, which means they get a
strange timestamp when processed with VC/kernel start times,
particularly if used with the inline header option.
Remember the last frame timestamp and use that if set, or otherwise
use the kernel start time.
https://github.com/raspberrypi/linux/issues/1836
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Phil Elwell [Wed, 1 Mar 2017 16:07:39 +0000 (16:07 +0000)]
amba_pl011: Round input clock up
The UART clock is initialised to be as close to the requested
frequency as possible without exceeding it. Now that there is a
clock manager that returns the actual frequencies, an expected
48MHz clock is reported as 47999625. If the requested baudrate
== requested clock/16, there is no headroom and the slight
reduction in actual clock rate results in failure.
Detect cases where it looks like a "round" clock was chosen and
adjust the reported clock to match that "round" value. As the
code comment says:
/*
* If increasing a clock by less than 0.1% changes it
* from ..999.. to ..000.., round up.
*/
Fe-Pi [Wed, 1 Mar 2017 11:42:43 +0000 (04:42 -0700)]
Add support for Fe-Pi audio sound card. (#1867)
Fe-Pi Audio Sound Card is based on NXP SGTL5000 codec.
Mechanical specification of the board is the same the Raspberry Pi Zero.
3.5mm jacks for Headphone/Mic, Line In, and Line Out.
Matthias Reichl [Mon, 20 Feb 2017 19:01:16 +0000 (20:01 +0100)]
dmaengine: bcm2835: Fix cyclic DMA period splitting
The code responsible for splitting periods into chunks that
can be handled by the DMA controller missed to update total_len,
the number of bytes processed in the current period, when there
are more chunks to follow.
Therefore total_len was stuck at 0 and the code didn't work at all.
This resulted in a wrong control block layout and audio issues because
the cyclic DMA callback wasn't executing on period boundaries.
Fix this by adding the missing total_len update.
Signed-off-by: Matthias Reichl <hias@horus.com> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk> Reviewed-by: Eric Anholt <eric@anholt.net>
Phil Elwell [Mon, 13 Feb 2017 17:20:08 +0000 (17:20 +0000)]
clk-bcm2835: Add claim-clocks property
The claim-clocks property can be used to prevent PLLs and dividers
from being marked as critical. It contains a vector of clock IDs,
as defined by dt-bindings/clock/bcm2835.h.
Use this mechanism to claim PLLD_DSI0, PLLD_DSI1, PLLH_AUX and
PLLH_PIX for the vc4_kms_v3d driver.
Phil Elwell [Fri, 17 Feb 2017 15:26:13 +0000 (15:26 +0000)]
brcmfmac: Mute expected startup 'errors'
The brcmfmac WiFi driver always complains about the '00' country code
and the firmware version is reported as an error. Modify the driver to
ignore '00' silently and display firmware version at INFO level.
Phil Elwell [Fri, 17 Feb 2017 09:47:11 +0000 (09:47 +0000)]
BCM270X_DT: Add SMSC ethernet controller to DT
With an ethernet node in the DT, a suitable firmware can populate the
local-mac-address property, removing the need for a downstream patch
to the driver to read its MAC address from a module parameter.
Phil Elwell [Thu, 9 Feb 2017 14:40:33 +0000 (14:40 +0000)]
sound: Suppress error message about deferrals
Since driver load deferrals are expected and will already
have resulted in a kernel message, suppress an essentially
duplicate error message from the RPi audio board drivers.
Phil Elwell [Thu, 9 Feb 2017 14:36:44 +0000 (14:36 +0000)]
sound: Demote deferral errors to INFO level
At present there is no mechanism to specify driver load order,
which can lead to deferrals and repeated retries until successful.
Since this situation is expected, reduce the dmesg level to
INFO and mention that the operation will be retried.
Phil Elwell [Mon, 13 Feb 2017 17:20:08 +0000 (17:20 +0000)]
clk-bcm2835: Mark used PLLs and dividers CRITICAL
The VPU configures and relies on several PLLs and dividers. Mark all
enabled dividers and their PLLs as CRITICAL to prevent the kernel from
switching them off.
Martin Cerveny [Mon, 13 Feb 2017 16:23:47 +0000 (17:23 +0100)]
dwc_otg: fix summarize urb->actual_length for isochronous transfers
Kernel does not copy input data of ISO transfers to userspace
if actual_length is set only in ISO transfers and not summarized
in urb->actual_length. Fixes raspberrypi/linux#903
Claggy3 [Sat, 11 Feb 2017 14:00:30 +0000 (14:00 +0000)]
Update vfpmodule.c
Christopher Alexander Tobias Schulze - May 2, 2015, 11:57 a.m.
This patch fixes a problem with VFP state save and restore related
to exception handling (panic with message "BUG: unsupported FP
instruction in kernel mode") present on VFP11 floating point units
(as used with ARM1176JZF-S CPUs, e.g. on first generation Raspberry
Pi boards). This patch was developed and discussed on
https://github.com/raspberrypi/linux/issues/859
A precondition to see the crashes is that floating point exception
traps are enabled. In this case, the VFP11 might determine that a FPU
operation needs to trap at a point in time when it is not possible to
signal this to the ARM11 core any more. The VFP11 will then set the
FPEXC.EX bit and store the trapped opcode in FPINST. (In some cases,
a second opcode might have been accepted by the VFP11 before the
exception was detected and could be reported to the ARM11 - in this
case, the VFP11 also sets FPEXC.FP2V and stores the second opcode in
FPINST2.)
If FPEXC.EX is set, the VFP11 will "bounce" the next FPU opcode issued
by the ARM11 CPU, which will be seen by the ARM11 as an undefined opcode
trap. The VFP support code examines the FPEXC.EX and FPEXC.FP2V bits
to decide what actions to take, i.e., whether to emulate the opcodes
found in FPINST and FPINST2, and whether to retry the bounced instruction.
If a user space application has left the VFP11 in this "pending trap"
state, the next FPU opcode issued to the VFP11 might actually be the
VSTMIA operation vfp_save_state() uses to store the FPU registers
to memory (in our test cases, when building the signal stack frame).
In this case, the kernel crashes as described above.
This patch fixes the problem by making sure that vfp_save_state() is
always entered with FPEXC.EX cleared. (The current value of FPEXC has
already been saved, so this does not corrupt the context. Clearing
FPEXC.EX has no effects on FPINST or FPINST2. Also note that many
callers already modify FPEXC by setting FPEXC.EN before invoking
vfp_save_state().)
This patch also addresses a second problem related to FPEXC.EX: After
returning from signal handling, the kernel reloads the VFP context
from the user mode stack. However, the current code explicitly clears
both FPEXC.EX and FPEXC.FP2V during reload. As VFP11 requires these
bits to be preserved, this patch disables clearing them for VFP
implementations belonging to architecture 1. There should be no
negative side effects: the user can set both bits by executing FPU
opcodes anyway, and while user code may now place arbitrary values
into FPINST and FPINST2 (e.g., non-VFP ARM opcodes) the VFP support
code knows which instructions can be emulated, and rejects other
opcodes with "unhandled bounce" messages, so there should be no
security impact from allowing reloading FPEXC.EX and FPEXC.FP2V.
Signed-off-by: Christopher Alexander Tobias Schulze <cat.schulze@alice-dsl.net>
Phil Elwell [Mon, 23 Jan 2017 17:36:50 +0000 (17:36 +0000)]
BCM270X_DT: Add reference to audio_pins to CM dtb
The CM1 dtb contains an empty audio_pins node, but no reference to it.
Adding the usual pinctrl reference from the audio node enables the
audremap overlay (and others) to easily turn on audio.
Phil Elwell [Thu, 19 Jan 2017 11:18:55 +0000 (11:18 +0000)]
config: Add CONFIG_USB_DWC2 and CONFIG_USB_GADGET
The introduction of CM3 makes gadget mode on 2709 a useful option,
so enable the building of the required modules. Note that these
modules are not loaded by default and must be enabled with a DT
overlay.
Michael Zoran [Sun, 15 Jan 2017 05:43:57 +0000 (21:43 -0800)]
ARM64: Round-Robin dispatch IRQs between CPUs.
IRQ-CPU mapping is round robined on ARM64 to increase
concurrency and allow multiple interrupts to be serviced
at a time. This reduces the need for FIQ.
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Michael Zoran [Sun, 15 Jan 2017 05:33:51 +0000 (21:33 -0800)]
ARM64/DWC_OTG: Port dwc_otg driver to ARM64
In ARM64, the FIQ mechanism used by this driver is not current
implemented. As a workaround, reqular IRQ is used instead
of FIQ.
In a separate change, the IRQ-CPU mapping is round robined
on ARM64 to increase concurrency and allow multiple interrupts
to be serviced at a time. This reduces the need for FIQ.
Tests Run:
This mechanism is most likely to break when multiple USB devices
are attached at the same time. So the system was tested under
stress.
Devices:
1. USB Speakers playing back a FLAC audio through VLC
at 96KHz.(Higher then typically, but supported on my speakers).
2. sftp transferring large files through the buildin ethernet
connection which is connected through USB.
3. Keyboard and mouse attached and being used.
Although I do occasionally hear some glitches, the music seems to
play quite well.
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Michael Zoran [Sun, 15 Jan 2017 15:25:18 +0000 (07:25 -0800)]
ARM64: Fix build break for RTL8187/RTL8192CU wifi
These drivers use an ASM function from the base
system to compute the ipv6 checksum. These functions
are not available on ARM64, probably because nobody
has bother to write them. The base system does have
a generic "C" version, so a simple fix is to include
the header to use the generic version on ARM64 only.
A longer term solution would be to submit the necessary
ASM function to the upstream source.
With this change, these drivers now compile without
any errors on ARM64.
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Electron752 [Sat, 14 Jan 2017 10:54:26 +0000 (02:54 -0800)]
ARM64: Enable Kernel Address Space Randomization (#1792)
Randomization allows the mapping between virtual addresses and physical
address to be different on each boot. This makes it more difficult
to exploit security vulnerabilities that require knowledge of fixed
hardware addresses.
The firmware generates a 8 byte random number during bootup and stores
it in the device tree under chosen/kaslr-seed. This number is used
to randomize the address mapping.
This change enables this feature in the build configuration for ARM64.
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Michael Zoran [Fri, 13 Jan 2017 03:05:46 +0000 (19:05 -0800)]
ARM64/SND_BCM2835: Port it to arm64.
In the messages sent to VCHIQ, SND_BCM2835 passes a callback
and a context into two 32 bit pointers. Since this
message is interpreted by the firmware, it can't be easily
changed. Luckily only one of these fields is actual used,
so on ARM64 only use one of the fields to store the upper
half of the 64 bit callback pointer.
The Kconfig is also changed to allow ARM audio to work for ARM64
as well.
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Electron752 [Thu, 12 Jan 2017 15:07:08 +0000 (07:07 -0800)]
ARM64: Make it work again on 4.9 (#1790)
* Invoke the dtc compiler with the same options used in arm mode.
* ARM64 now uses the bcm2835 platform just like ARM32.
* ARM64: Update bcmrpi3_defconfig
Signed-off-by: Michael Zoran <mzoran@crowfest.net>
* Added a writable sysfs object to enable scripts / user space software
to blink MIDI activity LEDs for variable duration.
* Improved hw_param constraints setting.
* Added compatibility with S16_LE sample format.
* Exposed some simple placeholder volume controls, so the card appears
in volumealsa widget.