Maxime Coquelin [Wed, 3 Jun 2015 14:54:02 +0000 (16:54 +0200)]
ARM: dts: Introduce STM32F429 MCU
The STMicrolectornics's STM32F429 MCU has the following main features:
- Cortex-M4 core running up to @180MHz
- 2MB internal flash, 256KBytes internal RAM
- FMC controller to connect SDRAM, NOR and NAND memories
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS & HS controllers
- I2C, SPI, CAN busses support
- Several 16 & 32 bits general purpose timers
- Serial Audio interface
- LCD controller
Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Kevin Hilman [Wed, 10 Jun 2015 22:47:21 +0000 (15:47 -0700)]
Merge tag 'sunxi-dt-for-4.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Allwinner DT changes for 4.2, take 2
A bunch of new DT changes for the 4.2 merge window, among which:
- Enable the SRAM controller on the A10/A10s/A13/A20
- A33 support
- New boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
* tag 'sunxi-dt-for-4.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun6i: Add a dts file for the Mele A1000G quad top set box
ARM: dts: sun8i: Add dts file for the GA10H-A33 tablet
ARM: dts: sun8i-a33: Add dts for Sinlinx SinA33 development board.
ARM: dts: sun8i-a33: Add pinmux setting for uart0 on PB pins
ARM: dts: sun8i: Add pinmux setting for 8bit mmc2
ARM: dts: sun8i: Add usb_clk node for a23/a33
ARM: dts: sun8i: Add ET-Q8 A33 support
ARM: dts: sun8i: Add sun8i-a33 dtsi
ARM: dts: sun8i: Add sun8i-a23-a33 dtsi
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A10s and A13 SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sunxi: Revert SRAM controller drivers patches
ARM: dts: sun9i: Add device node for watchdog
ARM: dts: sun7i: Add uart4 support for BananaPro, disable uart2
ARM: dts: sun7i: Add uart4_pins_b definition
ARM: sun8i: Introduce A23 Evaluation Board Support
Hans de Goede [Mon, 1 Jun 2015 15:02:59 +0000 (17:02 +0200)]
ARM: dts: sun6i: Add a dts file for the Mele A1000G quad top set box
The Mele A1000G-quad and the Mele M9 have the same PCB, sofar we've been using
the same dts for both models. Unfortunately this does not work for the otg
controller, on the M9 this is routed to a micro-usb connector on the outside,
while as on the A1000G-quad it is connected to an usb to sata bridge
(which is not populated on the M9 pcb).
This commit adds a new dts for the Mele-A1000G-quad to allow using
different otg controller settings on the 2 boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Tue, 2 Jun 2015 10:04:03 +0000 (18:04 +0800)]
ARM: dts: sun8i-a33: Add dts for Sinlinx SinA33 development board.
The SinA33 is a core/SDK development board by Sinlinx. The core board
does not have any connectors or pads, other than the pads used to connect
it to the SDK board.
The core board only has the A33 SoC, 2 RAM chips, an eMMC flash chip,
the AXP223 PMIC, and supporting discrete components. eMMC is optional.
The SDK board has a USB host, USB OTG, volume control and home buttons,
audio input/output jacks, a micro-SD slot, camera and SDIO expansion
headers, an LCD connector, and a GPIO expansion header, which has
UARTs, MIPI DSI and I2C available. Only UART0 is enabled though.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Tue, 2 Jun 2015 10:04:02 +0000 (18:04 +0800)]
ARM: dts: sun8i-a33: Add pinmux setting for uart0 on PB pins
The A33 adds an additional pinmux option for uart0 on the PB pins.
This was not present on the A23. Nor is it available on the H3,
which does not have the PB pingroup.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Dinh Nguyen [Sat, 23 May 2015 04:00:10 +0000 (23:00 -0500)]
ARM: socfpga: dts: add enable-method property for cpu nodes
Add the enable-method property for the cpu node on socfpga.dtsi and
socfpga_arria10.dtsi. This is for CPU_METHOD_OF_DECLARE to use to enable
the secondary core.
Hans de Goede [Mon, 1 Jun 2015 18:23:28 +0000 (20:23 +0200)]
ARM: dts: sun8i: Add usb_clk node for a23/a33
Add an usb_clk node for a23/a33.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Vishnu Patekar [Sat, 30 May 2015 14:55:03 +0000 (16:55 +0200)]
ARM: dts: sun8i: Add sun8i-a23-a33 dtsi
Rename sun8i-a23.dtsi to sun8i-a23-a33.dtsi as the base dtsi for the A33
is 99% the same and add a new sun8i-a23.dtsi including sun8i-a23-a33.dtsi
and setting the few things not shared with the A33 (mbus-clk, pio
compatible and interrupts).
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org>
Arnd Bergmann [Mon, 1 Jun 2015 16:02:44 +0000 (18:02 +0200)]
Merge tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Device Tree changes for Ux500 and ARM SOC" from Linus Walleij:
- Document Snoop Control Unit (SCU) bindings
- Document Ux500 board bindings
- Define the backup RAM in the DBx500 device tree
* tag 'dt-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: define the backupram in the device tree
ARM: ux500: add board documentation
ARM: scu: document Snoop Control Unit DT bindings
Arnd Bergmann [Mon, 1 Jun 2015 15:38:07 +0000 (17:38 +0200)]
Merge tag 'mvebu-dt-4.2-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v4.2 (part #2)" from Gregory CLEMENT:
Add 2 new set boards:
- Armada 385 based Linksys boards
- DLink DNS-327L
Update the spi-nor flash compatible strings
Use improved armada spi device tree compatible name for each mvebu SoC
* tag 'mvebu-dt-4.2-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: use improved armada spi device tree compatible name for each SoC
ARM: mvebu: dts: Add dts file for DLink DNS-327L
ARM: mvebu: add "jedec,spi-nor" flash compatible binding
ARM: kirkwood: add "jedec,spi-nor" flash compatible binding
ARM: mvebu: add support for the new Armada 385 based Linksys boards
Maxime Ripard [Thu, 26 Mar 2015 14:53:44 +0000 (15:53 +0100)]
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
The A20 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.
Add the SRAM controller, the SRAM that it drives and the section that can
be used by the various devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 26 Mar 2015 14:53:44 +0000 (15:53 +0100)]
ARM: dts: sun5i: Add A10s and A13 SRAM and SRAM controller
The A10s and A13 have a few SRAM that can be mapped either to a device or
to the CPU, with the mapping being controlled by a SRAM controller.
Add the SRAM controller, the SRAM that it drives and the section that can
be used by the various devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 26 Mar 2015 14:53:44 +0000 (15:53 +0100)]
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
The A10 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.
Add the SRAM controller, the SRAM that it drives and the section that can
be used by the various devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 26 May 2015 16:54:16 +0000 (00:54 +0800)]
ARM: dts: sun9i: Add device node for watchdog
On A80 there are 2 watchdogs, one in the main block, and one in the
R (special) block. We do not have information on the R block watchdog,
other than the register layout is the same, and the interrupt number.
Both are able to reset the whole system.
Add the main watchdog, in case the R block is used for special purposes
like running an RTOS.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Michael Ring [Fri, 22 May 2015 14:33:04 +0000 (16:33 +0200)]
ARM: dts: sun7i: Add uart4 support for BananaPro, disable uart2
The BananaPro uses uart4 for the default rx/tx pins on the 40 pins connector,
so enable uart4.
Uart2 is also available at the bananapro io-pins, but like on the bananapi
the primary function of the pins is to act as gpios, see:
http://forum.lemaker.org/forum.php?mod=viewthread&tid=10852
Remove the uart2 node, people who want to use uart2 can do so with a
devicetree-overlay.
Signed-off-by: Michael Ring <mail@michael-ring.org>
[hdegoede@redhat.com: Remove uart2 node] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Michael Ring [Thu, 21 May 2015 12:32:33 +0000 (14:32 +0200)]
ARM: dts: sun7i: Add uart4_pins_b definition
Some boards (e.g. the BananaPro) use alternative pins for uart4, add a pinmux
entry for these.
Signed-off-by: Michael Ring <mail@michael-ring.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 7 May 2015 20:46:53 +0000 (22:46 +0200)]
ARM: sun8i: Introduce A23 Evaluation Board Support
The A23 Evaluation Board has an MMC slot, two UARTs, NAND, a few display
connectors (RGB, MIPI, LVDS), a mini-PCIE slot, USB host and OTG and a
bunch of embedded sensors.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Arnd Bergmann [Fri, 22 May 2015 15:33:12 +0000 (17:33 +0200)]
Merge branch 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld into next/dt
Merge "Documentation: bindings: Add DT bindings for ARM Juno boards" from Liviu Dudau:
* 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld:
Documentation: bindings: Add DT bindings for ARM Juno boards.
arm64: Add DT support for Juno r1 board.
arm64: Juno: Add GICv2m support in device tree.
arm64: Juno: Add memory mapped timer node
arm64: Juno: Split juno.dts into juno-base.dtsi and juno.dts.
arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.
Arnd Bergmann [Fri, 29 May 2015 11:58:41 +0000 (13:58 +0200)]
Merge tag 'zynq-dt-for-4.2' of https://github.com/Xilinx/linux-xlnx into next/dt
Merge "arm: Xilinx Zynq dt patches for v4.2" from Michal Simek:
- Fix aliases and stdout properties
- Document current TTC binding
- Add Ceva to prefixes
- Use new compatible string for MACB
* tag 'zynq-dt-for-4.2' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: DT: Use the zynq binding with macb
of: Add vendor prefix for Ceva
PCI: xilinx: Trivial fix in DT example
devicetree: cadence_ttc: Document binding for timer width
ARM: dts: zynq: Fix stdout-path and bootargs
ARM: dts: zynq: Add missing alias node for zybo and parallella
Arnd Bergmann [Fri, 29 May 2015 11:55:50 +0000 (13:55 +0200)]
Merge tag 'qcom-dt-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "Qualcomm ARM Based Device Tree Updates for v4.2" from Kumar Gala:
* Added support for regulators, USB Host & OTG, SATA, and i2c
controllers on APQ8064 based platforms
* Added PM8841/PM8941/PMA8084 device nodes
* Added PMU support on MSM8660
* tag 'qcom-dt-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: dts: qcom: Add msm8660 PMU node
ARM: dts: qcom: Add PMA8084 functions device nodes
ARM: dts: qcom: Add PM8941 functions device nodes
ARM: dts: qcom: Add PM8841 functions device nodes
ARM: dts: qcom: apq8064 - add i2c3 node for panel.
ARM: dts: qcom: apq8064 - Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: qcom: apq8064-ifc6410 - Add DT alias for serial port
ARM: dts: qcom: apq8064 - Add USB OTG support for CM QS-600
ARM: dts: qcom: apq8064 - Add usb host support to CM QS-600
ARM: dts: qcom: apq8064-cm-qs600 - Add basic regulators
ARM: dts: qcom: apq8064 - Add SATA controller support
ARM: dts: qcom: apq8064 - Add USB OTG support
ARM: dts: qcom: apq8064 - Add usb host support.
ARM: dts: qcom: apq8064-ifc6410 - Add basic regulators
ARM: dts: qcom: apq8064 - add RPM regulators support
Nathan Sullivan [Wed, 27 May 2015 20:00:01 +0000 (15:00 -0500)]
ARM: zynq: DT: Use the zynq binding with macb
Use the new zynq binding for macb ethernet, since it will disable half
duplex gigabit like the Zynq TRM says to do. Also allow the compatible
cadence gem binding that won't disable half duplex but works otherwise.
devicetree: cadence_ttc: Document binding for timer width
Modern TTC implementations can extend the timer width to 32 bit. This
feature is not self identifying so the driver needs to be made aware
via device tree.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Florian Fainelli [Wed, 27 May 2015 03:27:30 +0000 (20:27 -0700)]
ARM: dts: BCM63xx: re-parent NAND controller node
The NAND controller is a child node of the UBUS (legacy) bus, not the
AXI (new) bus, re-parent the NAND controller node accordingly. This was
a mistake introduced by a failed merge of this NAND node with other
changes (PMB).
Andrew Andrianov [Tue, 26 May 2015 15:51:11 +0000 (18:51 +0300)]
ARM: mvebu: dts: Add dts file for DLink DNS-327L
DNS-327L is a 2-bay NAS with the following specs:
- 512MiB RAM
- 128MiB NAND Flash
- 1 GbE interface (Marvell PHY)
- 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
- 2 internal SATA ports handled by the Armada 370:
uses 2 gpios for power control
- two front 2-color leds (amber + white) for both discs,
controlled by the SoC
- One white LED handled by SoC (USB)
- 3 buttons. Power handled by weltrend, USB and
RESET (on the bottom) are wired via GPIOs
- Unidentified i2c device at address 0x13 (via i2cdetect)
- UART0 providing serial console
- Weltrend MCU serving for RTC, temperature, fan control,
and power button handling interfaced via UART1
(Handled via userspace dns320l-daemon)
Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Arnd Bergmann [Fri, 22 May 2015 15:33:12 +0000 (17:33 +0200)]
Merge branch 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld into next/dt
Merge "Documentation: bindings: Add DT bindings for ARM Juno boards" from Liviu Dudau:
* 'for-upstream/juno-dts' of git://linux-arm.org/linux-ld:
Documentation: bindings: Add DT bindings for ARM Juno boards.
arm64: Add DT support for Juno r1 board.
arm64: Juno: Add GICv2m support in device tree.
arm64: Juno: Add memory mapped timer node
arm64: Juno: Split juno.dts into juno-base.dtsi and juno.dts.
arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.
Liviu Dudau [Tue, 10 Mar 2015 15:31:37 +0000 (15:31 +0000)]
arm64: Add DT support for Juno r1 board.
This board is based on Juno r0 with updated Cortex A5x revisions
and board errata fixes. It also contains coherent ThinLinks ports
on the expansion slot that allow for an AXI master on the daughter
card to participate in a coherency domain.
Support for SoC PCIe host bridge will be added as a separate series.
arm64: Juno: Fix the GIC node address label and the frequency of FAXI clock.
During the review of the Juno DT files I've noticed that the GIC
node label had two digits swapped leading to a different address
being shown in the /sys/devices fs.
Sudeep also pointed that public revisions of the Juno documentation
list a different frequency for the FAXI system than what the one
I've been using when creating the DT file. Verified with the firmware
people to be the correct value in the shipped systems.
Boris Brezillon [Tue, 17 Mar 2015 16:15:50 +0000 (17:15 +0100)]
ARM: at91/dt: remove useless usb clock
The ohci driver now calls clk_set_rate on the uhpck clock (which forwards
set_rate requests to its parent: the usb clock).
Remove useless references to usb clocks from ohci definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Arnd Bergmann [Wed, 20 May 2015 21:03:25 +0000 (23:03 +0200)]
Merge tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Berlin DT changes for v4.2" from Sebastian Hesselbarth:
- GPLv2/X11 dual licensing
- Mark Berlin DT bindings as unstable
- Updated binding documentation for reworked
chip/system ctrl nodes
* tag 'berlin-dt-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin:
Documentation: bindings: update the berlin chip and system ctrl doc
Documentation: bindings: move the Berlin clock documentation
Documentation: bindings: move the Berlin pinctrl documentation
Documentation: bindings: move the Berlin reset documentation
Documentation: bindings: update the Berlin controllers documentation
Documentation: bindings: berlin: consider our dt bindings as unstable
ARM: dts: berlin: relicense the BG2CD Google Chromecast dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2 Sony NSZ-GS7 dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2 dtsi under GPLv2/X11
ARM: dts: berlin: relicense the BG2Q Marvell DMP dts under GPLv2/X11
ARM: dts: berlin: relicense the berlin2q dtsi under GPLv2/X11
Nishanth Menon [Fri, 15 May 2015 22:16:40 +0000 (17:16 -0500)]
ARM: dts: omap5-uevm: Add Uart wakeup interrupt
UART3 wakeup takes place with iodaisy chain. enable the wakeup pin.
Reported-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: tabify uart pins properly while at it] Signed-off-by: Tony Lindgren <tony@atomide.com>
Marek Belisko [Thu, 7 May 2015 19:35:05 +0000 (21:35 +0200)]
ARM: dts: omap3-gta04: Add GSM audio support
Add voice audio card which is used for telephony on gta04 board.
gtm601 codec is UMTS modem with pcm interface which get samples from
microphone and provide data from other party side. Use simple audio card
to describe audio card.
Signed-off-by: Marek Belisko <marek@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Marek Belisko [Tue, 28 Apr 2015 20:54:27 +0000 (22:54 +0200)]
ARM: dts: omap3-gta04: Add hdqw1 support
Enable omap-hdq for battery fuel gauge access.
Signed-off-by: Marek Belisko <marek@goldelico.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Andrey Skvortsov [Sun, 10 May 2015 21:27:53 +0000 (00:27 +0300)]
ARM: dts: add core2 padconf region for am3517
According to the technical reference manual for AM35xx system
controller module (SCM) PADCONFS core registers are divided in two
regions: 0x48002030..0x48002268 and 0x480025d8..0x480025fc.
First region is the same for all omap3 SoC and is described in omap3.dtsi.
The second region is the same as in omap34xx (see omap34xx.dtsi)
and omap35xx. The patch adds missing description for the second region.
This patch was tested on AM3517.
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Wed, 20 May 2015 16:23:43 +0000 (09:23 -0700)]
ARM: dts: Add minimal support for LogicPD Torpedo DM3730 devkit
The LogicPD Torpedo DM3730 devkit consists of a base board and
two processor boards. One of the processor boards has a WLAN and
the other one does not.
Let's set up basic dts file so we can move to device tree only
based booting over next few merge windows. So far I've tested
that UARTs, MMC1, USB OTG, smsc911x, and basic PM support works.
Note that the wireless support in kernel for wl1283 seems to be
broken, it tries to load wl127x-nvs.bin instead of wl128x-nvs.bin
with firmware.
Cc: Tim Nordell <tim.nordell@logicpd.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Wed, 20 May 2015 16:23:43 +0000 (09:23 -0700)]
ARM: OMAP3: Add support for configuring MMC pins as GPIO pins
Some devices are using the MMC1 pins 4..8 as GPIO pins, and in
this case they need to be configured for 1.8V IO voltage if not
done by the bootloader as otherwise some devices like smsc911x
won't work properly.
Let's also make sure this register is saved and restored for
idle.
Cc: Tim Nordell <tim.nordell@logicpd.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann [Wed, 20 May 2015 15:38:02 +0000 (17:38 +0200)]
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Second batch of DT changes for 4.2:" from Nicolas Ferre:
- sama5d4: more peripherals: usarts, uarts, spi, pioD access
- sama5d3: phy address for gmac
- change NFC register map
- regulator additions for the sd/mmc
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies
ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0
ARM: at91/dt: sama5d3 xplained: add mmc0 vqmmc entry
ARM: at91/dt: sama5d3 xplained: fill in mmc1 and set it to disabled
ARM: at91/dt: sama5: reduce the NFC command register map
ARM: at91/dt: sama5d4: update pinctrl ranges
ARM: at91/dt: sama5d3 xplained: add phy address for macb0
ARM: at91/dt: sama5d4 xplained: add spi1 on j14 connector
ARM: at91/dt: sama5d4: add spi1, spi2 dt nodes
ARM: at91/dt: sama5d4: add uart0, uart1 dt nodes
ARM: at91/dt: sama5d4: add usart0, usart1 dt nodes
Ben Dooks [Mon, 27 Apr 2015 13:19:12 +0000 (15:19 +0200)]
ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0
Add fixed regulator for vmmc0 and attach the vmmc for it to the mmc0
node on the SAM5D3 Xplained board. This will remove the following
warning from the kernel:
Note, atmel_defconfig will need fixed regulator support enabled if this
is to be used properly.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[use a fixed regulator instead of gpio one] Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SAM5D3 Xplained device tree is missing the vqmmc node which is
tied to 3.3V on the board. Add this to avoid the kernel warning that
there is no vqmmc node.
Ben Dooks [Mon, 27 Apr 2015 13:19:10 +0000 (15:19 +0200)]
ARM: at91/dt: sama5d3 xplained: fill in mmc1 and set it to disabled
The mmc1 channel is not populated on the SAM5D3 Xplained board, however
it is enabled and therefore the driver is attaching to it.
The node configuration for mmc1 is missing, so add an mmc1 node in the
device tree and set its status to disabled. Also add the vmmc and the
necessary slot configuration if this node were enabled to avoid the following
warnings from the driver:
atmel_mci f8000000.mmc: No vmmc regulator found
atmel_mci f8000000.mmc: No vqmmc regulator found
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: sama5: reduce the NFC command register map
commit 111573ccd89b ("mtd: atmel_nand: check NFC busy flag by HSMC_SR
instead of NFC cmd regs")
check NFC busy by nfc SR instead of NFC cmd regs. So we don't need to
map NFC cmd registers to include NFCBUSY bit.
That means we only need map 0x08000000 instead of 0x10000000 for NFC
cmd regs.
This patch reduce the NFC cmd regs map for sama5d3 & sama5d4.
Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Update the pinctrl ranges property to support pioD controller whose
mapping is not contiguous with other pio controllers. Without this
update, getting resource will fail, then pinctrl probe will fail too
because there is a missing pio controller.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>