Olof Johansson [Thu, 27 Jun 2019 02:22:19 +0000 (19:22 -0700)]
Merge tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM64 SoC DT updates for v5.3
- Migrate to the new binding for the Denali NAND controller
- Use reserved-memory node instead of /memreserve/ for the
secure memory area
* tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add reserved-memory for secure memory
arm64: dts: uniphier: update to new Denali NAND binding
Olof Johansson [Thu, 27 Jun 2019 02:20:30 +0000 (19:20 -0700)]
Merge tag 'uniphier-dt-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM SoC DT updates for v5.3
- Migrate to the new binding for the Denali NAND controller
* tag 'uniphier-dt-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: update to new Denali NAND binding
Masahiro Yamada [Fri, 21 Jun 2019 18:00:26 +0000 (03:00 +0900)]
arm64: dts: uniphier: add reserved-memory for secure memory
The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Masahiro Yamada [Fri, 21 Jun 2019 11:02:25 +0000 (20:02 +0900)]
arm64: dts: uniphier: update to new Denali NAND binding
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Masahiro Yamada [Fri, 21 Jun 2019 10:53:16 +0000 (19:53 +0900)]
ARM: dts: uniphier: update to new Denali NAND binding
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
In the new binding, the number of connected chips are described in
DT instead of run-time probed.
I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().
I changed all the pinctrl properties to use the single CS.
Olof Johansson [Tue, 25 Jun 2019 11:52:55 +0000 (04:52 -0700)]
Merge tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree changes for 5.3:
- Add i.MX8MQ based Librem5 devkit support.
- Add SNVS power key support for i.MX8MQ and i.MX8MM.
- Add GPIO alias for imx8mq and i.MX8QXP.
- A series from Daniel Baluta to add SAI devices and enable audio
support for imx8mm-evk board.
- Add DDR performance monitor unit support for i.MX8QXP.
- Add irqsteer interrupt controller device for i.MX8MQ SoC.
- Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
- Add OCOTP device node for i.MX8QXP.
- Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
temperature sensor.
- Random minor coding style improvements.
* tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
arm64: dts: librem5: enable the SNVS power key
arm64: dts: librem5: Limit the USB to 5V
arm64: dts: imx8qxp: added ddr performance monitor nodes
arm64: dts: imx8qxp: sort LSIO subsystem devices
arm64: dts: imx8qxp: sort alias alphabetically
arm64: dts: imx8qxp: Add lsio_mu13 node
arm64: dts: imx8mm-evk: Enable audio codec wm8524
arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit
arm64: dts: fsl: ls1028a: Add qDMA node
arm64: dts: imx8mm: Enable SNVS power key according to board design
arm64: dts: imx8mq-evk: Enable SNVS power key
arm64: dts: ls1028a: add crypto node
arm64: dts: ls1028a: Add temperature sensor node
arm64: dts: imx8mm: Move gic node into soc node
arm64: dts: imx8mm: Move usbphy out of soc node
arm64: dts: imx8mm: Pass the 'ranges' property
arm64: dts: imx8mm: Pass a unit name for the 'soc' node
arm64: dts: fsl: imx8mq: add the snvs power key node
arm64: dts: ls1028a: fix watchdog device node
arm64: dts: ls1028a: Enable sata.
...
Olof Johansson [Tue, 25 Jun 2019 11:52:17 +0000 (04:52 -0700)]
Merge tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 DT changes for 5.3:
- New board support: iMX6-based Kontron SMARC-sAMX6i, i.MX7D based
Meerkat96 board, and NXP LS1021A-TSN board.
- A series from Andrey Smirnov to update vf610-zii-dev and
imx7d-zii-rpu2 board, fixing UART2 pin assignment and stdout-path,
adding QSPI device, and dropping unused pinmux.
- Update imx6sl and imx6qdl device tree to assign corresponding clocks
instead of dummy clock.
- Update i.MX6/7 boards from NXP to assign corresponding power supply
for LDOs.
- Update i.MX6/7 device trees to enable SNVS poweroff key support
according to board design.
- Update coresight DT binding for i.MX7 according to consolidations
for CoreSight replicator and funnel.
- A series from Marek Vasut to update M53Menlo board on various devices
like UART, USB, ethernet PHY, GPIOs etc.
- Enable USBOTG support for imx7ulp and evk board.
- A series from Peter Robinson to update imx6sx-udoo board, switching
to SPDX License Identifier, enabling I2C devices and bluetooth
support.
- Add video capture support for i.MX53 and imx53-smd board.
- Add PXP device for i.MX6UL.
- Other random small updates on various boards.
* tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (46 commits)
ARM: dts: imx7ulp-evk: enable USBOTG1 support
ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support
ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module
ARM: dts: imx7d-zii-rpu2: Drop unused pinmux entries
ARM: dts: imx7d-zii-rpu2: Fix incorrrect 'stdout-path'
ARM: dts: Add support for 96Boards Meerkat96 board
ARM: dts: imx6ul: Add PXP node
ARM: dts: imx6sll: Enable SNVS poweroff according to board design
ARM: dts: imx7s: Enable SNVS power key according to board design
ARM: dts: imx6sll: Enable SNVS power key according to board design
ARM: dts: imx6ul: Enable SNVS power key according to board design
ARM: dts: imx6sx: Enable SNVS power key according to board design
ARM: dts: imx6qdl: Enable SNVS power key according to board design
ARM: dts: imx53: Bind CPLD on M53Menlo
ARM: dts: Introduce the NXP LS1021A-TSN board
ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1
ARM: dts: imx7d: Update cpufreq OPP table
ARM: dts: imx6sx-udoo-neo: add bluetooth config to uart3
ARM: dts: imx6sx-udoo-neo: enable i2c-2 and i2c-4 for onboard sensors
...
Olof Johansson [Tue, 25 Jun 2019 11:48:32 +0000 (04:48 -0700)]
Merge tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.3-rc1
This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.
Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.
* tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
arm64: tegra: Enable PCIe slots in P2972-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
arm64: tegra: Add PEX DPD states as pinctrl properties
arm64: tegra: Enable ACONNECT, ADMA and AGIC
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
arm64: tegra: Sort device tree nodes alphabetically
arm64: tegra: Fix Jetson Nano GPU regulator
arm64: tegra: Update Jetson TX1 GPU regulator timings
arm64: tegra: Fix AGIC register range
arm64: tegra: Add INA3221 channel info for Jetson TX2
arm64: tegra: Enable PWM on Jetson Nano
arm64: tegra: Enable CPU sleep on Jetson Nano
arm64: tegra: Add ID EEPROMs on Jetson Nano
arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX2 module
arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX1 module
arm64: tegra: Don't use architected timer for suspend on Tegra210
arm64: tegra: Mark architected timer as always on
arm64: tegra: Add pin control states for I2C on Tegra186
...
Olof Johansson [Tue, 25 Jun 2019 11:47:55 +0000 (04:47 -0700)]
Merge tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.3, round 1
Highlights:
----------
MPU part:
-Add stm32mp157a-avenger board support:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
, 1024MB of DDR3 and STPMIC1A pmic . Several connections are available on this boards:
2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG, ethernet
10/100/1000, WiFi 5 GHz & 2.4GHz, ...
-Add STMFX support en stm32mp157c-ev1 and enable joystick connected on
it.
-Add I2S and SAI support on stm32mp157c.
-Add and enable support of Vivante GPU on stm32mp157 ED1 and DK1 boards
(EV1 and DK2 inherit of it).
-Add camera support:
-Add DCMI support on stm32mp157c SOC
-Enabled OV5640 camera support on stm32mp157c-ev1 board
-Enable hdmi bridge sii9022 & display controller on stm32mp157c-dk1
board.
MCU part:
-Add STMFX support en stm32746g-eval and enable connections on it:
leds and joystick
* tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (27 commits)
ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boards
ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157A
dt-bindings: arm: stm32: Document Avenger96 devicetree binding
dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schema
ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157
ARM: dts: stm32: add sai id registers to stm32mp157c
ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1
ARM: dts: stm32: enable display on stm32mp157c-dk1 board
ARM: dts: stm32: Add I2C 1 config for stm32mp157a-dk1
ARM: dts: stm32: enable OV5640 camera on stm32mp157c-ev1 board
ARM: dts: stm32: add DCMI pins to stm32mp157c
ARM: dts: stm32: add DCMI camera interface support on stm32mp157c
ARM: dts: stm32: enable Vivante GPU support on stm32mp157a-dk1 board
ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 board
ARM: dts: stm32: Add Vivante GPU support on STM32MP157c
ARM: dts: stm32: add i2s pins muxing on stm32mp157
ARM: dts: stm32: add i2s support on stm32mp157c
ARM: dts: stm32: add sai pins muxing on stm32mp157
ARM: dts: stm32: add sai support on stm32mp157c
ARM: dts: stm32: add jedec compatible for nor flash on stm32mp157c-ev1
...
* R-Car D3 (r8a77995) based Draak board:
- Remove unnecessary index from vin4 port
* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
- Initial support
- Describe CPU capacity and topoligy
- Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
* RZ/G2E (r8a774c0) SoC based EK874 board:
- Clean up CPU compatible strings
- Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
* tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits)
arm64: dts: renesas: hihope-common: Remove "label" from LEDs
arm64: dts: renesas: hihope-common: Add HDMI support
arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
arm64: dts: renesas: hihope-common: Add LEDs support
arm64: dts: renesas: hihope-common: Enable USB3.0
arm64: dts: renesas: hihope-common: Add USB 2.0 support
arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
arm64: dts: renesas: r8a774a1: Add TMU device nodes
arm64: dts: renesas: r8a774a1: Add CMT device nodes
arm64: dts: renesas: hihope-common: Add uSD and eMMC
arm64: dts: renesas: r8a77990: Fix register range of display node
arm64: dts: renesas: cat874: Enable usb role switch support
arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node
arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1
arm64: dts: renesas: hihope-common: Add RWDT support
arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
...
Olof Johansson [Tue, 25 Jun 2019 11:42:05 +0000 (04:42 -0700)]
Merge tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.
* tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array
Olof Johansson [Tue, 25 Jun 2019 11:41:39 +0000 (04:41 -0700)]
Merge tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of arm64 DT changes, this time with:
- Some fixes for the DT schemas that were added during this release
- Wifi support for the H6
- LRADC suppport for the A64
- Some background work on A64 boards, to enable various devices such
as touchscreens, PMIC, audio, wifi, etc.
* tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Add DMA node
arm64: dts: allwinner: a64: Add lradc node
dt-bindings: input: sun4i-lradc-keys: Add A64 compatible
arm64: dts: allwinner: h6: add r_watchog node
arm64: dts: allwinner: h6: add watchdog node
dt-bindings: watchdog: add Allwinner H6 watchdog
arm64: dts: allwinner: a64: Enable audio on Teres-I
arm64: dts: allwinner: a64: bananapi-m64: Enable PMIC USB power supply
arm64: dts: allwinner: axp803: add USB power supply node
arm64: dts: allwinner: a64: Add pinmux for RGB666 LCD
arm64: dts: allwinner: a64: orangepi-win: Add wifi and bluetooth nodes
arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64
arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
arm64: dts: allwinner: a64-amarula-relic: Add GT5663 CTP node
arm64: dts: allwinner: a64: move I2C pinctrl to dtsi
Olof Johansson [Tue, 25 Jun 2019 11:40:52 +0000 (04:40 -0700)]
Merge tag 'sunxi-dt-for-5.3-201906210807' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches:
- Some work on the BPi M2-Berry to support various devices
- Convert some bindings to a schema, and a lot of fixes reported by
the schemas we introduced.
- A few other fixes here and there
* tag 'sunxi-dt-for-5.3-201906210807' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
dt-bindings: pwm: Convert Allwinner PWM to a schema
ARM: dts: sun8i: r40: Change the RTC compatible
ARM: dts: sun8i: v3s: Add external crystals accuracy
ARM: dts: sun8i: v3s: Fix the RTC node
ARM: dts: sun6i: Add external crystals accuracy
ARM: dts: sun6i: Fix RTC node
ARM: dts: sun8i: a83t: Add device node for CSI (Camera Sensor Interface)
ARM: dts: gr8-evb: Fix RTC vendor
ARM: dts: sun7i: icnova-swac: Fix the model vendor
ARM: dts: sun8i: a711: Change LRADC node names to avoid warnings
ARM: dts: sun7i: olimex-lime2: Enable ac and power supplies
ARM: dts: sun6i: Add default address and size cells for SPI
ARM: dts: sun8i-h3: Fix wifi in Beelink X2 DT
dt-bindings: bus: Convert Allwinner RSB to a schema
ARM: dts: sun8i: r40: bananapi-m2-ultra: Remove regulator-always-on
ARM: dts: sun8i: v40: bananapi-m2-berry: Add Bluetooth device node
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable AHCI
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable HDMI output
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controller
ARM: dts: sun8i: v40: bananapi-m2-berry: Add GPIO pin-bank regulator supplies
...
Olof Johansson [Tue, 25 Jun 2019 11:32:08 +0000 (04:32 -0700)]
Merge tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm Device Tree Changes for v5.3
* Add display support to MSM8974
* Add display, backlight, and touchscreen support to MSM8974 Hammerhead
* Update coresight bindings for MSM8974 and APQ8064
* tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: msm8974-hammerhead: add support for display
ARM: dts: msm8974: add display support
ARM: dts: qcom: msm8974-hammerhead: add support for backlight
ARM: dts: qcom: msm8974-hammerhead: add touchscreen support
ARM: dts: qcom-msm8974: Update coresight DT bindings
ARM: dts: qcom-apq8064: Update coresight DT bindings
Olof Johansson [Tue, 25 Jun 2019 11:31:37 +0000 (04:31 -0700)]
Merge tag 'qcom-arm64-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 Updates for v5.3
* Switch to use second gen PON on PM8998
* Add PSCI cupidle states for MSM8996, MSM8998,and SDM845
* Add MSM8996 UFS phy reset controller
* Add propre cpu capacity scaling on MSM8996
* Fixups for APR domain, legacy clocks, and PSCI entry latency on MSM8996
* Enable SMMUs on MSM8996
* Add Dragonboard 845C
* Add Q6V5, GPU, GMU, and AOSS QMP node on SDM845
* Fixup CPU topology on SDM845
* Change USB1 to be peripheral on SDM845 MTP
* Add PCIe Phy, RC nodes, ANOC1 SMMU, and RPMPD node on MSM8998
* Update coresight bindings for MSM8916
* Update idle state names and entry-method on MSM8916
* Add PCIe, RPMPD, LPASS, Q6, TCSR, TuringCC, PSCI cpuidle states,
and CDSP on QCS404
* Add reset-cells property to QCS404 GCC node
* Fixup s3 max voltage, l3 min voltage, drive strength typo, and
s3 supply definition on QCS404-evb
* Fixup ADC outputs and VADC calibration on PMS405
Olof Johansson [Tue, 25 Jun 2019 11:15:53 +0000 (04:15 -0700)]
Merge tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contain Broadcom ARM-based SoCs Device Tree changes
for 5.3 please pull the following:
- Lukas enables DMA support for the BCM2835 (Raspberry Pi) SPI
controller
- Florian fixes a number of dtc W=1 warnings in the Broadcom DTS files
and provides a fix for devices failing to boot after the removal of
skelton.dtsi (that commit has been submitted as a separate fix)
* tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Fix most DTC W=1 warnings
ARM: dts: NSP: Fix the bulk of W=1 DTC warnings
ARM: dts: BCM63xx: Fix DTC W=1 warnings
ARM: dts: BCM53573: Fix DTC W=1 warnings
ARM: dts: bcm-mobile: Fix most DTC W=1 warnings
ARM: dts: Cygnus: Fix most DTC W=1 warnings
ARM: dts: Fix BCM7445 DTC warnings
ARM: bcm283x: Enable DMA support for SPI controller
ARM: dts: bcm: Add missing device_type = "memory" property
ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support
The patch adds the following interfaces according the SMARC Spec 1.1
[1] and provided schematics:
- SMARC SPI0/1
Note: Since Kontron still uses silicon revisions below 1.3 they have
add a spi-nor to implement Workaround #1 of erratum ERR006282.
- SMARC SDIO
- SMARC LCD
- SMARC HDMI
- SMARC Management pins
Note: Kontron don't route all of these pins to the i.MX6, some are
routed to the SoM CPLD.
- SMARC GPIO
- SMARC CSI Camera
Note: As specified in [1] the data lanes are shared to cover the
csi and the parallel case. The case depends on the baseboard so
muxing the data lanes is not part of this patch.
- SMARC I2S
- SMARC Watchdog
Note: The watchdog output pin is routed to the CPLD and the SMARC
header. The CPLD performs a reset after a 30s timeout so we
need to enable the watchdog per default.
- SMARC module eeprom
Due to the lack of hardware not all of these interfaces are tesetd.
[1] https://sget.org/standards/smarc
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Florian Fainelli [Tue, 28 May 2019 23:01:28 +0000 (16:01 -0700)]
ARM: dts: Fix BCM7445 DTC warnings
Fixes a number of unit_address_vs_reg warnings:
DTC arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb
arch/arm/boot/dts/bcm7445.dtsi:66.6-225.4: Warning (unit_address_vs_reg): /rdb: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445.dtsi:227.21-298.4: Warning (unit_address_vs_reg): /memory_controllers: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts:9.9-14.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445.dtsi:255.10-275.5: Warning (simple_bus_reg): /memory_controllers/memc@1: simple-bus unit address format error, expected "80000"
arch/arm/boot/dts/bcm7445.dtsi:277.10-297.5: Warning (simple_bus_reg): /memory_controllers/memc@2: simple-bus unit address format error, expected "100000"
Lukas Wunner [Thu, 9 May 2019 17:03:00 +0000 (19:03 +0200)]
ARM: bcm283x: Enable DMA support for SPI controller
Without this, the driver for the BCM2835 SPI controller uses interrupt
mode instead of DMA mode, incurring a significant performance penalty.
The Foundation's device tree has had these attributes for years, but for
some reason they were never upstreamed.
They were originally contributed by Noralf Trønnes and Martin Sperl:
https://github.com/raspberrypi/linux/commit/25f3e064afc8
https://github.com/raspberrypi/linux/commit/e0edb52b47e6
The DREQ numbers 6 and 7 are documented in section 4.2.1.3 of:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Noralf Trønnes <noralf@tronnes.org>
Michael Mei [Mon, 27 May 2019 09:04:47 +0000 (17:04 +0800)]
arm64: dts: mt8183: add efuse and Mediatek Chip id node to read
support for reading chip ID and efuse
Signed-off-by: Michael Mei <michael.mei@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boards
On disco and eval board, Tx and Rx delay are applied (pull-up of 4.7k
put on VDD) so which correspond to RGMII-ID mode with internal RX and TX
delays provided by the PHY, the MAC should not add the RX or TX delays
in this case
ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157A
Add devicetree support for Avenger96 board based on STM32MP157A MPU
from ST Micro. This board is one of the 96Boards Consumer Edition board
from Arrow Electronics and has the following features:
Vidya Sagar [Wed, 12 Jun 2019 09:53:36 +0000 (15:23 +0530)]
arm64: tegra: Enable PCIe slots in P2972-0000 board
Enable PCIe controller nodes to enable respective PCIe slots on
P2972-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot
Vidya Sagar [Wed, 12 Jun 2019 09:53:35 +0000 (15:23 +0530)]
arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra194 SoC contains six PCIe controllers and twenty P2U instances
grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us)
and NVIDIA High Speed (NVHS-8 P2Us) respectively.
arm64: tegra: Add PEX DPD states as pinctrl properties
Add PEX deep power down states as pinctrl properties to set in PCIe driver.
In Tegra210, BIAS pads are not in power down mode when clamps are applied.
To set the pads in DPD, pass the PEX DPD states as pinctrl properties to
PCIe driver.
Ben Ho [Mon, 27 May 2019 09:04:42 +0000 (17:04 +0800)]
arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho <Ben.Ho@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fabrizio Castro [Mon, 3 Jun 2019 09:53:52 +0000 (10:53 +0100)]
ARM: dts: iwg23s-sbc: Fix SDHI2 VccQ regulator
SDR50 isn't working anymore because the GPIO regulator
driver is using descriptors since
commit d6cd33ad7102 ("regulator: gpio: Convert to use descriptors")
which in turn causes the system to use the polarity of the
GPIOs (as specified in the DT) for selecting the states,
but the polarity specified in the DT is wrong.
This patch fixes the regulator DT definition, and that fixes
SDR50.
Fixes: 9eb36b945b5c ("ARM: dts: iwg23s-sbc: Add uSD and eMMC support") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SDR50 isn't working anymore because the GPIO regulator
driver is using descriptors since
commit d6cd33ad7102 ("regulator: gpio: Convert to use descriptors")
which in turn causes the system to use the polarity of the
GPIOs (as specified in the DT) for selecting the states,
but the polarity specified in the DT is wrong.
This patch fixes the regulator DT definition, and that fixes
SDR50.
Chris Brandt [Tue, 4 Jun 2019 20:09:13 +0000 (15:09 -0500)]
ARM: dts: r7s9210: Add IRQC device node
Enable support for the IRQC on RZ/A2M, which is a small front-end to the
GIC. This allows to use up to 8 external interrupts with configurable
sense select.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Yoshihiro Kaneko [Fri, 17 May 2019 14:43:07 +0000 (23:43 +0900)]
ARM: dts: rza2mevb: sort nodes of rza2mevb board
This patch sorts the nodes of arch/arm/boot/dts/r7s9210-rza2mevb.dts.
* Sort subnodes of root ("/") node alphabetically
* Sort following top-level nodes alphabetically
* Sort subnodes of pinctrl alphabetically
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
[simon: rebase and sort new ehci nodes] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: dts: meson: switch to the generic Ethernet PHY reset bindings
The snps,reset-gpio bindings are deprecated in favour of the generic
"Ethernet PHY reset" bindings.
Replace snps,reset-gpio from the ðmac node with reset-gpios in the
ethernet-phy node. The old snps,reset-active-low property is now encoded
directly as GPIO flag inside the reset-gpios property.
snps,reset-delays-us is converted to reset-assert-us and
reset-deassert-us. reset-assert-us is the second cell from
snps,reset-delays-us while reset-deassert-us was the third cell.
Instead of blindly copying the old values (which seems strange since
they gave the PHY one second to come out of reset) over this also
updates the delays based on the datasheets:
- RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert
delay (the datasheet mentions: "For a complete PHY reset, this pin
must be asserted low for at least 10ms") and a 30ms deassert delay
(the datasheet mentions: "Wait for a further 30ms (for internal
circuits settling time) before accessing the PHY register"). The
old settings used 10ms for assert and 1000ms for deassert.
- IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the
datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert
delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock
output ready after reset released | 10ms")). The old settings used
10ms for assert and 1000ms for deassert.
No functional changes intended.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Jon Hunter [Thu, 20 Jun 2019 08:17:02 +0000 (09:17 +0100)]
arm64: tegra: Fix Jetson Nano GPU regulator
There are a few issues with the GPU regulator defined for Jetson Nano
which are:
1. The GPU regulator is a PWM based regulator and not a fixed voltage
regulator.
2. The output voltages for the GPU regulator are not correct.
3. The regulator enable ramp delay is too short for the regulator and
needs to be increased. 2ms should be sufficient.
4. This is the same regulator used on Jetson TX1 and so make the ramp
delay and settling time the same as Jetson TX1.
The GPU regulator enable ramp delay for Jetson TX1 is set to 1ms which
not sufficient because the enable ramp delay has been measured to be
greater than 1ms. Furthermore, the downstream kernels released by NVIDIA
for Jetson TX1 are using a enable ramp delay 2ms and a settling delay of
160us. Update the GPU regulator enable ramp delay for Jetson TX1 to be
2ms and add a settling delay of 160us.
Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Fixes: 5e6b9a89afce ("arm64: tegra: Add VDD_GPU regulator to Jetson TX1") Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Thu, 20 Jun 2019 08:17:00 +0000 (09:17 +0100)]
arm64: tegra: Fix AGIC register range
The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
controller. Per the ARM GIC device-tree binding, the first address
region is for the GIC distributor registers and the second address
region is for the GIC CPU interface registers. The address space for
the distributor registers is 4kB, but currently this is incorrectly
defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
registers. Correct the address space for the distributor to be 4kB.
Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Fixes: bcdbde433542 ("arm64: tegra: Add AGIC node for Tegra210") Signed-off-by: Thierry Reding <treding@nvidia.com>
Nicolin Chen [Mon, 17 Jun 2019 22:16:59 +0000 (15:16 -0700)]
arm64: tegra: Add INA3221 channel info for Jetson TX2
There are four INA3221 chips on the Jetson TX2 (p3310 + p2771).
And each INA3221 chip has three input channels to monitor power.
So this patch adds these 12 channels to the DT of Jetson TX2, by
following the DT binding of INA3221 and official documents from
https://developer.nvidia.com/embedded/downloads
Eddie James [Tue, 2 Apr 2019 02:42:29 +0000 (02:42 +0000)]
ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
Enable the video engine and add it's optional reserved memory region.
Use 32MB for the reserved memory since the video engine could need up to
two 1920x1200@32bpp source buffers.
Source buffers: 2 * 1920 * 1200 * 4 = 18432000 bytes
In addition, the V4L2 subsystem will allocate any number of compression
buffers, each at most 1/8th the size of the source buffer.
Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
John Wang [Thu, 13 Jun 2019 07:00:02 +0000 (15:00 +0800)]
ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
The fp5280g2 is an OpenPower server platform with an ASPEED AST2500 BMC.
Signed-off-by: John Wang <wangzqbj@inspur.com> Reviewed-by: Lei YU <mine260309@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line
X96 Max has the PHY reset and interrupt lines are identical to the
Odroid-N2:
- GPIOZ_14 is the interrupt on X96 Max
- GPIOZ_15 is the reset line on X96 Max
Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to
poll for the PHY status.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt line
The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad.
Describe this in the device tree so the PHY framework doesn't have to
poll the PHY status.
Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line
The reset line of the RTL8211F PHY is routed to the GPIOZ_15 pad.
Describe this in the device tree so the PHY framework can bring the PHY
into a known state when initializing it. GPIOZ_15 doesn't support
driving the output HIGH (to take the PHY out of reset, only output LOW
to reset the PHY is supported). The datasheet states it's an "3.3V input
tolerant open drain (OD) output pin". Instead there's a pull-up resistor
on the board to take the PHY out of reset. The GPIO itself will be set
to INPUT mode to take the PHY out of reset and LOW to reset the PHY,
which is achieved with the flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN).
Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings
The snps,reset-gpio bindings are deprecated in favour of the generic
"Ethernet PHY reset" bindings.
Replace snps,reset-gpio from the ðmac node with reset-gpios in the
ethernet-phy node. The old snps,reset-active-low property is now encoded
directly as GPIO flag inside the reset-gpios property.
snps,reset-delays-us is converted to reset-assert-us and
reset-deassert-us. reset-assert-us is the second cell from
snps,reset-delays-us while reset-deassert-us was the third cell.
Instead of blindly copying the old values (which seems strange since
they gave the PHY one second to come out of reset) over this also
updates the delays based on the datasheets:
- the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet
mentions: "For a complete PHY reset, this pin must be asserted low
for at least 10ms") and a 30ms deassert delay (the datasheet
mentions: "Wait for a further 30ms (for internal circuits settling
time) before accessing the PHY register". This applies to the
following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95
variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox
A1, GXM Q200, GXM RBox Pro boards.
- the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet
mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms
as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock
output ready after reset released | 10ms"). This applies to the GXBB
Nexbox A95X board.
- the Micrel KSZ9031 seems to require a 100us delay but use the same
(seemingly safe) values from RTL8211F due to lack of a board to verify
this. This applies to the GXBB P200 board.
The GXBB P201 board is left out from this conversion because it doesn't
have a dedicated PHY node (because it's not clear which PHY is used on
that board).
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line
The Odroid-N2 schematics show that the following pins are used for the
reset and interrupt lines:
- GPIOZ_14 is the PHY interrupt line
- GPIOZ_15 is the PHY reset line
The GPIOZ_14 and GPIOZ_15 pins are special. The datasheet describes that
they are "3.3V input tolerant open drain (OD) output pins". This means
the GPIO controller can drive the output LOW to reset the PHY. To
release the reset it can only switch the pin to input mode. The output
cannot be driven HIGH for these pins.
This requires configuring the reset line as GPIO_OPEN_DRAIN because
otherwise the PHY will be stuck in "reset" state (because driving the
pin HIGH seems to result in the same signal as driving it LOW).
The reset line works together with a pull-up resistor (R143 in the
Odroid-N2 schematics). The SoC can drive GPIOZ_14 LOW to assert the PHY
reset. However, since the SoC can't drive the pin HIGH (to release the
reset) we switch the mode to INPUT and let the pull-up resistor take
care of driving the reset line HIGH.
Switch to GPIOZ_15 for the PHY reset line instead of using GPIOZ_14
(which actually is the interrupt line).
Move from the "snps" specific resets to the MDIO framework's
reset-gpios because only the latter honors the GPIO flags.
Use the GPIO flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN) to match with
the pull-up resistor because this will:
- drive the output LOW to reset the PHY (= active low)
- switch the pin to INPUT mode so the pull-up will take the PHY out of
reset
Fixes: 51d116557b2044 ("arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Olof Johansson [Wed, 19 Jun 2019 16:03:38 +0000 (09:03 -0700)]
Merge tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC family changes for 5.3
- Add support for the new J721e SoC, includes basic peripherals needed for
booting up the device
- New peripheral support added for AM654x:
* TI SCI irqchip
* GPIO
* MCU SRAM
* R5Fs
* MSMC RAM
* SERDES and PCIe
* tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: (26 commits)
arm64: dts: ti: k3-j721e: Add the MCU SRAM node
arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
arm64: defconfig: Enable TI's J721E SoC platform
arm64: dts: ti: Add support for J721E Common Processor Board
soc: ti: Add Support for J721E SoC config option
arm64: dts: ti: Add Support for J721E SoC
dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller
dt-bindings: arm: ti: Add bindings for J721E SoC
arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
arm64: dts: k3-am6: Add PCIe Endpoint DT node
arm64: dts: k3-am6: Add PCIe Root Complex DT node
arm64: dts: k3-am6: Add SERDES DT node
arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its
arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node
arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes
arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node
arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes
...