Harry Wentland [Thu, 27 Jul 2017 13:55:38 +0000 (09:55 -0400)]
drm/amd/display: Rename more dc_surface stuff to plane_state
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Fri, 28 Jul 2017 17:08:03 +0000 (13:08 -0400)]
drm/amd/display: move regamma from opp to dpp for dce
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Avoid full modeset when not required
Fix IGT test case (kms_atomic_transition)
-DRM sets the mode_changed flag, while we don't need to do a full
modeset.
-We want to override the mode_changed flag in this case
If we don't do this, we will still bypass the modeset in DC. This will
fail to update the new stream_status, causing nullptr at a later stage
when trying to access stream_status"
We now avoid this by discarding the new_stream instead of partially
filling it.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: fix >340 Mhz with deep color pipe split no display
the input to HW formula needs to take care the deep color.
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 28 Jul 2017 19:33:38 +0000 (15:33 -0400)]
drm/amd/display: Keep blank until set visibility to true after mode switch
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Fri, 28 Jul 2017 00:00:06 +0000 (20:00 -0400)]
drm/amd/display: Initial prototype of FBC implementation
- Protected by ENABLE_FBC compile flag
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Thu, 27 Jul 2017 23:53:55 +0000 (19:53 -0400)]
drm/amd/display: Initial prototype of FBC implementation
- Protected by ENABLE_FBC compile flag
- DC part will follow
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fix for DCN compiler errors caused due to various submits
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Tue, 25 Jul 2017 20:45:18 +0000 (16:45 -0400)]
drm/amd/display: move ocsc programming from opp to dpp for dce
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 27 Jul 2017 01:03:22 +0000 (21:03 -0400)]
drm/amd/display: Fix ckeckpatch problems in amdgpu_dm
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 10 Aug 2017 17:29:07 +0000 (13:29 -0400)]
drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm
This separation stopped making sense a long time ago.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 26 Jul 2017 23:31:53 +0000 (19:31 -0400)]
drm/amd/display: Rename firmware_info to dc_firmware_info
This is to avoid conflicts with amdgpu's firmware_info once we
merge amdgpu_dm_types with amdgpu_dm.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 26 Jul 2017 22:31:25 +0000 (18:31 -0400)]
drm/amd/display: update clocks we report to PPlib
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 26 Jul 2017 20:27:37 +0000 (16:27 -0400)]
drm/amd/display: add detect caps for edp
1. The caps detect sequence for edp is different from dp.
Added separate function for edp.
2. Removed max_link_setting and replaced it with verified
to avoid confusion.
3. Reverted sink count guard for edp powerdown as unnecessary
with the changes above.
Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 26 Jul 2017 18:42:38 +0000 (14:42 -0400)]
drm/amd/display: safeguard compressor api
Only call compressor api if it's available.
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 26 Jul 2017 20:15:26 +0000 (16:15 -0400)]
drm/amd/display: reduce 40s time out to 1s in disable crtc
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Wed, 26 Jul 2017 20:13:48 +0000 (16:13 -0400)]
drm/amd/display: Roll stream into dc_stream
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Wed, 26 Jul 2017 00:51:26 +0000 (20:51 -0400)]
drm/amd/display: Roll core_stream into dc_stream
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 26 Jul 2017 02:52:45 +0000 (22:52 -0400)]
drm/amd/display: log HUBP using DTN logging
also simplify DTN INFO. all we need is a way to have DC log register states
some where we can compare with golden. going through connectivity is overkill.
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 25 Jul 2017 21:11:26 +0000 (17:11 -0400)]
drm/amd/display: Disable timestamp and entry heading
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 24 Jul 2017 18:04:27 +0000 (14:04 -0400)]
drm/amd/display: Minor fix for dc_sink refactor
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Tue, 25 Jul 2017 19:14:24 +0000 (15:14 -0400)]
drm/amd/display: Clean up some DCN1 guards
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Tue, 25 Jul 2017 20:02:33 +0000 (16:02 -0400)]
drm/amd/display: move ocsc programming from opp to dpp
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Tue, 25 Jul 2017 18:50:44 +0000 (14:50 -0400)]
drm/amd/display: Fix eDP panel light-up
Power-down panel on disale only if sink exists
otherwise it fails edid read during init sequence
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Mon, 24 Jul 2017 14:47:02 +0000 (10:47 -0400)]
drm/amd/display: break up plane disable and disconnect in set mode
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 23 Jul 2017 19:22:47 +0000 (15:22 -0400)]
drm/amd/display: separate plane disable sequence
- disconnect: trigger hw to disconnect plane on next vsync
- disable: disables HW block and disable clocks
- power_down: kill power
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Tue, 25 Jul 2017 01:41:28 +0000 (21:41 -0400)]
drm/amd/display: single PSR display not allow CSTATE sw w/a
Description:
HW issue when all the pipes are off, DCE_allow_cstate is 0.
New sequence : blank OTG only instead of previous OTG_master_en=0)
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 24 Jul 2017 19:30:17 +0000 (15:30 -0400)]
drm/amd/display: Roll core_gamma into dc_gamma
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 24 Jul 2017 19:20:50 +0000 (15:20 -0400)]
drm/amd/display: Roll gamma struct into core_gamma
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 24 Jul 2017 18:04:27 +0000 (14:04 -0400)]
drm/amd/display: Roll core_sink into dc_sink
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 24 Jul 2017 17:55:26 +0000 (13:55 -0400)]
drm/amd/display: Roll sink struct into core_sink
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Sun, 23 Jul 2017 00:05:20 +0000 (20:05 -0400)]
drm/amd/display: Roll core_link into dc_link
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 20 Jul 2017 15:43:32 +0000 (11:43 -0400)]
drm/amd/display: Roll core_surface into dc_surface
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Sun, 23 Jul 2017 22:30:15 +0000 (18:30 -0400)]
drm/amd/display: Move DCHUBBUB block from MemInput to HW sequencer.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Sun, 23 Jul 2017 16:13:37 +0000 (12:13 -0400)]
drm/amd/display: move RGAM programming from opp to dpp
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Sun, 23 Jul 2017 20:45:45 +0000 (16:45 -0400)]
drm/amd/display: fix YCbCr420 deep color mode not supported
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Mon, 24 Jul 2017 15:18:29 +0000 (11:18 -0400)]
drm/amd/display: add missing func for dce11o to avoid crash
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 23 Jul 2017 01:58:08 +0000 (21:58 -0400)]
drm/amd/display: move ocsc programming from opp to dpp
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yuehin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Sun, 23 Jul 2017 19:18:57 +0000 (15:18 -0400)]
drm/amd/display: add idle wait for passive surface update and modeset
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Sun, 23 Jul 2017 18:17:09 +0000 (14:17 -0400)]
drm/amd/display: Fix generic_reg_wait 1000ms case
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 13 Jul 2017 02:35:52 +0000 (22:35 -0400)]
drm/amd/display: move VGA to HWSS from TG
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Tue, 18 Jul 2017 21:18:11 +0000 (17:18 -0400)]
drm/amd/display: fix decide_link_settings
Signed-off-by: Ding Wang <Ding.Wang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 20 Jul 2017 14:26:23 +0000 (10:26 -0400)]
drm/amd/display: Roll surface struct into core_surface
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Thu, 20 Jul 2017 23:04:56 +0000 (19:04 -0400)]
drm/amd/display: Implement logic for hdmi info packet bits.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Thu, 20 Jul 2017 20:17:17 +0000 (16:17 -0400)]
drm/amd/display: fix locking in apply_ctx_for_surface
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 20 Jul 2017 00:22:22 +0000 (20:22 -0400)]
drm/amd/display: mpcc disconnect and pipe pg in multi-display
still quite hacky. but this address not properly shutdown pipe video underlay
+ enable another display case, as well as mode changes with video overlay.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 14 Jul 2017 18:07:16 +0000 (14:07 -0400)]
drm/amd/display: mpo debug sanity checks
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
remove redundant DPP_CLOCK_ENABLE in ipp. clock programmed by HWSS
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 19 Jul 2017 20:59:14 +0000 (16:59 -0400)]
drm/amd/display: fix index and union overwrite in compressor
Fixing 2 bugs in compressor:
- array out of bounds due to incorrect index
- compressor options always 0 due to union overwrite
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Wed, 19 Jul 2017 17:18:26 +0000 (13:18 -0400)]
drm/amd/display: Return hpd_irq_dpcd from hpd_rx handler
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Wed, 19 Jul 2017 20:46:42 +0000 (16:46 -0400)]
drm/amd/display: Set i2c speed to 100khz for DCE11.2 and later.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 18 Jul 2017 22:33:23 +0000 (18:33 -0400)]
drm/amd/display: Do not release state objects on atomic check fail
In any drm ioctl call, drm_atomic_state_clear() is called at the end to
destroy the states; even if atomic check fails. Therefore, releasing
states on atomic check failure is incorrect.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Tue, 18 Jul 2017 19:50:47 +0000 (15:50 -0400)]
drm/amd/display: powergate fe of reused pipes to reset ttu
When we exit MPO, disconnected pipes cannot be immediately powergated
because registers are double buffered, and actual disconnection does
not happen until VUPDATE. So it is differred for many flips.
However in the case of exiting full screen, the transition from MPO
to grph only back to MPO is very fast and also involves increasing of
watermarks. Since the underlay pipe is never powergated in this
scenario, it keeps its old TTU counter, which causes allowPstateSwitch
signal to be de-asserted when compared to the new increased watermark.
Since the new pipe is not enabled yet, the signal will be continously
de-asserted and hangs SMU, who's waiting for the signal to do pstate
switching.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Tue, 18 Jul 2017 14:21:43 +0000 (10:21 -0400)]
drm/amd/display: Add regkey for DRR control for internal panel
Also need to change default to off
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 14 Jul 2017 17:42:23 +0000 (13:42 -0400)]
drm/amd/display: revert order change of HUBP and MPC disable
- root cause was we disable opp clk in MPC disconnect
- hubp_blank is not double buffered, so we can't blank until MPC disconnect or we have risk of underflow
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Mon, 17 Jul 2017 14:22:05 +0000 (10:22 -0400)]
drm/amd/display: properly turn off unused mpc before front end programming
MPCC_OPP_ID must be programmed to 0xf to properly turn off the mpcc.
However the software state of the mpcc must keep track of the opp that
the mpcc is attached to for reset to properly happen. This is kinda
hacky right now, but a good solution may involve a lot of work.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Thu, 13 Jul 2017 16:09:57 +0000 (12:09 -0400)]
drm/amd/display: link training fallback actions
Signed-off-by: Ding Wang <ding.wang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 12 Jul 2017 22:38:04 +0000 (18:38 -0400)]
drm/amd/display: fix mpo exit hang
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 13:00:14 +0000 (09:00 -0400)]
drm/amd/display: ensure OTG is locked before proceeding
also remove tg lock at init_hw as not all OTG is running
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 12 Jul 2017 19:49:46 +0000 (15:49 -0400)]
drm/amd/display: fix 4k@30 with 10bit deep color and avi for BT2020
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 15:54:10 +0000 (11:54 -0400)]
drm/amd/display: avoid disabling opp clk before hubp is blanked.
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 13:02:54 +0000 (09:02 -0400)]
drm/amd/display: change order of HUBP and MPC disable according to HW guide
blank hubp first before disconnect MPC
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Wu [Wed, 12 Jul 2017 06:25:52 +0000 (14:25 +0800)]
drm/amd/display: Fix eDP power isn't off when lid close
Signed-off-by: John Wu <john.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Release dm_state->context when state is cleared.
Handling a use case of TEST_ONLY request from DRM where commit is
not goiing to be called. We need to release the allocated dc_validate_context
in this case.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Skip DC validation for flips and cursor.
Nothing to validate in DC in this case. Skip it.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>