Linus Torvalds [Sun, 21 Feb 2021 03:06:34 +0000 (19:06 -0800)]
Merge tag 'ras_updates_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull RAS updates from Borislav Petkov:
- move therm_throt.c to the thermal framework, where it belongs.
- identify CPUs which miss to enter the broadcast handler, as an
additional debugging aid.
* tag 'ras_updates_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
thermal: Move therm_throt there from x86/mce
x86/mce: Get rid of mcheck_intel_therm_init()
x86/mce: Make mce_timed_out() identify holdout CPUs
Linus Torvalds [Sun, 21 Feb 2021 03:02:28 +0000 (19:02 -0800)]
Merge tag 'edac_updates_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
- a couple of fixes/improvements to amd64_edac:
* merge debugging and error injection functionality into the main driver
* tone down info/error output
* do not attempt to load it on F15h client hw
- misc fixes to other drivers
* tag 'edac_updates_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/amd64: Issue probing messages only on properly detected hardware
EDAC/xgene: Do not print a failure message to get an IRQ twice
EDAC/ppc4xx: Convert comma to semicolon
EDAC/amd64: Limit error injection functionality to supported hw
EDAC/amd64: Merge error injection sysfs facilities
EDAC/amd64: Merge sysfs debugging attributes setup code
EDAC/amd64: Tone down messages about missing PCI IDs
EDAC/amd64: Do not load on family 0x15, model 0x13
Linus Torvalds [Sun, 21 Feb 2021 02:42:28 +0000 (18:42 -0800)]
Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Updates for SoC specific drivers include a few subsystems that have
their own maintainers but send them through the soc tree:
SCMI firmware:
- add support for a completion interrupt
Reset controllers:
- new driver for BCM4908
- new devm_reset_control_get_optional_exclusive_released() function
Memory controllers:
- Renesas RZ/G2 support
- Tegra124 interconnect support
- Allow more drivers to be loadable modules
TEE/optee firmware:
- minor code cleanup
The other half of this is SoC specific drivers that do not belong into
any other subsystem, most of them living in drivers/soc:
- Allwinner/sunxi power management work
- Allwinner H616 support
Linus Torvalds [Sun, 21 Feb 2021 02:34:53 +0000 (18:34 -0800)]
Merge tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"After the last release contained a surprising amount of new 32-bit
machines, this time two thirds of the code changes are for 64-bit.
The usual updates to existing files include:
- Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA,
nomadik, stm32, Allwinner, TI Keystone
- Support for additional devices on existing machines on Renesas,
SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom,
ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic,
Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba
- Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung,
stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm,
i.MX, Rockchip, ASpeed, Zynq
Only three new SoCs this time, but a number of boards across:
Renesas:
- Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based)
Rockchip:
- NanoPi M4B Single-board computer (RK3399)
- Radxa Rock Pi E router SBC (RK3328)
ASpeed:
- Ampere Mt. Jade, a BMC for an x86 server (AST2500)
- IBM Everest, a BMC for a Power10 server (AST2600)
- Supermicro x11spi, a BMC for an ARM server (AST2500)
Linus Torvalds [Sun, 21 Feb 2021 02:23:15 +0000 (18:23 -0800)]
Merge tag 'arm-defconfig-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC defconfig updates from Arnd Bergmann:
"As usual, a number of additional device drivers that were added to the
kernel are now enabled in the respective configuration files.
A few of the files get updated to match the current Kconfig files for
removed or renamed options"
* tag 'arm-defconfig-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (50 commits)
ARM: configs: sama5_defconfig: add QSPI driver
ARM: configs: at91_dt_defconfig: add ov7740 module
ARM: configs: at91_dt_defconfig: add useful helper options
ARM: configs: at91: DT/ATAG defconfig modifications
ARM: configs: sama5_defconfig: update and remove unneeded options
ARM: configs: at91: enable drivers for sam9x60
arm64: defconfig: Enable RT5659
arm64: configs: Support DEVAPC on MediaTek platforms
arm64: configs: Support pwrap on Mediatek MT6779 platform
arm64: defconfig: Enable PF8x00 as builtin
ARM: multi_v7_defconfig: add STM32 CEC support
arm64: defconfig: Enable vibra-pwm
ARM: omap2plus_defconfig: Update for dropped options
ARM: omap2plus_defconfig: Update for moved options
ARM: multi_v7_defconfig: Enable nvmem's rmem driver
arm64: defconfig: Enable nvmem's rmem driver
ARM: multi_v7_defconfig: Enable support for the ADC thermal sensor
ARM: qcom_defconfig: Enable Command DB driver
ARM: qcom_defconfig: Enable RPMh power domain driver
ARM: qcom_defconfig: Enable ARM PSCI support
...
Linus Torvalds [Sun, 21 Feb 2021 02:20:06 +0000 (18:20 -0800)]
Merge tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"This is mostly 32-bit code for SoC platforms, and looks smaller than
any such branch I remember from previous kernels, as most of this is
now handled in other subsystems for modern platforms:
- Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
Renesas, and Samsung
- Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
- Samsung SoC driver updates to make them loadable modules"
* tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: arm: samsung: include S3C headers in platform entry
MAINTAINERS: Add linux-actions ML for Actions Semi Arch
ARM: s3c: irq-s3c24xx: staticize local functions
ARM: s3c: irq-s3c24xx: include headers for missing declarations
ARM: s3c: fix fiq for clang IAS
ARM: imx: Remove unused IMX_GPIO_NR() macro
soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
ARM: OMAP2+: fix spellint typo
MAINTAINERS: Update address for OMAP GPMC driver
soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
ARM: brcmstb: Add debug UART entry for 72116
ARM: tegra: Don't enable unused PLLs on resume from suspend
soc: samsung: pm_domains: Convert to regular platform driver
soc: samsung: exynos-chipid: correct helpers __init annotation
ARM: mach-imx: imx6ul: Print SOC revision on boot
ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
soc: samsung: exynos-asv: handle reading revision register error
soc: samsung: exynos-asv: don't defer early on not-supported SoCs
Linus Torvalds [Sun, 21 Feb 2021 02:16:30 +0000 (18:16 -0800)]
Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform removals from Arnd Bergmann:
"There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use, and
received confirmation about six ARM platforms and the TI C6x
architecture that have all reached the end of their life upstream,
with no known users remaining:
- efm32 - added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell - added in 2011, abandoned after 2012 acquisition
- prima2 - added in 20111, no notable changes since 2015
- tango - added in 2015, sporadic changes until 2017, but abandoned
- u300 - added in 2009, no notable changes since 2013
- zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x - added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users that
plan to contribute them in the future, in other cases the code is
complete and works reliably"
Linus Torvalds [Sun, 21 Feb 2021 02:09:40 +0000 (18:09 -0800)]
Merge tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"There are only two left-over remaining non-urgent ARM SoC bug fixes:
- A build fix for the Atmel SAM9 platform to allow building with the
clang integrated assembler
- A DT fix for ethernet on Intel SoCFPGA, this has been broken since
it was added in v5.4"
* tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: at91: use proper asm syntax in pm_suspend
arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2
Fixes: 93efb0c65683 ("octeontx2-pf: Fix out-of-bounds read in otx2_get_fecparam()") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
These defines are used with set_bit() and test_bit() which take a bit
number. In other words, the code is doing:
if (BIT(BIT(1)) & pf->hw.cap_flag) {
This was done consistently so it did not cause a problem at runtime but
it's still worth fixing.
Fixes: facede8209ef ("octeontx2-pf: cn10k: Add mbox support for CN10K") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This series fixes a race condition that may result in the output clock
not aligned to internal 1 PPS clock.
Part of device initialization is to align the rising edge of output
clocks to the internal rising edge of the 1 PPS clock. If the system
APLL and DPLL are not locked when this alignment occurs, the alignment
fails and a fixed offset between the internal 1 PPS clock and the
output clock occurs.
If a clock is dynamically enabled after power-up, the output clock
also needs to be aligned to the internal 1 PPS clock.
v3:
Suggested by: Jakub Kicinski <kuba@kernel.org>
- Remove unnecessary 'err' variable
- Increase msleep()/loop accuracy by using jiffies in while()
- No empty lines between variables
- No empty lines between call and the if
- parenthesis around a == b are unnecessary
- Inconsistent \n usage in dev_()
- Remove unnecessary empty line
- Leave string format in place so static code checkers can
validate arguments
v2:
Suggested by: Richard Cochran <richardcochran@gmail.com>
- Added const to "char * fmt"
- Break unrelated header change into separate patch
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Vincent Cheng [Wed, 17 Feb 2021 05:42:15 +0000 (00:42 -0500)]
ptp: ptp_clockmatrix: Clean-up dev_*() messages.
Code clean-up.
* Remove unnecessary \n termination from dev_*() messages.
* Remove 'char *fmt' to define strings to stay within 80 column
limit. Not needed since coding guidelines increased to
100 columns limit.
Keeping format in place allows static code checkers to
validate the arguments.
* Tighten up vertical spacing.
Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Vincent Cheng [Wed, 17 Feb 2021 05:42:13 +0000 (00:42 -0500)]
ptp: ptp_clockmatrix: Add alignment of 1 PPS to idtcm_perout_enable.
When enabling output using PTP_CLK_REQ_PEROUT, need to align the output
clock to the internal 1 PPS clock.
Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Part of the device initialization aligns the rising edge of the output
clock to the internal 1 PPS clock. If the system APLL and DPLL is not
locked, then the alignment will fail and there will be a fixed offset
between the internal 1 PPS clock and the output clock.
After loading the device firmware, poll the system APLL and DPLL for
locked state prior to initialization, timing out after 2 seconds.
Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
====================
dwmac-sun8i cleanup and shutdown hook
These patches clean up some things I noticed while fixing suspend/resume
behavior. The first four are minor code improvements. The last one adds
a shutdown hook to minimize power consumption on boards without a PMIC.
Changes v1 to v2:
- Note the assumption of exclusive reset controller access in patch 3
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Samuel Holland [Wed, 17 Feb 2021 04:20:06 +0000 (22:20 -0600)]
net: stmmac: dwmac-sun8i: Add a shutdown callback
The Ethernet MAC and PHY are usually major consumers of power on boards
which may not be able to fully power off (those with no PMIC). Powering
down the MAC and internal PHY saves power while these boards are "off".
Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: David S. Miller <davem@davemloft.net>
====================
Netfilter updates for net-next
The following patchset contains Netfilter updates for net-next:
1) Add two helper functions to release one table and hooks from
the netns and netlink event path.
2) Add table ownership infrastructure, this new infrastructure allows
users to bind a table (and its content) to a process through the
netlink socket.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Vladimir Oltean [Wed, 17 Feb 2021 20:33:48 +0000 (22:33 +0200)]
net: mscc: ocelot: select PACKING in the Kconfig
Ocelot now uses include/linux/dsa/ocelot.h which makes use of
CONFIG_PACKING to pack/unpack bits into the Injection/Extraction Frame
Headers. So it needs to explicitly select it, otherwise there might be
build errors due to the missing dependency.
Fixes: 40d3f295b5fe ("net: mscc: ocelot: use common tag parsing code with DSA") Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Linus Walleij [Tue, 16 Feb 2021 23:55:42 +0000 (00:55 +0100)]
net: dsa: tag_rtl4_a: Support also egress tags
Support also transmitting frames using the custom "8899 A"
4 byte tag.
Qingfang came up with the solution: we need to pad the
ethernet frame to 60 bytes using eth_skb_pad(), then the
switch will happily accept frames with custom tags.
Cc: Mauri Sandberg <sandberg@mailfence.com> Reported-by: DENG Qingfang <dqfext@gmail.com> Fixes: efd7fe68f0c6 ("net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 16 Feb 2021 23:23:24 +0000 (15:23 -0800)]
Merge branch 'broadcom-next'
Robert Hancock says:
====================
Broadcom PHY driver updates
Updates to the Broadcom PHY driver related to use with copper SFP modules.
Changed since v3:
-fixed kerneldoc error
Changed since v2:
-Create flag for PHY on SFP module and use that rather than accessing
attached_dev directly in PHY driver
Changed since v1:
-Reversed conditional to reduce indentation
-Added missing setting of MII_BCM54XX_AUXCTL_MISC_WREN in
MII_BCM54XX_AUXCTL_SHDWSEL_MISC register
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Robert Hancock [Tue, 16 Feb 2021 22:54:54 +0000 (16:54 -0600)]
net: phy: broadcom: Do not modify LED configuration for SFP module PHYs
bcm54xx_config_init was modifying the PHY LED configuration to enable link
and activity indications. However, some SFP modules (such as Bel-Fuse
SFP-1GBT-06) have no LEDs but use the LED outputs to control the SFP LOS
signal, and modifying the LED settings will cause the LOS output to
malfunction. Skip this configuration for PHYs which are bound to an SFP
bus.
Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Robert Hancock [Tue, 16 Feb 2021 22:54:53 +0000 (16:54 -0600)]
net: phy: Add is_on_sfp_module flag and phy_on_sfp helper
Add a flag and helper function to indicate that a PHY device is part of
an SFP module, which is set on attach. This can be used by PHY drivers
to handle SFP-specific quirks or behavior.
Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Robert Hancock [Tue, 16 Feb 2021 22:54:52 +0000 (16:54 -0600)]
net: phy: broadcom: Set proper 1000BaseX/SGMII interface mode for BCM54616S
The default configuration for the BCM54616S PHY may not match the desired
mode when using 1000BaseX or SGMII interface modes, such as when it is on
an SFP module. Add code to explicitly set the correct mode using
programming sequences provided by Bel-Fuse:
Signed-off-by: Robert Hancock <robert.hancock@calian.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
lan743x: sync only the received area of an rx ring buffer
On cpu architectures w/o dma cache snooping, dma_unmap() is a
is a very expensive operation, because its resulting sync
needs to invalidate cpu caches.
Increase efficiency/performance by syncing only those sections
of the lan743x's rx ring buffers that are actually in use.
Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com> Reviewed-by: Bryan Whitehead <Bryan.Whitehead@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
lan743x: boost performance on cpu archs w/o dma cache snooping
The buffers in the lan743x driver's receive ring are always 9K,
even when the largest packet that can be received (the mtu) is
much smaller. This performs particularly badly on cpu archs
without dma cache snooping (such as ARM): each received packet
results in a 9K dma_{map|unmap} operation, which is very expensive
because cpu caches need to be invalidated.
Careful measurement of the driver rx path on armv7 reveals that
the cpu spends the majority of its time waiting for cache
invalidation.
Optimize by keeping the rx ring buffer size as close as possible
to the mtu. This limits the amount of cache that requires
invalidation.
This optimization would normally force us to re-allocate all
ring buffers when the mtu is changed - a disruptive event,
because it can only happen when the network interface is down.
Remove the need to re-allocate all ring buffers by adding support
for multi-buffer frames. Now any combination of mtu and ring
buffer size will work. When the mtu changes from mtu1 to mtu2,
consumed buffers of size mtu1 are lazily replaced by newly
allocated buffers of size mtu2.
These optimizations double the rx performance on armv7.
Third parties report 3x rx speedup on armv8.
Tested with iperf3 on a freescale imx6qp + lan7430, both sides
set to mtu 1500 bytes, measure rx performance:
Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com> Reviewed-by: Bryan Whitehead <Bryan.Whitehead@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
However, enetc first destroys the phylink instance, then calls
unregister_netdev. This is already dissimilar to the setup (and error
path teardown path) from enetc_pf_probe, but more than that, it is buggy
because it is invalid to call phylink_stop after phylink_destroy.
So let's first unregister the netdev (and let the .ndo_stop events
consume themselves), then destroy the phylink instance, then free the
netdev.
Fixes: 71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
====================
net: mvneta: implement basic MQPrio support
This is V2 for the MQPrio support in mvneta.
This small series adds basic support for mqprio offloading, by having
the rx queueing mirroring the TCs based on VLAN prio fields.
This was tested on Armada 3700, and proves useful to make sure
high-priority traffic has a better chance not getting dropped when
there's lots of packets incoming.
The first patch of the series deals with the per-cpu interrupts on the
armada 3700. Since they don't work, there were already some patches
applied to keep all queue mappings to CPU0, but there still were some
remaining mappings left to be dealt with.
The second patch implements the MQPrio offloading for the receive path.
Changes in V2 :
- Add a Fixes tag for the first patch
- Fix some warnings and the xmas tree in the second patch
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
net: mvneta: Remove per-cpu queue mapping for Armada 3700
According to Errata #23 "The per-CPU GbE interrupt is limited to Core
0", we can't use the per-cpu interrupt mechanism on the Armada 3700
familly.
This is correctly checked for RSS configuration, but the initial queue
mapping is still done by having the queues spread across all the CPUs in
the system, both in the init path and in the cpu_hotplug path.
Fixes: 2636ac3cc2b4 ("net: mvneta: Add network support for Armada 3700 SoC") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Vlad Buslov [Tue, 16 Feb 2021 16:22:00 +0000 (18:22 +0200)]
net: sched: fix police ext initialization
When police action is created by cls API tcf_exts_validate() first
conditional that calls tcf_action_init_1() directly, the action idr is not
updated according to latest changes in action API that require caller to
commit newly created action to idr with tcf_idr_insert_many(). This results
such action not being accessible through act API and causes crash reported
by syzbot:
==================================================================
BUG: KASAN: null-ptr-deref in instrument_atomic_read include/linux/instrumented.h:71 [inline]
BUG: KASAN: null-ptr-deref in atomic_read include/asm-generic/atomic-instrumented.h:27 [inline]
BUG: KASAN: null-ptr-deref in __tcf_idr_release net/sched/act_api.c:178 [inline]
BUG: KASAN: null-ptr-deref in tcf_idrinfo_destroy+0x129/0x1d0 net/sched/act_api.c:598
Read of size 4 at addr 0000000000000010 by task kworker/u4:5/204
The patches in this pr are already submitted and reviewed through the
netdev and rdma mailing lists.
The series includes mlx5 HW bits and definitions for mlx5 real time clock
translation and handling in the mlx5 driver clock module to enable and
support such mode [1]
The changes made in eccd540 is enough for xilinx_emaclite to run
without problem on 64-bit systems. I have tested it on a Xilinx
FPGA with RV64 softcore. The architecture limitation in Kconfig
seems no longer necessary.
A small change is included to print address with %lx instead of
casting to int and print with %x.
Signed-off-by: Gary Guo <gary@garyguo.net> Signed-off-by: David S. Miller <davem@davemloft.net>
This patch series extends MRP switchdev to allow the SW to have a better
understanding if the HW can implement the MRP functionality or it needs
to help the HW to run it. There are 3 cases:
- when HW can't implement at all the functionality.
- when HW can implement a part of the functionality but needs the SW
implement the rest. For example if it can't detect when it stops
receiving MRP Test frames but it can copy the MRP frames to CPU to
allow the SW to determine this. Another example is generating the MRP
Test frames. If HW can't do that then the SW is used as backup.
- when HW can implement completely the functionality.
So, initially the SW tries to offload the entire functionality in HW, if
that fails it tries offload parts of the functionality in HW and use the
SW as helper and if also this fails then MRP can't run on this HW.
Based on these new calls, implement the switchdev for Ocelot driver. This
is an example where the HW can't run completely the functionality but it
can help the SW to run it, by trapping all MRP frames to CPU.
Also this patch series adds MRP support to DSA and implements the Felix
driver which just reuse the Ocelot functions. This part was just compiled
tested because I don't have any HW on which to do the actual tests.
v4:
- remove ifdef MRP from include/net/switchdev.h
- move MRP implementation for Ocelot in a different file such that
Felix driver can use it.
- extend DSA with MRP support
- implement MRP support for Felix.
v3:
- implement the switchdev calls needed by Ocelot driver.
v2:
- fix typos in comments and in commit messages
- remove some of the comments
- move repeated code in helper function
- fix issue when deleting a node when sw_backup was true
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:42:04 +0000 (22:42 +0100)]
net: dsa: add MRP support
Add support for offloading MRP in HW. Currently implement the switchdev
calls 'SWITCHDEV_OBJ_ID_MRP', 'SWITCHDEV_OBJ_ID_RING_ROLE_MRP',
to allow to create MRP instances and to set the role of these instances.
Add DSA_NOTIFIER_MRP_ADD/DEL and DSA_NOTIFIER_MRP_ADD/DEL_RING_ROLE
which calls to .port_mrp_add/del and .port_mrp_add/del_ring_role in the
DSA driver for the switch.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:42:03 +0000 (22:42 +0100)]
net: mscc: ocelot: Add support for MRP
Add basic support for MRP. The HW will just trap all MRP frames on the
ring ports to CPU and allow the SW to process them. In this way it is
possible to for this node to behave both as MRM and MRC.
Current limitations are:
- it doesn't support Interconnect roles.
- it supports only a single ring.
- the HW should be able to do forwarding of MRP Test frames so the SW
will not need to do this. So it would be able to have the role MRC
without SW support.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:42:02 +0000 (22:42 +0100)]
bridge: mrp: Update br_mrp to use new return values of br_mrp_switchdev
Check the return values of the br_mrp_switchdev function.
In case of:
- BR_MRP_NONE, return the error to userspace,
- BR_MRP_SW, continue with SW implementation,
- BR_MRP_HW, continue without SW implementation,
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:42:01 +0000 (22:42 +0100)]
bridge: mrp: Extend br_mrp_switchdev to detect better the errors
This patch extends the br_mrp_switchdev functions to be able to have a
better understanding what cause the issue and if the SW needs to be used
as a backup.
There are the following cases:
- when the code is compiled without CONFIG_NET_SWITCHDEV. In this case
return success so the SW can continue with the protocol. Depending
on the function, it returns 0 or BR_MRP_SW.
- when code is compiled with CONFIG_NET_SWITCHDEV and the driver doesn't
implement any MRP callbacks. In this case the HW can't run MRP so it
just returns -EOPNOTSUPP. So the SW will stop further to configure the
node.
- when code is compiled with CONFIG_NET_SWITCHDEV and the driver fully
supports any MRP functionality. In this case the SW doesn't need to do
anything. The functions will return 0 or BR_MRP_HW.
- when code is compiled with CONFIG_NET_SWITCHDEV and the HW can't run
completely the protocol but it can help the SW to run it. For
example, the HW can't support completely MRM role(can't detect when it
stops receiving MRP Test frames) but it can redirect these frames to
CPU. In this case it is possible to have a SW fallback. The SW will
try initially to call the driver with sw_backup set to false, meaning
that the HW should implement completely the role. If the driver returns
-EOPNOTSUPP, the SW will try again with sw_backup set to false,
meaning that the SW will detect when it stops receiving the frames but
it needs HW support to redirect the frames to CPU. In case the driver
returns 0 then the SW will continue to configure the node accordingly.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:42:00 +0000 (22:42 +0100)]
bridge: mrp: Add 'enum br_mrp_hw_support'
Add the enum br_mrp_hw_support that is used by the br_mrp_switchdev
functions to allow the SW to detect the cases where HW can't implement
the functionality or when SW is used as a backup.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:41:59 +0000 (22:41 +0100)]
switchdev: mrp: Extend ring_role_mrp and in_role_mrp
Add the member sw_backup to the structures switchdev_obj_ring_role_mrp
and switchdev_obj_in_role_mrp. In this way the SW can call the driver in
2 ways, once when sw_backup is set to false, meaning that the driver
should implement this completely in HW. And if that is not supported the
SW will call again but with sw_backup set to true, meaning that the
HW should help or allow the SW to run the protocol.
For example when role is MRM, if the HW can't detect when it stops
receiving MRP Test frames but it can trap these frames to CPU, then it
needs to return -EOPNOTSUPP when sw_backup is false and return 0 when
sw_backup is true.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Horatiu Vultur [Tue, 16 Feb 2021 21:41:58 +0000 (22:41 +0100)]
switchdev: mrp: Remove CONFIG_BRIDGE_MRP
Remove #IS_ENABLED(CONFIG_BRIDGE_MRP) from switchdev.h. This will
simplify the code implements MRP callbacks and will be similar with the
vlan filtering.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Robert Hancock [Tue, 16 Feb 2021 20:53:30 +0000 (14:53 -0600)]
net: phy: marvell: Ensure SGMII auto-negotiation is enabled for 88E1111
When 88E1111 is operating in SGMII mode, auto-negotiation should be enabled
on the SGMII side so that the link will come up properly with PCSes which
normally have auto-negotiation enabled. This is normally the case when the
PHY defaults to SGMII mode at power-up, however if we switched it from some
other mode like 1000Base-X, as may happen in some SFP module situations,
it may not be, particularly for modules which have 1000Base-X
auto-negotiation defaulting to disabled.
Call genphy_check_and_restart_aneg on the fiber page to ensure that auto-
negotiation is properly enabled on the SGMII interface.
Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Marek Behún [Tue, 16 Feb 2021 19:20:55 +0000 (20:20 +0100)]
sfp: add support for 5gbase-t SFPs
The sfp_parse_support() function is setting 5000baseT_Full in some cases.
Now that we have PHY_INTERFACE_MODE_5GBASER interface mode available,
change sfp_select_interface() to return PHY_INTERFACE_MODE_5GBASER if
5000baseT_Full is set in the link mode mask.
Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Pavana Sharma [Tue, 16 Feb 2021 19:20:53 +0000 (20:20 +0100)]
net: phy: Add 5GBASER interface mode
Add 5GBASE-R phy interface mode
Signed-off-by: Pavana Sharma <pavana.sharma@digi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Pavana Sharma [Tue, 16 Feb 2021 19:20:52 +0000 (20:20 +0100)]
dt-bindings: net: Add 5GBASER phy interface
Add 5gbase-r PHY interface mode.
Signed-off-by: Pavana Sharma <pavana.sharma@digi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Florian Fainelli [Tue, 16 Feb 2021 19:08:37 +0000 (11:08 -0800)]
tg3: Remove unused PHY_BRCM flags
The tg3 driver tried to communicate towards the PHY driver whether it
wanted RGMII in-band signaling enabled or disabled however there is
nothing that looks at those flags in drivers/net/phy/broadcom.c so this
does do not anything.
Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 16 Feb 2021 22:09:46 +0000 (14:09 -0800)]
Merge branch 'amd-xgbe-fixes'
Shyam Sundar S K says:
====================
Bug fixes to amd-xgbe driver
General fixes on amd-xgbe driver are addressed in this series, mostly
on the mailbox communication failures and improving the link stability
of the amd-xgbe device.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Shyam Sundar S K [Tue, 16 Feb 2021 19:07:10 +0000 (00:37 +0530)]
net: amd-xgbe: Fix network fluctuations when using 1G BELFUSE SFP
Frequent link up/down events can happen when a Bel Fuse SFP part is
connected to the amd-xgbe device. Try to avoid the frequent link
issues by resetting the PHY as documented in Bel Fuse SFP datasheets.
Fixes: e722ec82374b ("amd-xgbe: Update the BelFuse quirk to support SGMII") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Shyam Sundar S K [Tue, 16 Feb 2021 19:07:09 +0000 (00:37 +0530)]
net: amd-xgbe: Reset link when the link never comes back
Normally, auto negotiation and reconnect should be automatically done by
the hardware. But there seems to be an issue where auto negotiation has
to be restarted manually. This happens because of link training and so
even though still connected to the partner the link never "comes back".
This needs an auto-negotiation restart.
Also, a change in xgbe-mdio is needed to get ethtool to recognize the
link down and get the link change message. This change is only
required in a backplane connection mode.
Fixes: abf0a1c2b26a ("amd-xgbe: Add support for SFP+ modules") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Fixes: e722ec82374b ("amd-xgbe: Update the BelFuse quirk to support SGMII") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Shyam Sundar S K [Tue, 16 Feb 2021 19:07:07 +0000 (00:37 +0530)]
net: amd-xgbe: Reset the PHY rx data path when mailbox command timeout
Sometimes mailbox commands timeout when the RX data path becomes
unresponsive. This prevents the submission of new mailbox commands to DXIO.
This patch identifies the timeout and resets the RX data path so that the
next message can be submitted properly.
Fixes: 549b32af9f7c ("amd-xgbe: Simplify mailbox interface rate change code") Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 16 Feb 2021 22:06:19 +0000 (14:06 -0800)]
Merge branch 'Fixes-applied-to-VCS8514'
Bjarni Jonasson says:
====================
Fixes applied to VCS8514
3 different fixes applied to VSC8514:
LCPLL reset, serdes calibration and coma mode disabled.
Especially the serdes calibration is large and is now placed
in a new file 'mscc_serdes.c' which can act as
a placeholder for future serdes configuration.
v1 -> v2:
Preserved reversed christmas tree
Removed forward definitions
Fixed build issues
Changed net to net-next
v2 -> v3:
Added cover letter.
Removed ena_clk_bypass from function call
Created mscc_serdes.c and .h for serdes configuration
Modified coma register config.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Bjarni Jonasson [Tue, 16 Feb 2021 15:29:44 +0000 (16:29 +0100)]
net: phy: mscc: coma mode disabled for VSC8514
The 'coma mode' (configurable through sw or hw) provides an
optional feature that may be used to control when the PHYs become active.
The typical usage is to synchronize the link-up time across
all PHY instances. This patch releases coma mode if not done by hardware,
otherwise the phys will not link-up.
Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Bjarni Jonasson [Tue, 16 Feb 2021 15:29:43 +0000 (16:29 +0100)]
net: phy: mscc: improved serdes calibration applied to VSC8514
The current IB serdes calibration algorithm (performed by the onboard 8051)
has proven to be unstable for the VSC8514 QSGMII phy.
A new algorithm has been developed based on
'Frequency-offset Jittered-Injection' or 'FoJi' method which solves
all known issues. This patch disables the 8051 algorithm and
replaces it with the new FoJi algorithm.
The calibration is now performed in a new file (mscc_serdes.c),
which can act as an placeholder for future serdes configurations.
Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Bjarni Jonasson [Tue, 16 Feb 2021 15:29:42 +0000 (16:29 +0100)]
net: phy: mscc: adding LCPLL reset to VSC8514
At Power-On Reset, transients may cause the LCPLL to lock onto a
clock that is momentarily unstable. This is normally seen in QSGMII
setups where the higher speed 6G SerDes is being used.
This patch adds an initial LCPLL Reset to the PHY (first instance)
to avoid this issue.
Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Aya Levin [Fri, 12 Feb 2021 22:30:42 +0000 (14:30 -0800)]
net/mlx5: Add cyc2time HW translation mode support
Device timestamp can be in real time mode (cycles to time translation is
offloaded into the Hardware). With real time mode, HW provides timestamp
which is already translated into nanoseconds.
With this mode, driver adjusts both the HW and timecounter (to keep
clock_info_page updated) using callbacks: adjfreq, adjtime and settime.
HW clock modifications are done via MTUTC access reg commands. Driver is
allowed to modify HW real time clock only if MCAM ptpcyc2realtime_modify
capability is set.
Add MTUTC set function to be used for configuring the HW real time
clock. Modify existing code to support both internal timer (with
conversion via timecounter_cyc2time() and real time (no conversions).
Align the signatures of the helpers converting from timestamp to
nanoseconds. With that, when allocating a queue assign the corresponding
callback with respect to the capability.
Adjust 1PPS timestamp calculation flows based on the timestamp mode.
Cyc2time offload brings two major advantages:
- Improve MTAE (Max Time Absolute Error) for HW TS by up to 160 ns over a
100% loaded CPU.
- Faster data-path timestamp to nanoseconds, as translation is
lock-less and done in HW.
On real time mode, timestamp format is 32 high bits of seconds and 32
low bits of nanoseconds. On some flows, driver shall convert this format
into nanoseconds wall-clock with REAL_TIME_TO_NS macro.
HW supports a single clock, and it is shared by all functions on a
device. In case real time clock is used, it is recommended to use
a single GM to all device's functions.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Eran Ben Elisha [Fri, 12 Feb 2021 22:30:41 +0000 (14:30 -0800)]
net/mlx5: Move some PPS logic into helper functions
Some of PPS logic (timestamp calculations) fits only internal timer
timestamp mode. Move these logics into helper functions. Later in the
patchset cyc2time HW translation mode will expose its own PPS timestamp
calculations.
With this change, main flow will only hold calling PPS logic based on run
time mode.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Eran Ben Elisha [Fri, 12 Feb 2021 22:30:40 +0000 (14:30 -0800)]
net/mlx5: Move all internal timer metadata into a dedicated struct
Internal timer mode (SW clock) requires some PTP clock related metadata
structs. Real time mode (HW clock) will not need these metadata structs.
This separation emphasize the different interfaces for HW clock and SW
clock.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Eran Ben Elisha [Fri, 12 Feb 2021 22:30:39 +0000 (14:30 -0800)]
net/mlx5: Refactor init clock function
Function mlx5_init_clock() is responsible for internal PTP related metadata
initializations. Break mlx5_init_clock() to sub functions, each takes care
of its own logic.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Eran Ben Elisha [Fri, 12 Feb 2021 22:30:38 +0000 (14:30 -0800)]
net/mlx5: Add register layout to support real-time time-stamp
Add needed structure layouts and defines for MTUTC (Management UTC)
register. MTUTC will be used for cyc2time HW translation.
In addition, add cyc2time modify capability bit and init segment HCA
real time address.
Finally, add capability bits indicating which time-stamping format is
supported per SQ and RQ. Add ts_format in the queue's context layout to
allow configuration.
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
====================
Fix buggy brport flags offload for SJA1105 DSA
I am resending this series because the title and the patches were mixed
up and these patches were lost. This series' cover letter was used as
the merge commit for the unrelated "Fixing build breakage after "Merge
branch 'Propagate-extack-for-switchdev-LANs-from-DSA'"" series, as can
be seen below:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=ca04422afd6998611a81d0ea1b61d5a5f4923f84
while the actual patches from the "Fix buggy brport flags offload for
SJA1105 DSA" series were marked as superseded and not applied:
https://patchwork.kernel.org/project/netdevbpf/cover/20210214155704.1784220-1-olteanv@gmail.com/
which they should have.
I know with so many bugs I introduced it's hard to keep track, I'm sorry.
Original series description:
While testing software bridging on sja1105, I discovered that I managed
to introduce two bugs in a single patch submitted recently to net-next.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Quite embarrasingly, I managed to fool myself into thinking that the
flooding domain of sja1105 source ports is restricted by the forwarding
domain, which it isn't. Frames which match an FDB entry are forwarded
towards that entry's DESTPORTS restricted by REACH_PORT[SRC_PORT], while
frames that don't match any FDB entry are forwarded towards
FL_DOMAIN[SRC_PORT] or BC_DOMAIN[SRC_PORT].
This means we can't get away with doing the simple thing, and we must
manage the flooding domain ourselves such that it is restricted by the
forwarding domain. This new function must be called from the
.port_bridge_join and .port_bridge_leave methods too, not just from
.port_bridge_flags as we did before.
Fixes: 4d9423549501 ("net: dsa: sja1105: offload bridge port flags to device") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Vladimir Oltean [Tue, 16 Feb 2021 11:41:18 +0000 (13:41 +0200)]
net: dsa: sja1105: fix configuration of source address learning
Due to a mistake, the driver always sets the address learning flag to
the previously stored value, and not to the currently configured one.
The bug is visible only in standalone ports mode, because when the port
is bridged, the issue is masked by .port_stp_state_set which overwrites
the address learning state to the proper value.
Fixes: 4d9423549501 ("net: dsa: sja1105: offload bridge port flags to device") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This patch fixes references to uninitialized variables and
debugfs entry name for CN10K platform and HW_TSO flag check.
Fixes: 3ad3f8f93c81 ("octeontx2-af: cn10k: MAC internal loopback support"). Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
v1-v2
- Clear HW_TSO flag for 96xx B0 version.
This patch fixes the bug introduced by the commit 3ad3f8f93c81 ("octeontx2-af: cn10k: MAC internal loopback support").
These changes are not yet merged into net branch, hence submitting
to net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
Vladimir Oltean [Tue, 16 Feb 2021 11:14:46 +0000 (13:14 +0200)]
net: dsa: felix: don't deinitialize unused ports
ocelot_init_port is called only if dsa_is_unused_port == false, however
ocelot_deinit_port is called unconditionally. This causes a warning in
the skb_queue_purge inside ocelot_deinit_port saying that the spin lock
protecting ocelot_port->tx_skbs was not initialized.
Fixes: e5fb512d81d0 ("net: mscc: ocelot: deinitialize only initialized ports") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
The following pull-request contains BPF updates for your *net-next* tree.
There's a small merge conflict between 7eeba1706eba ("tcp: Add receive timestamp
support for receive zerocopy.") from net-next tree and 9cacf81f8161 ("bpf: Remove
extra lock_sock for TCP_ZEROCOPY_RECEIVE") from bpf-next tree. Resolve as follows:
We've added 116 non-merge commits during the last 27 day(s) which contain
a total of 156 files changed, 5662 insertions(+), 1489 deletions(-).
The main changes are:
1) Adds support of pointers to types with known size among global function
args to overcome the limit on max # of allowed args, from Dmitrii Banshchikov.
2) Add bpf_iter for task_vma which can be used to generate information similar
to /proc/pid/maps, from Song Liu.
3) Enable bpf_{g,s}etsockopt() from all sock_addr related program hooks. Allow
rewriting bind user ports from BPF side below the ip_unprivileged_port_start
range, both from Stanislav Fomichev.
4) Prevent recursion on fentry/fexit & sleepable programs and allow map-in-map
as well as per-cpu maps for the latter, from Alexei Starovoitov.
5) Add selftest script to run BPF CI locally. Also enable BPF ringbuffer
for sleepable programs, both from KP Singh.
6) Extend verifier to enable variable offset read/write access to the BPF
program stack, from Andrei Matei.
7) Improve tc & XDP MTU handling and add a new bpf_check_mtu() helper to
query device MTU from programs, from Jesper Dangaard Brouer.
8) Allow bpf_get_socket_cookie() helper also be called from [sleepable] BPF
tracing programs, from Florent Revest.
9) Extend x86 JIT to pad JMPs with NOPs for helping image to converge when
otherwise too many passes are required, from Gary Lin.
10) Verifier fixes on atomics with BPF_FETCH as well as function-by-function
verification both related to zero-extension handling, from Ilya Leoshkevich.
11) Better kernel build integration of resolve_btfids tool, from Jiri Olsa.
12) Batch of AF_XDP selftest cleanups and small performance improvement
for libbpf's xsk map redirect for newer kernels, from Björn Töpel.
13) Follow-up BPF doc and verifier improvements around atomics with
BPF_FETCH, from Brendan Jackman.
14) Permit zero-sized data sections e.g. if ELF .rodata section contains
read-only data from local variables, from Yonghong Song.
15) veth driver skb bulk-allocation for ndo_xdp_xmit, from Lorenzo Bianconi.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Alex Elder [Mon, 15 Feb 2021 21:54:34 +0000 (15:54 -0600)]
net: ipa: initialize all resources
We configure the minimum and maximum number of various types of IPA
resources in ipa_resource_config(). It iterates over resource types
in the configuration data and assigns resource limits to each
resource group for each type.
Unfortunately, we are repeatedly initializing the resource data for
the first type, rather than initializing each of the types whose
limits are specified.
Fix this bug.
Fixes: 4a0d7579d466e ("net: ipa: avoid going past end of resource group array") Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Colin Ian King [Mon, 15 Feb 2021 16:11:39 +0000 (16:11 +0000)]
i40e: Fix uninitialized variable mfs_max
The variable mfs_max is not initialized and is being compared to find
the maximum value. Fix this by initializing it to 0.
Addresses-Coverity: ("Uninitialized scalar variable") Fixes: 90bc8e003be2 ("i40e: Add hardware configuration for software based DCB") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Heiner Kallweit [Sun, 14 Feb 2021 14:16:23 +0000 (15:16 +0100)]
net: phy: rename PHY_IGNORE_INTERRUPT to PHY_MAC_INTERRUPT
Some internal PHY's have their events like link change reported by the
MAC interrupt. We have PHY_IGNORE_INTERRUPT to deal with this scenario.
I'm not too happy with this name. We don't ignore interrupts, typically
there is no interrupt exposed at a PHY level. So let's rename it to
PHY_MAC_INTERRUPT. This is in line with phy_mac_interrupt(), which is
called from the MAC interrupt handler to handle PHY events.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
The work queue is used to queue reset requests like CHANGE-PARAM or
FAILOVER resets for the worker thread. When the adapter is being removed
the adapter state is set to VNIC_REMOVING and the work queue is flushed
so no new work is added. However the check for adapter being removed is
racy in that the adapter can go into REMOVING state just after we check
and we might end up adding work just as it is being flushed (or after).
The ->rwi_lock is already being used to serialize queue/dequeue work.
Extend its usage ensure there is no race when scheduling/flushing work.
Fixes: 6954a9e4192b ("ibmvnic: Flush existing work items before device removal") Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
Cc:Uwe Kleine-König <uwe@kleine-koenig.org>
Cc:Saeed Mahameed <saeed@kernel.org> Reviewed-by: Dany Madden <drt@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 15 Feb 2021 23:15:25 +0000 (15:15 -0800)]
Merge branch 'net-phy-broadcom-Cleanups-and-APD'
Florian Fainelli says:
====================
net: phy: broadcom: Cleanups and APD
This patch series cleans up the brcmphy.h header and its numerous unused
phydev->dev_flags, fixes the RXC/TXC clock disabling bit and allows the
BCM54210E PHY to utilize APD.
Changes in v2:
- dropped the patch that attempted to fix a possible discrepancy between
the datasheet and the actual hardware
- added a patch to remove a forward declaration
- do additional flags cleanup
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Florian Fainelli [Sat, 13 Feb 2021 03:46:32 +0000 (19:46 -0800)]
net: phy: broadcom: Allow BCM54210E to configure APD
BCM54210E/BCM50212E has been verified to work correctly with the
auto-power down configuration done by bcm54xx_adjust_rxrefclk(), add it
to the list of PHYs working.
While we are at it, provide an appropriate name for the bit we are
changing which disables the RXC and TXC during auto-power down when
there is no energy on the cable.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Florian Fainelli [Sat, 13 Feb 2021 03:46:31 +0000 (19:46 -0800)]
net: phy: broadcom: Remove unused flags
We have a number of unused flags defined today and since we are scarce
on space and may need to introduce new flags in the future remove and
shift every existing flag down into a contiguous assignment.
PHY_BCM_FLAGS_MODE_1000BX was only used internally for the BCM54616S
PHY, so we allocate a driver private structure instead to store that
flag instead of canibalizing one from phydev->dev_flags for that
purpose.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Florian Fainelli [Sat, 13 Feb 2021 03:46:30 +0000 (19:46 -0800)]
net: phy: broadcom: Avoid forward for bcm54xx_config_clock_delay()
Avoid a forward declaration by moving the callers of
bcm54xx_config_clock_delay() below its body.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Lijun Pan [Sat, 13 Feb 2021 02:49:00 +0000 (20:49 -0600)]
ibmvnic: skip send_request_unmap for timeout reset
Timeout reset will trigger the VIOS to unmap it automatically,
similarly as FAILVOER and MOBILITY events. If we unmap it
in the linux side, we will see errors like
"30000003: Error 4 in REQUEST_UNMAP_RSP".
So, don't call send_request_unmap for timeout reset.
Fixes: ed651a10875f ("ibmvnic: Updated reset handling") Signed-off-by: Lijun Pan <ljp@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Lijun Pan [Sat, 13 Feb 2021 02:48:40 +0000 (20:48 -0600)]
ibmvnic: add memory barrier to protect long term buffer
dma_rmb() barrier is added to load the long term buffer before copying
it to socket buffer; and dma_wmb() barrier is added to update the
long term buffer before it being accessed by VIOS (virtual i/o server).
Fixes: 032c5e82847a ("Driver for IBM System i/p VNIC protocol") Signed-off-by: Lijun Pan <ljp@linux.ibm.com> Acked-by: Thomas Falcon <tlfalcon@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Lijun Pan [Sat, 13 Feb 2021 02:36:10 +0000 (20:36 -0600)]
ibmvnic: simplify reset_long_term_buff function
The only thing reset_long_term_buff() should do is set
buffer to zero. After doing that, it is not necessary to
send_request_map again to VIOS since it actually does not
change the mapping. So, keep memset function and remove all
others.
Signed-off-by: Lijun Pan <ljp@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Geliang Tang [Sat, 13 Feb 2021 00:52:02 +0000 (16:52 -0800)]
mptcp: add local addr info in mptcp_info
Add mptcpi_local_addr_used and mptcpi_local_addr_max in struct mptcp_info.
Signed-off-by: Geliang Tang <geliangtang@gmail.com> Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
projects / mirror_ubuntu-kernels.git / log