Olof Johansson [Sat, 19 Jul 2014 05:16:15 +0000 (22:16 -0700)]
Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:
First set of .dts changes for omaps for v3.17 merge window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (43 commits)
ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
ARM: dts: dra7: Add dt data for PCIe controller
ARM: dts: dra7: Add dt data for PCIe PHY
ARM: dts: dra7: Add dt data for PCIe PHY control module
ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
ARM: omap2plus_defconfig: enable TPS65218 configs
ARM: dts: AM437x: Add TPS65218 device tree nodes
ARM: dts: AM437x: Fix i2c nodes indentation
ARM: dts: AM43x: Add TPS65218 device tree nodes
ARM: dts: Add devicetree for Gumstix Pepper board
ARM: dts: dra7: add crossbar device binding
ARM: dts: dra7: add routable-irqs property for gic node
ARM: OMAP24xx: clock: remove legacy clock data
...
The board uses twl6040 codec connected via McPDM link. McBSP1 and McBSP2 can
be used for FM/BT.
At the same time move the pinctrl handling to the correct place - under the
corresponding nodes.
Audio connectors on the board:
Headset in/out
Stereo Line out
Stereo Line in.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Added dt data for PCIe controller. This node contains dt data for
both the DRA7 part of designware controller and for the designware core.
The documention for this node can be found @ ../bindings/pci/ti-pci.txt.
Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jingoo Han <jg1.han@samsung.com> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Marek Vasut <marex@denx.de> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Added dt data for PCIe PHY as a child node of ocp2scp3.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt.
26.3.3 PCIe Shared PHY Subsystem Integration in vE of DRA7xx ES1.0
describes the PCIe PHY subsystem-related components integrated in the device.
Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7: Add dt data for PCIe PHY control module
Added dt data for PCIe PHY control module used by PCIe PHY.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt
Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
Added missing clocks used by second instance of PCIe PHY.
The documention for this nodes can be found @ ../bindings/clock/ti/gate.txt.
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
There are two instances of PCIe PHY in DRA7xx. So renamed
optfclk_pciephy_32khz, optfclk_pciephy_clk and optfclk_pciephy_div_clk to
optfclk_pciephy1_32khz, optfclk_pciephy1_clk and optfclk_pciephy1_div_clk
respectively. This is needed for adding the clocks for second PCIe PHY
instance.
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
Added missing 32KHz clock used by PCIe PHY.
Figure 26-19. PCIe PHY Subsystem Integration in vE of DRA7xx ES1.0 TRM shows
32KHz is used by PCIe PHY.
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
from dpll_pcie_ref_ck.
Figure 26-22. DPLL_PCIE_REF Functional Block Diagram in vE of DRA7xx ES1.0 TRM
shows the signal name for the output of post divider (M2) is CLKOUTLDO.
Figure 26-21. PCIe PHY Clock Generator Overview shows CLKOUTLDO is used as
input to apll mux.
So the actual output of dpll is dpll_pcie_ref_m2ldo_ck which is also the input
of apll.
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
Add divider table to optfclk_pciephy_div clock. The 8th bit of
CM_CLKMODE_APLL_PCIE can be programmed to either 0x0 or 0x1
based on if the divider value is 0x2 or 0x1.
Figure 26-21. PCIe PHY Clock Generator Overview in vE of DRA7xx ES1.0 shows the
block diagram of Clock Generator Subsystem of PCIe PHY module. The divider
value if '1' should be programmed in order to get the correct
PCIE_PHY_DIV_GCLK frequency (2.5GHz).
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Olof Johansson [Sun, 13 Jul 2014 04:36:50 +0000 (21:36 -0700)]
Merge tag 'ux500-devicetree-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 devicetree changes for v3.17" from Linus Walleij:
Ux500 device tree patches for v3.17:
- Add regulators to STMPE expanders
- Add proper DMA channels for all SD/MMC blocks
- Add sensors to the device tree
* tag 'ux500-devicetree-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: add misc sensors to the device trees
ARM: ux500: add some DB8500 DMA channel info
ARM: ux500: add VCC and VIO regulators to STMPE IC
+ Linux 3.16-rc4
Olof Johansson [Sun, 13 Jul 2014 04:34:22 +0000 (21:34 -0700)]
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
Merge "at91: dt for 3.17 #1" from Nicolas Ferre:
First DT update for 3.17:
- move of crystals DT definitions to the /clocks node
- addition of clock entries for sound for CCF enabled platforms
- addition of DMA and DMA + nand on at91sam9rl
- move to CCF for all not-converted-yet AT91 SoCs: at91rm9200, at91sam9260/9g20,
at91sam9g45 family and at91sam9263
* tag 'at91-dt' of git://github.com/at91linux/linux-at91: (43 commits)
ARM: at91/dt: usb_a9263: define crystals frequencies
ARM: at91/dt: tny_a9263: define crystals frequencies
ARM: at91/dt: sam9263ek: define crystals frequencies
ARM: at91: move at91sam9263 SoC to the CCF
ARM: at91/dt: sam9263: define clocks
ARM: at91: prepare common clk transition for sam9263
ARM: at91/dt: cosino define crystals frequencies
ARM: at91/dt: pm9g45: crystals frequencies
ARM: at91/dt: sam9m10g45ek: define crystals frequencies
ARM: at91: move at91sam9g45 SoC to the CCF
ARM: at91/dt: sam9g45: define clocks
ARM: at91: prepare common clk transition for sam9g45
ARM: at91/dt: kizbox: define main crystal frequency
ARM: at91/dt: animeo_ip: define crystals frequencies
ARM: at91/dt: ethernut5: define crystals frequencies
ARM: at91/dt: evk-pro3: define slow crytal frequency
ARM: at91/dt: aks-cdu: define slow crytal frequency
ARM: at91/dt: ge863-pro3: define main crystal frequency
ARM: at91/dt: mpa1600: define crytals frequencies
ARM: at91/dt: qil_a9260: define crystals frequencies
...
Wolfram Sang [Thu, 10 Jul 2014 10:50:56 +0000 (12:50 +0200)]
ARM: shmobile: r8a7790: lager: use iic cores instead of i2c
On Lager board, i2c and iic cores can be interchanged since they can be
muxed to the same wires. Commit e489c2a9bc82713167d9f721ca764f4b0d37e543
("ARM: shmobile: lager: enable i2c devices") activated the i2c cores,
yet the iic cores should be default since they have the more interesting
features for generic use cases, i.e. SMBUS_QUICK and DMA (yet to be
supported).
Reported-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch removes the selection of AT91_USE_OLD_CLK when selecting
at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91
option and add support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260
SoCs support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: sam9x5 crystals under the clocks node
Having clocks grouped in a subnode is common practice, so move the crystals and
the ADC clock under a clocks node for the at91sam9x5 SoC and at91sam9x5 based
boards.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
R Sricharan [Thu, 26 Jun 2014 07:25:31 +0000 (12:55 +0530)]
ARM: dts: dra7: add crossbar device binding
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
R Sricharan [Thu, 26 Jun 2014 07:25:30 +0000 (12:55 +0530)]
ARM: dts: dra7: add routable-irqs property for gic node
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
Olof Johansson [Tue, 8 Jul 2014 05:39:47 +0000 (22:39 -0700)]
Merge tag 'berlin-dt-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Berlin DT changes for v3.17" from Sebastian Hesselbarth:
- L2CC latency properties for BG2Q
- DW i2c nodes for BG2Q and corresponding dev board
- SMP related nodes for BG2 and BG2Q
* tag 'berlin-dt-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: add SMP related nodes and properties for BG2Q
ARM: dts: berlin: add SMP related nodes and properties for BG2
Documentation: bindings: add the marvell,berlin-smp CPU enable method
Documentation: bindings: add the Berlin CPU control doc
ARM: dts: berlin: enable i2c0 and i2c2
ARM: dts: berlin: add I2C nodes for BG2Q
ARM: dts: berlin2q: set L2CC tag and data latency to 2 cycles
Linus Walleij [Wed, 11 Jun 2014 08:45:50 +0000 (10:45 +0200)]
ARM: ux500: add some DB8500 DMA channel info
This adds some missing DMA channel information to the disabled
MMC/SD/SDIO blocks number 3 and 5, and notes that the assignment
of MSP channels vary with ASIC variant.
Olof Johansson [Mon, 7 Jul 2014 00:22:26 +0000 (17:22 -0700)]
Merge tag 'renesas-dt-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v3.17" from Simon Horman:
Increased hardware coverage:
- Add R-Car sounds support to r8a7790 SoC
- Add PCIe support to r8a7790 and r8a7791 SoCs
- Increase I2C support of Henninger and lager boards
- DVFS support to Koelsch board
- Add SYS-DMAC clocks to r8a7791 SoCs
- Add USB 3.0 clocks to r8a7791 and r8a7790 SoCs
- Add LED labels to armadillo800eva board
Cleanup:
- Remove early_printk from marzen command line
* tag 'renesas-dt-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: r8a7791: add R-Car sound support on DTSI
ARM: shmobile: henninger: Enable PCIe Controller & PCIe bus clock
ARM: shmobile: koelsch: Enable PCIe Controller & PCIe bus clock
ARM: shmobile: r8a7791: Add PCIe Controller device node
ARM: shmobile: r8a7791: Add default PCIe bus clock
ARM: shmobile: r8a7791: Add PCIEC clock device tree node
ARM: shmobile: r8a7790: Add PCIe Controller device node
ARM: shmobile: r8a7790: Add default PCIe bus clock
ARM: shmobile: r8a7790: Add PCIEC clock device tree node
ARM: shmobile: r8a7791: add MSTP10 support on DTSI
ARM: shmobile: r8a7791: add audio clock on DTSI
ARM: shmobile: r8a7790: add R-Car sound support on DTSI
ARM: shmobile: r8a7790: add MSTP10 support on DTSI
ARM: shmobile: henninger: add I2C2 DT support
ARM: shmobile: koelsch: Remove duplicate i2c6 nodes
ARM: shmobile: lager: Remove duplicate i2c3 nodes
ARM: shmobile: Lager memory map update
ARM: shmobile: lager: Move i2c[12]_pins nodes to pfc node
ARM: shmobile: lager: add i2c1, i2c2 pins
ARM: shmobile: lager: enable i2c devices
...
Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linux
Pull devicetree bugfix from Grant Likely:
"Important bug fix for parsing 64-bit addresses on 32-bit platforms.
Without this patch the kernel will try to use memory ranges that
cannot be reached"
* tag 'dt-for-linus' of git://git.secretlab.ca/git/linux:
of: Check for phys_addr_t overflows in early_init_dt_add_memory_arch