Arnd Bergmann [Thu, 21 May 2020 20:50:40 +0000 (22:50 +0200)]
Merge tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.8
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
* tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (68 commits)
arm64: dts: qcom: sc7180: Correct the pdc interrupt ranges
arm64: dts: qcom: sc7180: add IPA information
arm64: dts: qcom: sc7180: Fix ETMv4 power management patch
arm64: dts: qcom: sc7180: Add A618 gpu dt blob
dt-bindings: arm-smmu: Add sc7180 compatible string
arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
arm64: dts: qcom: msm8916: move gpu opp table to gpu node
arm64: dts: qcom: msm8916: avoid using _ in node names
arm64: dts: qcom: c630: Specify UFS device reset
arm64: dts: qcom: c630: Add WiFi node
arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel
arm64: dts: qcom: db820c: Fix invalid pm8994 supplies
arm64: dts: qcom: db820c: Add pmi8994 RPM regulators
arm64: dts: qcom: msm8916: Disable coresight by default
arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area
arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen
arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator
arm64: dts: qcom: msm8916: Add blsp_i2c5
...
Arnd Bergmann [Thu, 21 May 2020 20:49:06 +0000 (22:49 +0200)]
Merge tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.8
- New board: Microchip SAMA5D2 Industrial Connectivity Platform
- All SoCs are now converted to the new PMC device tree binding
- sama5d2 flexcom nodes are now fully described in sama5d2.dtsi
* tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (35 commits)
ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs
ARM: dts: at91: Configure I2C SCL gpio as open drain
ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases
ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
ARM: dts: at91: sama5d2: Add missing flexcom definitions
ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions
ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions
ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART
ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions
ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0
ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP
...
Arnd Bergmann [Thu, 21 May 2020 20:41:59 +0000 (22:41 +0200)]
Merge tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
MT2712:
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
* tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8173: Add capacity-dmips-mhz attributes
arm64: dts: mt2712: use non-empty ranges for usb-phy
arm64: dts: mt8173: fix mdp aliases property name
arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
arm64: dts: mediatek: Add I2C support for MT6797 SoC
dt-bindings: i2c: Document I2C controller binding for MT6797 SoC
arm64: dts: mt8173: fix cooling device range
arm64: dts: mediatek: add mt8173 elm and hana board
arm64: dts: mt8173: fix unit name warnings
arm64: dts: mt8173: add uart aliases
dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana
arm64: dts: mt8183: adjust cpuidle target residency
arm64: dts: mt8173: Add gce setting in mmsys and display node
arm64: dts: mt7622: add built-in Wi-Fi device nodes
Arnd Bergmann [Thu, 21 May 2020 20:39:46 +0000 (22:39 +0200)]
Merge tag 'socfpga_dts_update_for_v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.8
- Leave the FPGA bridges disabled in base dtsi
- Add fpga2hps and fpga2sdram bridges on base Cyclone5/Arria5 dtsi
* tag 'socfpga_dts_update_for_v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
ARM: dts: socfgpa: set bridges status to disabled
Arnd Bergmann [Thu, 21 May 2020 20:35:34 +0000 (22:35 +0200)]
Merge tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
* tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (23 commits)
arm64: dts: allwinner: h6: Add IOMMU
arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
arm64: dts: allwinner: h6: add voltage range to OPP table
arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells
arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64
arm64: dts: allwinner: Sort Pine H64 device-tree nodes
arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
arm64: dts: allwinner: h6: Add thermal trip points/cooling map
arm64: dts: allwinner: h6: Add clock to CPU cores
arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo module
arm64: dts: allwinner: h6: orangepi: Disable OTG mode
arm64: dts: allwinner: h6: orangepi: Add gpio power supply
ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarity
arm64: dts: allwinner: h6: Add msgbox node
arm64: dts: allwinner: a64: Add msgbox node
ARM: dts: sunxi: h3/h5: Add msgbox node
ARM: dts: sunxi: a83t: Add msgbox node
ARM: dts: sun8i-h3: add opp table for mali gpu
...
Arnd Bergmann [Thu, 21 May 2020 20:34:59 +0000 (22:34 +0200)]
Merge tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.8-rc1
This contains a bit of cleanup and CPU frequency scaling support for the
Tegra30 Beaver board.
* tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra30: beaver: Add CPU Operating Performance Points
ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
ARM: tegra: Kill off "simple-panel" compatibles
Arnd Bergmann [Thu, 21 May 2020 20:30:18 +0000 (22:30 +0200)]
Merge tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.8-rc1
This adds bindings for the CSI TPG clock on Tegra210, moves various
clocks from the clock and reset controller to the PMC where their
controls really are, adds bindings for the external memory controller
and video capture controller on Tegra210, as well as CPU frequency
scaling on Tegra20 and Tegra30.
* tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: i2c: tegra: Document Tegra210 VI I2C
dt-bindings: tegra: Add VI and CSI bindings
dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
dt-bindings: clock: tegra: Remove PMC clock IDs
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Arnd Bergmann [Thu, 21 May 2020 14:02:11 +0000 (16:02 +0200)]
Merge tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.8 (take two)
- Initial support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven SOM (G21M) and board (G21D),
- Support for the AISTARVISION MIPI Adapter V2.1 camera board on the
Silicon Linux EK874 RZ/G2E evaluation kit.
* tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a774c0-cat874: Add support for AISTARVISION MIPI Adapter V2.1
ARM: dts: r8a7742: Add GPIO nodes
ARM: dts: r8a7742: Add [H]SCIF{A|B} support
ARM: dts: r8a7742: Add IRQC support
ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H
ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
ARM: dts: r8a7742: Initial SoC device tree
clk: renesas: Add r8a7742 CPG Core Clock Definitions
dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
Arnd Bergmann [Thu, 21 May 2020 14:00:46 +0000 (16:00 +0200)]
Merge tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.8, round 1
Highlights:
----------
MCU part:
-fix a typo for DAC io-channel-cells on f429 and h743
MPU part:
-Generic:
-Bump tp PSCI 1.0
-Fix a typo for DAC io-channel-cells
-Add M4 pdds for deep sleep mode
-Add I2C fatmode plus support
-Add new Octavio lxa-mc1 board based on OSDMP15x SiP
-Add new Stinger96 board support. It is a 96Boards IoT Extended board
based on stm32mp157a SoC. Some figures: 256MB DDR, 125MB and flash,
Onboard BG96 modem...
-Add IoT Box board support based on stinger96 board + Wifi/BT, CCS811
VOC sensor, 2 digitals microphones ...
-DH:
-Adapt dhcom-som and dhcom-pdk2 dts(i) files to STM32MP15 SoC diversity
-Add GPIO led and GPIO keys support on PDK2 board
-AV96:
-Major rework to support official avenger96 board based on DHCOR SOM.
-Prototype board is no more supported
* tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (58 commits)
ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board
ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2
ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2
ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2
ARM: dts: stm32: Add IoT Box board support
dt-bindings: arm: stm32: Document IoT Box compatible
ARM: dts: stm32: Add Stinger96 board support
dt-bindings: arm: stm32: Document Stinger96 compatible
ARM: dts: stm32: Add missing pinctrl entries for STM32MP15
dt-bindings: Add vendor prefix for Shiratech Solutions
ARM: dts: stm32: Add bindings for SPI2 on AV96
ARM: dts: stm32: Add alternate pinmux for SPI2 pins
ARM: dts: stm32: Add bindings for ADC on AV96
ARM: dts: stm32: Add alternate pinmux for ADC pins
ARM: dts: stm32: Add bindings for FDCAN2 on AV96
ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins
ARM: dts: stm32: Add bindings for FDCAN1 on AV96
ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins
ARM: dts: stm32: Repair I2C2 operation on AV96
ARM: dts: stm32: Add alternate pinmux for I2C2 pins
...
Arnd Bergmann [Thu, 21 May 2020 13:51:39 +0000 (15:51 +0200)]
Merge tag 'samsung-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.8
1. Add DTS for Exynos4210-based Samsung Galaxy S2 (GT-I9100)
mobile phone,
2. Enable WiFi and Bluetooth in multiple boards,
3. Add new features to S5Pv210-based Aries family of mobile phones
(e.g. Samsung Galaxy S): necessary configuration for suspend, audio
support, USB mux, touch keys, panel, i2c-gpio adapters, FM radio, ADC,
4. Many minor fixes (e.g. GPIO polarity, interrupts).
* tag 'samsung-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (29 commits)
ARM: dts: s5pv210: Set MAX8998 GPIO pulls on Aries boards
ARM: dts: s5pv210: Correct FIMC definitions
ARM: dts: s5pv210: Assign clocks to MMC devices on Aries boards
ARM: dts: s5pv210: Enable ADC on Aries boards
ARM: dts: s5pv210: Add an ADC node
ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards
ARM: dts: s5pv210: Add si470x FM radio to Galaxy S
ARM: dts: s5pv210: Add remaining i2c-gpio adapters to Aries boards
ARM: dts: s5pv210: Add panel support to Aries boards
ARM: dts: s5pv210: Add touchkey support to Aries boards
ARM: dts: s5pv210: Add FSA9480 support to Aries boards
ARM: dts: s5pv210: Add WM8994 support to Aries boards
ARM: dts: s5pv210: Disable pulls on GPIO I2C adapters for Aries
ARM: dts: s5pv210: Set keep-power-in-suspend for SDHCI1 on Aries
ARM: dts: s5pv210: Correct gpi pinctrl node name
ARM: dts: s5pv210: Add sleep GPIO configuration for Galaxy S
ARM: dts: s5pv210: Add sleep GPIO configuration for Fascinate4G
ARM: dts: s5pv210: Add helper define for sleep gpio config
ARM: dts: exynos: Enable WLAN support for the UniversalC210 board
ARM: dts: exynos: Enable WLAN support for the Rinato board
...
Arnd Bergmann [Thu, 21 May 2020 13:45:59 +0000 (15:45 +0200)]
Merge tag 'arm-soc/for-5.8/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for v5.8, please pull the following:
- Nicolas updates the Raspberry Pi 4 board DTS to include the GPIO
controlling power to the SD card, adds support for the vmmc regulator
for the emmc2 controller and finally updates the power management
provider for V3D to use the firmware to solve instabilities.
* tag 'arm-soc/for-5.8/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Use firmware PM driver for V3D
ARM: dts: bcm2711: Add vmmc regulator in emmc2
ARM: dts: bcm2711: Update expgpio's GPIO labels
Arnd Bergmann [Thu, 21 May 2020 13:43:45 +0000 (15:43 +0200)]
Merge tag 'hisi-arm64-dt-for-5.8' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.8
- Add pinconf for spi2 and spi3 nodes and increase the drive
strength to achieve the max speed for the Hikey960 board
- Add CTI nodes for the Hikey620 board
* tag 'hisi-arm64-dt-for-5.8' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: Add CTI options
arm64: dts: hikey960: pinctrl: Fix spi2/spi3 pinconf
Arnd Bergmann [Thu, 21 May 2020 10:34:22 +0000 (12:34 +0200)]
Merge tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt
Realtek Arm based SoC DT for v5.8
Add RTD1195, RTD1395 and RTD1619 SoCs as well as Xnano X5 TV box.
Clean up memory nodes and /soc ranges. Factor out r-bus and partition it
into CRT, Iso, Misc, SB2 and SCPU Wrapper blocks.
* tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: (35 commits)
dt-bindings: reset: rtd1295: Add SB2 reset
arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd129x: Add SB2 and SCPU Wrapper syscon nodes
ARM: dts: rtd1195: Add SB2 and SCPU Wrapper syscon nodes
arm64: dts: realtek: rtd16xx: Add CRT syscon node
ARM: dts: rtd1195: Add UART resets
ARM: dts: rtd1195: Add reset nodes
dt-bindings: reset: Add Realtek RTD1195
ARM: dts: rtd1195: Add CRT syscon node
arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon
arm64: dts: realtek: rtd139x: Introduce CRT, iso and misc syscon
arm64: dts: realtek: rtd129x: Introduce CRT, iso and misc syscon
ARM: dts: rtd1195: Introduce iso and misc syscon
arm64: dts: realtek: rtd1295: Add Xnano X5
dt-bindings: arm: realtek: Add Xnano X5
dt-bindings: vendor-prefixes: Add Xnano
arm64: dts: realtek: rtd16xx: Add memory reservations
arm64: dts: realtek: rtd16xx: Carve out boot ROM from memory
arm64: dts: realtek: Add RTD1619 SoC and Realtek Mjolnir EVB
...
Arnd Bergmann [Thu, 21 May 2020 10:03:23 +0000 (12:03 +0200)]
Merge tag 'omap-for-v5.8/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
DTS changes for omaps for v5.8 merge window
We add support for beaglebone-ai board that's am5729 based devices.
Then we have a series changes to configure more hardware acceletators found
on omap variants. With the recent ti-sysc related changes, we can now better
configure the accelerators with help of the clock framework and reset driver.
So with a series of changes from Suman Anna and Tero Kristo, let's configure
IPUs and DSPs for dra7 devices like beagle-x15. And let's also configure the
missing crypto accelerators for omap5 as those have been missing.
Note that there are still some pending driver related patches to use IPU and
DSP related features with mainline kernel, but those are independent of the
devicetree changes.
Then there is a display related change for am57xx-idk for tc358778 bridge,
and a change to configure the missing clock source for some PWM timers.
* tag 'omap-for-v5.8/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits)
ARM: OMAP5: Make L4SEC clock domain SWSUP only
ARM: OMAP4: Make L4SEC clock domain SWSUP only
ARM: dts: omap5: add DES crypto accelerator node
ARM: dts: omap5: add SHA crypto accelerator node
ARM: dts: omap5: add aes2 entry
ARM: dts: omap5: add aes1 entry
ARM: dts: dra7-ipu-dsp-common: Add watchdog timers to IPU and DSP nodes
ARM: dts: am571x-idk: Add CMA pools and enable IPUs & DSP1 rprocs
ARM: dts: am572x-idk-common: Add CMA pools and enable IPU & DSP rprocs
ARM: dts: beagle-x15-common: Add CMA pools and enable IPU & DSP rprocs
ARM: dts: dra76-evm: Add CMA pools and enable IPU & DSP rprocs
ARM: dts: dra71-evm: Add CMA pools and enable IPUs & DSP1 rprocs
ARM: dts: dra72-evm-revc: Add CMA pools and enable IPUs & DSP1 rprocs
ARM: dts: dra72-evm: Add CMA pools and enable IPUs & DSP1 rprocs
ARM: dts: dra7-evm: Add CMA pools and enable IPU & DSP rprocs
ARM: dts: dra7-ipu-dsp-common: Add timers to IPU and DSP nodes
ARM: dts: dra7-ipu-dsp-common: Add mailboxes to IPU and DSP nodes
ARM: dts: dra7-ipu-dsp-common: Move mailboxes into common files
ARM: dts: DRA72x: Add aliases for rproc nodes
ARM: dts: DRA74x: Add aliases for rproc nodes
...
Arnd Bergmann [Thu, 21 May 2020 09:53:19 +0000 (11:53 +0200)]
Merge tag 'versatile-dts-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt
Versatile DTS updates for the v5.8 kernel:
Create a new device tree for the Integrator/AP with the
IM-PD1 expansion module fitted in the first slot.
If we want to augment the slot where it is sitting, we can
alter the device tree or make the bootloader do so.
* tag 'versatile-dts-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Add devicetree for Integrator/AP with IM-PD1
Bjorn Andersson [Mon, 18 May 2020 18:44:57 +0000 (11:44 -0700)]
arm64: dts: qcom: sc7180: Fix ETMv4 power management patch
The lack of unique context in '0f1decaa83b7 ("arm64: dts: qcom: sc7180:
Support ETMv4 power management")' caused the patch to be applied
off-by-one. Move the "arm,coresight-loses-context-with-cpu" properties
down one node, so that it applies to the ETMs and not the replicator.
Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tudor Ambarus [Mon, 18 May 2020 11:49:21 +0000 (11:49 +0000)]
ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs
The sama5d2 SoC has two dedicated I2C IPs that are enabled on
sama5d2_xplained. Add alias for the i2c devices to not rely on
probe order for the i2c device numbering.
arm64: dts: mediatek: Add I2C support for MT6797 SoC
Add I2C support for Mediatek MT6797 SoC. There are a total of 8 I2C
controllers in this SoC (2 being shared) and they are same as the
controllers present in MT6577 SoC. Hence, the driver support is added with
DT fallback method.
As per the datasheet, there are controllers with _imm prefix like i2c2_imm
and i2c3_imm. These appears to be in different memory regions but sharing
the same pins with i2c2 and i2c3 respectively. Since there is no clear
evidence of what they really are, I've adapted the numbering/naming scheme
from the downstream code by Mediatek.
Tudor Ambarus [Thu, 14 May 2020 05:03:17 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
Users can choose which flexcom function to use. Describe the I2C
Flexcom0 function. Add alias for the i2c2 node in order to not rely
on probe order for the i2c device numbering. The sama5d2 SoC has
two dedicated i2c buses and five flexcoms that can function as i2c.
The i2c0 and i2c1 aliases are kept for the dedicated i2c buses,
the i2c flexcom functions can be numbered in order starting from i2c2.
Tudor Ambarus [Thu, 14 May 2020 05:03:16 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
The aliases should be defined in the board dts rather than in the
SoC dtsi. Don't rely on the aliases defined in the SoC dtsi and define
the alias for the Serial DBGU in the board dts file. sama5d2 boards use
the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained.
Tudor Ambarus [Thu, 14 May 2020 05:03:15 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
Device aliases are board-specific, if needed one should define them
in board dts rather than in the SoC dtsi. If an alias from the SoC
dtsi is addressed by a driver that does not use any of the of_alias*()
methods, we can drop it. This is the case for the i2s aliases, drop
them. tcb aliases point to nodes that are not enabled in any of the
sama5d2 based platforms. atmel_tclib.c is scheduled to go away, any
board using that alias is already broken, so get rid of the tcb aliases
too.
Tudor Ambarus [Thu, 14 May 2020 05:03:14 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions
Spare boards of duplicating the DMA bindings. Describe the flx0
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.
Tudor Ambarus [Thu, 14 May 2020 05:03:13 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
Spare boards of duplicating the DMA bindings. Describe the flx1
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.
Tudor Ambarus [Thu, 14 May 2020 05:03:12 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
Spare boards of duplicating the DMA bindings. Describe the flx3
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.
Tudor Ambarus [Thu, 14 May 2020 05:03:12 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions
Spare boards of duplicating the DMA bindings. Describe the flx4
DMA bindings in the SoC dtsi. Users that don't want to use DMA
for their flexcom functions have to overwrite the flexcom DMA
bindings in their board device tree.
Tudor Ambarus [Thu, 14 May 2020 05:03:10 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
There is a single functional change in this patch. With the move of the
flx0 uart5 definition in the SoC dtsi, the uart5 from
at91-sama5d27_wlsom1_ek.dts inherits the following optional property:
atmel,fifo-size = <32>;
This particular change was tested by Codrin.
Tudor Ambarus [Thu, 14 May 2020 05:03:09 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
Tudor Ambarus [Thu, 14 May 2020 05:03:08 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx2 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
Tudor Ambarus [Thu, 14 May 2020 05:03:08 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx3 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
Tudor Ambarus [Thu, 14 May 2020 05:03:07 +0000 (05:03 +0000)]
ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
Presumably the GPU node needs to control both the GPU and GPU GX power
domains, but given that GPU GX now depends on the GPU GDSC both can
effectively be controlled by controlling GPU GX. So use this instead.
arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX
at a fixed max nominal voltage for the db820c and specify this as supply
for the MMSS GPU_GX GDSC.
With the introduction of CPR support the range for VDD_GX should be
expanded.
Stephan Gerhold [Thu, 14 May 2020 11:27:54 +0000 (13:27 +0200)]
arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
apq8016-sbc.dtsi is the only remaining device which takes up
4 files since it has its pinctrl split into separate files.
Actually this does not really make the device tree easier to read
(just harder to find nodes). For db820c the files were merged in
commit 88264f1f6bf5 ("arm64: dts: qcom: db820c: Remove pin specific files").
Do the same for apq8016-sbc (db410c) and move the pinctrl definitions
into apq8016-sbc.dtsi.
Stephan Gerhold [Thu, 14 May 2020 11:27:53 +0000 (13:27 +0200)]
arm64: dts: qcom: msm8916: move gpu opp table to gpu node
In msm8916.dtsi the GPU OPP table is defined under the root node,
whereas in msm8996.dtsi/sdm845.dtsi it is a subnode of the gpu device
(which makes it easier to find).
Move it to the gpu device node to make this consistent.
Stephan Gerhold [Thu, 14 May 2020 11:27:52 +0000 (13:27 +0200)]
arm64: dts: qcom: msm8916: avoid using _ in node names
Many nodes in the MSM8916 device trees use '_' in node names
(especially pinctrl), even though (seemingly) '-' is preferred now.
Make this more consistent by replacing '_' with '-' where possible.
Similar naming is used for pinctrl in newer device trees (e.g. sdm845.dtsi).
Marek Vasut [Wed, 13 May 2020 18:10:20 +0000 (20:10 +0200)]
ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board
The Avenger96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an Avenger96 reference board. The DHCOR SoM can be populated with any
STM32MP15xx. Split the DTs to reflect this such that the common SoM and
Avenger96 parts are now in stm32mp15xx-dhcor-*dtsi and a specific example
implementation of STM32MP157A SoM and Avenger96 board is separated into
stm32mp157a-dhcor-*dts* . The stm32mp157a-avenger96.dts is retained for
the sake of backward naming compatibility.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Wed, 13 May 2020 18:10:19 +0000 (20:10 +0200)]
ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2
The DH Electronics PDK2 can be populated with SoM with any STM32MP15xx
variant. Split the SoC-independent parts of the SoM and PDK2 into the
stm32mp15xx-dhcom-*.dtsi and reduce stm32mp157c-dhcom-*dts* to example
of adding STM32MP157C variant of the SoM into a PDK2 carrier board.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Wed, 13 May 2020 18:10:18 +0000 (20:10 +0200)]
ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2
Add bindings for the four GPIO LEDs on DH PDK2 board. Note that LED5
GPIO-E may conflict with touchscreen interrupt, hence LED5 must be
disabled when using the DH 560-200 display unit with touchscreen.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Marek Vasut [Wed, 13 May 2020 18:10:17 +0000 (20:10 +0200)]
ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2
Add bindings for the four GPIO keys on DH PDK2 board. Note that TA1
key is polled because it's IRQ line conflicts with ethernet IRQ, the
rest of the GPIO keys, TA2, TA3, TA4, are interrupt-driven and wake
up sources.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
It's uncertain where the "vreg_s8a_l3a_input" comes from, but the supply
for VDD_L3_L11 on PM8994 should be VREG_S3A_1P3, so correct this - and
drop the vreg_s8a_l3a_input.
The PMI8994 provides 3 SPMS regulators and one boost/bypass regulator.
Define s1 and the boot/bypass and update pm8994 to appropriately
describe the supply from PMI8994.
IoT Box is an IoT gateway device based on Stinger96 board powered by
STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This
device makes use of Stinger96 board by having it as a base board with
one additional mezzanine on top.
Following are the features exposed by this device in addition to the
Stinger96 board:
Stinger96 is a 96Boards IoT Extended edition board designed and
manufactured by Shiratech solutions based on STM32MP1 SoC. Following
are the features of this board:
* 256MB DDR
* 125MB NAND Flash
* Onboard BG96 modem
* 1x uSD
* 2x USB (1 available as external connector and another connected to BG96)
* 1x SPI
* 1x PCM
* 2x UART (apart from serial console)
* 2x I2C (apart from one connected to PMIC)
Following peripherals are tested and known to work:
Michael Srba [Wed, 13 May 2020 18:47:35 +0000 (20:47 +0200)]
arm64: dts: qcom: msm8916: Disable coresight by default
On some msm8916 devices, attempts at initializing coresight cause the boot to
fail. This was fixed by disabling the coresight-related nodes in the board dts
files. However, a cleaner approach was chosen for fixing the same issue on
msm8998: disabling coresight by default, and enabling it in board dts files
where desired.
This patch implements the same solution for msm8916, removes now redundant
overwrites in board specific dts files and and enables coresight in db410c's
board dts in order to keep the current behavior.
Fixes: b1fcc5702a41 ("arm64: dts: qcom: msm8916: Add CTI options") Signed-off-by: Michael Srba <michael.srba@seznam.cz> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20200513184735.30104-1-michael.srba@seznam.cz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Thierry Reding [Fri, 7 Jun 2019 13:58:34 +0000 (15:58 +0200)]
dt-bindings: i2c: tegra: Document Tegra210 VI I2C
The Tegra210 features an instance of the Tegra I2C controller that is
part of the host1x domain and typically used for camera use-cases. It
uses pretty much the same programming model but the registers are laid
out differently.
Tegra contains VI controller which can support up to 6 MIPI CSI
camera sensors.
Each Tegra CSI port from CSI unit can be one-to-one mapper to
VI channel and can capture from an external camera sensor or
from built-in test pattern generator.
Joseph Lo [Wed, 29 May 2019 08:21:32 +0000 (16:21 +0800)]
dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
Add the binding document for the external memory controller (EMC) which
communicates with external LPDDR4 devices. It includes the bindings of
the EMC node and a sub-node of EMC table which under the reserved memory
node. The EMC table contains the data of the rates that EMC supported.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
clk_out_1, clk_out_2, clk_out_3, blink are part of Tegra PMC block so
these clocks should be provided by the Tegra PMC. IDs for these clocks
have been defined in dt-bindings/soc/tegra-pmc.h.
This patch removes the IDs for these clocks from the Tegra clock device
tree bindings.